JPH04804A - Adaptive array antenna system - Google Patents

Adaptive array antenna system

Info

Publication number
JPH04804A
JPH04804A JP10105790A JP10105790A JPH04804A JP H04804 A JPH04804 A JP H04804A JP 10105790 A JP10105790 A JP 10105790A JP 10105790 A JP10105790 A JP 10105790A JP H04804 A JPH04804 A JP H04804A
Authority
JP
Japan
Prior art keywords
signal
level
circuit
correlation processing
wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10105790A
Other languages
Japanese (ja)
Inventor
Hidemi Oki
秀実 大木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP10105790A priority Critical patent/JPH04804A/en
Publication of JPH04804A publication Critical patent/JPH04804A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To secure communication in the state of making the level of a signal wave higher than the level of an interference wave by providing a comparing and deciding means to compare and decide the size of the level by detecting the respective signal waves concerning the output of a power inversion correlation processing means and an output received from one of first and second array antennas, and detecting the level of the detected signal wave to the interference wave. CONSTITUTION:A weight control circuit 17 is provided to output signals while multiplying weight to input signals, and mixing them corresponding to a control signal from a correlation processing circuit 18, and the output signals are supplied to the correlation processing circuit 18 and also supplied to a signal switching circuit 19 and a switching control circuit 20 as a power inversion (PI) system. The correlation processing circuit 18 executes a PI correlation processing while inputting the output signal (through system) of an IF amplifier 16 and the output signal (PI system) of the weight control circuit 17 so as to decide the weight amount of the weight control circuit 17 corresponding to the processed result. A comparison and decision circuit 205 decides the size by comparing the signal wave/interference wave (S/J) level of each demodulated data obtained in the through and PI systems, and the switch of the signal switching circuit 20 is controlled corresponding to the decided result.

Description

【発明の詳細な説明】 [発明の目的コ (産業上の利用分野) この発明は、妨害波を除去して通信を可能とするパワー
インバージョンアルゴリズムを用いたアダプティブアレ
イアンテナ装置に関する。
DETAILED DESCRIPTION OF THE INVENTION [Purpose of the Invention (Industrial Application Field) The present invention relates to an adaptive array antenna device using a power inversion algorithm that removes interference waves and enables communication.

(従来の技術) 周知のように、信号波より強力な妨害波が存在する環境
下では、アダプティブアレイアンテナ装置にパワーイン
バージョン(電力反転の意で、以下、PIと記す)アル
ゴリズムを用いる。このPI利用のアンテナ装置は、第
4図に示すような入出力電力特性を有する。すなわち、
PIオフではリニアな特性であるが、PIオンではある
入力レベル点より信号入力を増加させると逆に出力レベ
ルが抑圧される特性となる。この効果を利用して、信号
波より強力な妨害波を抑圧する方式がパワーインバージ
ョン相関処理である。具体的には、PIオフ状態で第5
図(a)に示すように妨害波Jのレベルが希望波Sのレ
ベルより高い場合、P1オンに設定することにより、第
5図(b)に示すように妨害波Jを希望波Sより十分レ
ベル制限することができる。
(Prior Art) As is well known, in an environment where there are interference waves stronger than signal waves, a power inversion (hereinafter referred to as PI) algorithm is used in an adaptive array antenna device. This antenna device using PI has input/output power characteristics as shown in FIG. That is,
When the PI is off, the characteristic is linear, but when the PI is on, when the signal input is increased beyond a certain input level point, the output level is suppressed. Power inversion correlation processing is a method that utilizes this effect to suppress interference waves that are stronger than signal waves. Specifically, in the PI off state, the fifth
When the level of the interference wave J is higher than the level of the desired signal S, as shown in Figure 5(a), by setting P1 on, the interference wave J is set to be higher than the desired signal S, as shown in Figure 5(b). Levels can be restricted.

しかし、従来のP■利用アタプティブアレイアンテナ装
置では、第6図(a)に示すように逆に信号波レベルが
妨害波レベルより大きい電波環境で使用すると、同図(
b)に示すように逆に信号波を抑圧してしまい、通信か
確保できなくなるという欠点があった。
However, when using the conventional adaptive array antenna device using P■ in a radio wave environment where the signal wave level is higher than the interference wave level, as shown in Figure 6(a),
As shown in b), there was a drawback that the signal waves were suppressed, making it impossible to secure communications.

(発明が解決しようとする課題) 以上述べたように従来のPI利用アダプティブアレイア
ンテナ装置では、信号波より強力な妨害波が存在する環
境下では、妨害波を抑圧して信号波を取り出すことがで
きるが、逆に信号波レベルが妨害波レベルより大きい電
波環境で使用すると、信号波を逆に抑圧してしまい、通
信が確保できなくなる。
(Problems to be Solved by the Invention) As described above, in the conventional adaptive array antenna device using PI, in an environment where interference waves stronger than the signal waves exist, it is difficult to suppress the interference waves and extract the signal waves. However, if it is used in a radio wave environment where the signal wave level is higher than the interference wave level, the signal wave will be suppressed, making it impossible to secure communication.

この発明は上記の課題を解決するためになされたもので
、どのような電波環境下においても信号波レベルを妨害
波レベルより大きい状態にして通信を確保できるアダプ
ティブアレイアンテナ装置を提供することを目的とする
This invention was made to solve the above problems, and an object thereof is to provide an adaptive array antenna device that can ensure communication by making the signal wave level higher than the interference wave level under any radio wave environment. shall be.

[発明の構成] (課題を解決するための手段) 上記目的を達成するためにこの発明に係るアダプティブ
アレイアンテナ装置は、到来電波を受信する第1及び第
2のアレイアンテナと、これらアレイアンテナの各受信
信号を入力してパワーインバージョン相関処理を行うパ
ワーインバージョン相関処理手段と、この手段の出力と
前記第1及び第2のアレイアンテナのいずれか一方の受
信出力についてそれぞれ信号波を検波しその妨害波に対
するレベルを検出してその大小を比較判定する比較判定
手段と、この手段の判定結果に基づいて前記パワーイン
バージョン相関処理手段の出力と前記第1及び第2のア
レイアンテナのいずれか一方の受信出力のいずれか一方
を選択的に導出する信号切換手段とを具備して構成され
る。
[Structure of the Invention] (Means for Solving the Problems) In order to achieve the above object, an adaptive array antenna device according to the present invention includes first and second array antennas that receive incoming radio waves, and power inversion correlation processing means for inputting each received signal and performing power inversion correlation processing, and detecting signal waves for the output of this means and the reception output of either one of the first and second array antennas. Comparison/determination means for detecting the level of the interference wave and comparing and determining its magnitude; and a signal switching means for selectively deriving one of the received outputs.

(作用) 上記構成のアダプティブアレイアンテナ装置では、パワ
ーインバージョン相関処理前後の受信信号について、そ
れぞれ信号波を検波しその妨害波に対するレベルを検出
してその大小を比較判定し、大きい方の受信信号を自動
的に選択して出力する。受信波が信号波レベル〉妨害波
レベルであるときは相関処理前の受信信号か出力され、
妨害波レベル〉信号波レベルであるときは妨害波を抑圧
した相関処理後の受信信号が出力される。
(Function) In the adaptive array antenna device having the above configuration, the received signal before and after power inversion correlation processing is detected, the signal wave is detected, the level with respect to the interference wave is detected, the magnitude is compared and determined, and the received signal of the larger one is detected. automatically selected and output. When the received wave is greater than the signal wave level > the interference wave level, the received signal before correlation processing is output,
When the interference wave level>signal wave level, a received signal after correlation processing in which interference waves are suppressed is output.

(実施例) 以下、第1図乃至第3図を参照してこの発明の一実施例
を説明する。
(Embodiment) Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 to 3.

第1図はその構成を示すもので、11は主アレイアンテ
ナ、12は補助アレイアンテナである。各アレイアンテ
ナ11.12の受信信号はそれぞれ周波数変換器13.
14で中間周波に変換された後、IF増幅器15.16
で増幅されてウェイト制御回路17に供給される。また
、補助アレイアンテナ12側の受信信号は相関処理回路
18、信号切換−路19及び切換制御回路20に供給さ
れる。
FIG. 1 shows its configuration, where 11 is a main array antenna and 12 is an auxiliary array antenna. The received signals of each array antenna 11.12 are transmitted to a frequency converter 13.
After being converted to an intermediate frequency at 14, the IF amplifier 15.16
The signal is amplified and supplied to the weight control circuit 17. Further, the received signal on the side of the auxiliary array antenna 12 is supplied to a correlation processing circuit 18, a signal switching path 19, and a switching control circuit 20.

上記ウェイト制御回路17は各入力信号に相関処理回路
18からの制御信号に応じたウェイトをかけて混合出力
するもので、その出力信号は相関処理回路18に供給さ
れると共に、PI系として信号切換回路19及び切換制
御回路20に供給される。相関処理回路18はIF増幅
器16の出力信号(スルー系)とウェイト制御回路17
の出力信号(PI系)を入力してパワーインバージョン
相関処理を行い、その処理結果に応じてウェイト制御回
路17のウェイト量を決定するものである。
The weight control circuit 17 weights each input signal according to the control signal from the correlation processing circuit 18 and outputs the mixed signal.The output signal is supplied to the correlation processing circuit 18 and is also used as a PI system for signal switching. It is supplied to the circuit 19 and the switching control circuit 20. The correlation processing circuit 18 connects the output signal (through system) of the IF amplifier 16 and the weight control circuit 17.
The output signal (PI system) is input, power inversion correlation processing is performed, and the weight amount of the weight control circuit 17 is determined according to the processing result.

上記切換制御回路20はPI系の検波回路201及び信
号レベル検出回路202、スルー系の検波回路203及
び信号レベル検出回路204、並びに比較判定回路20
5で構成される。検波回路201 、203はそれぞれ
入力した受信信号から復調データを検波するものである
。信号レベル検出回路202 、204はそれぞれマツ
チドフィルタで構成され、対応する検波回路201 、
203で得られた復調データのS/Jレベルを検出する
ものである。比較判定回路205はスルー系、PI系で
得られた各復調データのS/Jレベルを比較してその大
小を判定し、その判定結果に応じて上記信号切換回路2
0を切換制御するものである。
The switching control circuit 20 includes a PI type detection circuit 201 and a signal level detection circuit 202, a through type detection circuit 203 and a signal level detection circuit 204, and a comparison judgment circuit 20.
Consists of 5. Detection circuits 201 and 203 each detect demodulated data from input received signals. The signal level detection circuits 202 and 204 are each composed of a matched filter, and the corresponding detection circuits 201 and 204 are configured with matched filters.
The S/J level of the demodulated data obtained in step 203 is detected. A comparison/judgment circuit 205 compares the S/J level of each demodulated data obtained from the through system and the PI system to determine the magnitude thereof, and according to the determination result, the signal switching circuit 2
0 switching control.

上記構成において、以下、第2図及び第3図を参照して
その動作を説明する。
The operation of the above configuration will be described below with reference to FIGS. 2 and 3.

主アンテナ11及び補助アンテナ12で受信された信号
波と妨害波の信号はそれぞれ周波数変換器13゜14で
中間周波に周波数変換され、IF増幅器15゜16で増
幅された後、ウェイト制御回路17に供給される。また
、補助アンテナ12側の信号はスルー系として相関処理
回路18、信号切換回路19及び切換制御回路20に供
給される。ウェイト制御回路17及び相関処理回路18
では入力信号のPII関処理が行われ、信号波あるいは
妨害波のいずれか強い方のレベルが抑圧されて、PI系
として信号切換回路19及び切換制御回路20に供給さ
れる。
The signal waves and interference waves received by the main antenna 11 and the auxiliary antenna 12 are frequency-converted to intermediate frequencies by frequency converters 13-14, amplified by IF amplifiers 15-16, and then sent to a weight control circuit 17. Supplied. Further, the signal on the side of the auxiliary antenna 12 is supplied as a through system to the correlation processing circuit 18, the signal switching circuit 19, and the switching control circuit 20. Weight control circuit 17 and correlation processing circuit 18
Then, the input signal is subjected to PII-related processing, and the level of either the signal wave or the interference wave, whichever is stronger, is suppressed and is supplied as a PI system to the signal switching circuit 19 and the switching control circuit 20.

ここで、各アンテナ11.12への到来電波において、
信号波Sより妨害波Jの方がレベル大であるとき、スル
ー系の受信信号は第2図(a)に示すようになり、PI
系の受信信号はPI処理によって妨害波Jが抑圧されて
第2図(b)に示すようになる。各県の受信信号は、検
波回路201 、203で復調データが検波され、信号
レベル検出回路202 、204で復調データのS/J
レベルが検出されて、比較判定回路205で両者のS/
Jレベルが比較される。このとき、PI系の方が大であ
ると判定されるので、信号切換回路19はPI系側に切
換制御される。よって、第2図(c)に示すように妨害
波Jが抑圧されたPII受信信号が選択的に出力される
ようになる。
Here, in the radio waves arriving at each antenna 11.12,
When the level of the interference wave J is higher than that of the signal wave S, the received signal of the through system becomes as shown in Fig. 2 (a), and the PI
The received signal of the system has the interference wave J suppressed by PI processing, and becomes as shown in FIG. 2(b). The demodulated data of the received signal from each prefecture is detected by the detection circuits 201 and 203, and the S/J of the demodulated data is detected by the signal level detection circuits 202 and 204.
The level is detected, and the comparison/judgment circuit 205
J levels are compared. At this time, since it is determined that the PI system is larger, the signal switching circuit 19 is controlled to switch to the PI system. Therefore, as shown in FIG. 2(c), the PII received signal in which the interference wave J is suppressed is selectively output.

逆に、妨害波Jより信号波Sの方がレベル大であるとき
、スルー系の受信信号は第3図(a)に示すようになり
、PI系の受信信号はPI処理によって信号波Sが抑圧
されて第3図(b)に示すようになる。上記と同様に、
切換制御回路20において、両系の各復調データのS/
Jレベルを比較してみると、スルー系の方が大であると
判定される。このため、信号切換回路19はスルー系側
に切換制御される。よって、第3図(C)に示すように
信号波Sが妨害波Jより大であるスルー系受信信号が選
択的に出力されるようになる。
Conversely, when the level of the signal wave S is higher than that of the interference wave J, the received signal of the through system becomes as shown in Fig. 3(a), and the received signal of the PI system becomes the signal wave S due to PI processing. It is suppressed as shown in FIG. 3(b). Similar to above,
In the switching control circuit 20, the S/ of each demodulated data of both systems is
When comparing the J levels, it is determined that the through type is higher. Therefore, the signal switching circuit 19 is controlled to switch to the through system side. Therefore, as shown in FIG. 3(C), a through-system received signal in which the signal wave S is larger than the interference wave J is selectively output.

したがって、上記構成のアダプティブアレイアンテナ装
置は、信号波Sが妨害波Jより大きい電波環境において
はスルー系を、妨害波Jが信号波Sより大きい電波環境
においてはPI処理によって妨害波Jを抑圧したPI系
を自動的に選択出力するので、どの様な環境においても
安定した通信を確保することができる。
Therefore, the adaptive array antenna device with the above configuration suppresses the through system in a radio wave environment where the signal wave S is larger than the interference wave J, and suppresses the interference wave J by PI processing in a radio wave environment where the interference wave J is larger than the signal wave S. Since the PI system is automatically selected and output, stable communication can be ensured in any environment.

[発明の効果] 以上のようにこの発明によれば、どのような電波環境下
においても信号波レベルを妨害波レベルより大きい状態
にして通信を確保できるアダプティブアレイアンテナ装
置を提供することができる。
[Effects of the Invention] As described above, according to the present invention, it is possible to provide an adaptive array antenna device that can ensure communication by making the signal wave level higher than the interference wave level under any radio wave environment.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明に係るアダプティブアレイアンテナ装
置の一実施例を示すブロック回路図、第2図及び第3図
は同実施例の動作を説明するための波形図、第4図はこ
の発明で利用するパワーインバージョン相関処理を説明
するための特性図、第5図及び第6図は従来装置の動作
及び欠点を説明するための波形図である。 11・・・主アレイアンテナ、12・・・補助アレイア
ンテナ、13.14・・・周波数変換器、15.18・
・・IF増幅器、17・・・ウェイト制御回路、18・
・・相関処理回路、19・・・信号切換回路、20・・
・切換制御回路、201・・・PII検波回路、202
・・・PI系倍信号レベル検出回路203・・・スルー
系検波回路、204・・・スルー系信号レベル検出回路
、205・・・比較判定回路。 出願人代理人 弁理士 鈴江武彦 (a) (a) 第4rIA (b) (C) 第 図 (b) (c) 第3 図 (a) (b) 第 図 第6図
FIG. 1 is a block circuit diagram showing an embodiment of the adaptive array antenna device according to the present invention, FIGS. 2 and 3 are waveform diagrams for explaining the operation of the embodiment, and FIG. 4 is a block circuit diagram showing an embodiment of the adaptive array antenna device according to the present invention. A characteristic diagram for explaining the power inversion correlation process used, and FIGS. 5 and 6 are waveform diagrams for explaining the operation and drawbacks of the conventional device. 11... Main array antenna, 12... Auxiliary array antenna, 13.14... Frequency converter, 15.18.
・・IF amplifier, 17・・Weight control circuit, 18・
...Correlation processing circuit, 19...Signal switching circuit, 20...
・Switching control circuit, 201... PII detection circuit, 202
...PI system double signal level detection circuit 203...Through system detection circuit, 204...Through system signal level detection circuit, 205...Comparison judgment circuit. Applicant's representative Patent attorney Takehiko Suzue (a) (a) 4rIA (b) (C) Figure (b) (c) Figure 3 (a) (b) Figure 6

Claims (1)

【特許請求の範囲】[Claims] 到来電波を受信する第1及び第2のアレイアンテナと、
これらアレイアンテナの各受信信号を入力してパワーイ
ンバージョン相関処理を行うパワーインバージョン相関
処理手段と、この手段の出力と前記第1及び第2のアレ
イアンテナのいずれか一方の受信出力についてそれぞれ
信号波を検波しその妨害波に対するレベルを検出してそ
の大小を比較判定する比較判定手段と、この手段の判定
結果に基づいて前記パワーインバージョン相関処理手段
の出力と前記第1及び第2のアレイアンテナのいずれか
一方の受信出力のいずれか一方を選択的に導出する信号
切換手段とを具備するアダプティブアレイアンテナ装置
first and second array antennas that receive incoming radio waves;
power inversion correlation processing means for inputting each received signal of these array antennas and performing power inversion correlation processing; a comparison/judgment means for detecting a wave, detecting a level with respect to the interference wave, and comparing and determining the magnitude thereof; and an output of the power inversion correlation processing means and the first and second arrays based on the determination result of this means. An adaptive array antenna device comprising: signal switching means for selectively deriving one of the reception outputs of one of the antennas.
JP10105790A 1990-04-17 1990-04-17 Adaptive array antenna system Pending JPH04804A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10105790A JPH04804A (en) 1990-04-17 1990-04-17 Adaptive array antenna system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10105790A JPH04804A (en) 1990-04-17 1990-04-17 Adaptive array antenna system

Publications (1)

Publication Number Publication Date
JPH04804A true JPH04804A (en) 1992-01-06

Family

ID=14290487

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10105790A Pending JPH04804A (en) 1990-04-17 1990-04-17 Adaptive array antenna system

Country Status (1)

Country Link
JP (1) JPH04804A (en)

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