JPH0480961A - Schottky barrier diode - Google Patents

Abstract

PURPOSE:To enable a Schottky barrier diode to be controlled in barrier height by a method wherein an amorphous layer is formed on the surface of a semiconductor through a plasma treatment. CONSTITUTION:An epitaxial silicon layer 3 doped with phosphorus as impurity is deposited on a silicon substrate 6 doped with arsenic as impurity. An SiO2 film is formed through a steam oxidation treatment, and then an etching process is carried out with a hydrofluoric acid etching solution to provide a guard ring. Boron atoms are implanted through an ion implantation method, the substrate 6 is annealed to enable the implanted borons to be diffused to provide a guard ring 5 (P<+> diffusion). An oxide film formed on a region where an amorphous layer is to be formed is removed, and a plasma discharge is made to start through an RIE introducing Ar gas. The surface of silicon exposed to Ar plasma is turned amorphous, and an amorphous silicon layer 4 is formed. The thickness of the amorphous silicon layer and the barrier height (phin) of a Schottky barrier diode can be controlled by conditions, such as a pressure and an input power, set at a plasma discharge.

Description

DETAILED DESCRIPTION OF THE INVENTION A Schottky barrier diode having a structure as shown in FIG. 1 (in the figure, 6 is a silicon substrate, 4 is an epitaxial layer, Barrier metals are widely used for power applications because they are faster, have a lower positive rising voltage, and have lower loss than other diodes.

A conventional Schottky barrier diode with such a structure is
The barrier height (φ,) was determined by the material of the barrier metal forming the Schottky junction and the surface concentration of the semiconductor. Therefore, in order to control the barrier height (φ,) for one type of metal, the surface concentration of the semiconductor must be controlled, which poses a manufacturing difficulty.

The present invention is characterized in that the barrier height (φ,) can be controlled by plasma-treating the semiconductor surface to form an amorphous layer.

FIGS. 2(a) and 2(b) are a plan view and a cross-sectional view showing an embodiment of the present invention, in which A and B are electrodes of a Schottky barrier diode, 1 is a barrier forming metal, 2 is a surface protective film, and 3 is a semiconductor (for example, N-type silicon crystal), 4 is an amorphous semiconductor layer formed in the semiconductor 3, and 5 is the semiconductor 3
This is a layer of conductivity type opposite to that of 3 formed in the area, and is generally called a guard ring. 6 is a low resistance layer of the same conductivity type as 3, and 7 is an electrode metal. The amorphous semiconductor layer (4) can be controlled in φ as shown in FIG. 3 by changing the formation conditions.

<Example> An example in which amorphous silicon is formed on a part of an N-type silicon epitaxial wafer to control φ will be described below.

Epitaxial silicon layer 3 with a specific resistance of 0.5 Ω and phosphorus impurity atoms doped on a silicon substrate 6 with a specific resistance of 0.003 Ω and a thickness of 400 μm doped with arsenic impurity atoms.
is deposited to a thickness of 6 μm.

A film of about 1 μm thick of Sin is formed by steam oxidation treatment, and a first photographic process is performed to remove the oxide film only on the guard ring portion.Then, the guard ring portion is etched with a hydrofluoric acid-based etching solution. Open the window. Boron atoms of approximately 1×10I4an-2 are ion-implanted at 50 keV, and annealed and diffused in a 02 atmosphere for 1100'C for 130 minutes to form a guard ring portion 5 (P3 diffusion) of 3 μm.

Next, a second photograph is applied to remove the oxide film in the area where the amorphous layer is to be formed. After that, RIE (Reactive
After introducing Ar scum and adjusting the pressure to about 5 mTorr, power was turned on and plasma discharged for 1 minute using an Ion Etcher. The silicon surface exposed to Ar plasma becomes amorphous, forming an amorphous silicon layer 4.
is formed. The thickness of this amorphous silicon layer and the barrier height (φ,) of the Schottky barrier diode are:
It can be controlled by the conditions, pressure, and amount of power applied during plasma discharge.

After forming the amorphous silicon layer, AI is deposited. The film thickness of Al is approximately 5000, and then Cr and N are added.
The i-evaporation was carried out in the same vacuum deposition chamber in a conventional manner. Cr
serves as a diffusion barrier metal for A1 and Ni. Also,
The back side of the silicon wafer is also subsequently treated with Cr%N1 evaporation.

Next, apply AI and Cr% only to the area where the A electrode is required on the pattern surface.
A tertiary photograph is taken so that Ni is present.

The N1 etching solution is a ferric chloride based etching solution.
Cr is a ceric nitrate-based etching solution, and A
1 was etched using a known H2PO4-based etching solution.

Thereafter, Pb-8n solder was melted on the Ni surface of the wafer, the chip was diced, and a Schottky barrier diode chip was completed through the usual process.

Through the above manufacturing process, the inner area of the guard ring is 0°01-
completed the Schottky barrier diode. FIG. 3 shows the value of φ when the input power was changed during the formation of the amorphous silicon layer. According to this example,
It can be seen that the barrier height (φ,) depends on the power input when forming the amorphous silicon layer. In other words, the barrier height (φ, ) depends on the formation conditions of the amorphous silicon layer.
The size of can be controlled. In addition to the above input power conditions, the barrier height is determined by argon (A) during plasma discharge.
r) The barrier height (φ,) can be increased by using hydrogen (N7) gas instead of gas and making the amorphous silicon layer contain water.

[Brief explanation of the drawing]

Figure 1 is an explanatory diagram of a conventional Schottky barrier diode.
FIGS. 2(a) and 2(b) are a plan view and a sectional view of an embodiment of the present invention, and FIG. 3 is a characteristic diagram of the embodiment of the present invention.

Claims (2)

[Claims] (1) A Schottky barrier diode in which a Schottky barrier metal is provided on the surface of a semiconductor substrate that is partially or entirely amorphous. (2) The Schottky barrier diode according to claim (1), wherein the amorphous semiconductor substrate contains hydrogen.