JPH0481014A - Time constant circuit - Google Patents
Time constant circuitInfo
- Publication number
- JPH0481014A JPH0481014A JP19204890A JP19204890A JPH0481014A JP H0481014 A JPH0481014 A JP H0481014A JP 19204890 A JP19204890 A JP 19204890A JP 19204890 A JP19204890 A JP 19204890A JP H0481014 A JPH0481014 A JP H0481014A
- Authority
- JP
- Japan
- Prior art keywords
- time constant
- amplifier
- circuit
- capacitive element
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Networks Using Active Elements (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
簡易て大きな値の時定数回路か得られる回路に関し、
抵抗素子・容量素子自体を格別大きくすることなく、回
路構成によって等測的に大きな値の得られる時定数回路
を提供することを目的とし、第1の入力端子と一端を接
続した抵抗素子の他端を容量素子の一方端と接続し、容
量素子の他方端を@2の入力端子に接続し、且つ前記容
量素子の一方端を出力端子とする時定数回路において、
容量素子の一方端を信号極性反転増幅器の入力端子に接
続し、容量素子の他方端を前記増幅器の出力端子と接続
することで構成する。[Detailed Description of the Invention] [Summary] Regarding a circuit that can obtain a simple time constant circuit with a large value, when a large value can be obtained isometrically by the circuit configuration without making the resistive element or capacitive element themselves particularly large. For the purpose of providing a constant circuit, the other end of the resistive element whose one end is connected to the first input terminal is connected to one end of the capacitive element, and the other end of the capacitive element is connected to the input terminal of @2, and a time constant circuit in which one end of the capacitive element is an output terminal,
One end of the capacitive element is connected to the input terminal of a signal polarity inversion amplifier, and the other end of the capacitive element is connected to the output terminal of the amplifier.
本発明は簡易で大きな値の時定数回路が得られる回路に
関する。The present invention relates to a circuit that can provide a simple time constant circuit with a large value.
従来、信号微分回路・積分回路などで使用する時定数回
路は抵抗・容量の積値で定まる「時定数」が特性を定め
ている。積分回路として使用する場合なと、大きな値の
時定数を必要とするとき、抵抗素子・容量素”子をそれ
ぞれ極度に大きくする必要かあった。スペースの都合上
、その目的か充分に達成てきない場内など、回路構成に
よって等価的に大きな値の時定数を得る技術を開発する
ことか要望された。Conventionally, the characteristics of time constant circuits used in signal differentiating circuits, integrating circuits, etc. are determined by the "time constant" determined by the product of resistance and capacitance. When used as an integrator circuit, when a large time constant was required, it was necessary to make the resistor and capacitor elements extremely large.Due to space constraints, this purpose could not be fully achieved. There was a request to develop a technique to obtain an equivalently large time constant by changing the circuit configuration, such as in a field where there is no such thing.
第4図は従来の時定数回路を示す図である。第4図にお
いて、■は信号入力端子、2は信号出力端子、3は接地
端子、4は抵抗素子、5は容量素子を示す。FIG. 4 is a diagram showing a conventional time constant circuit. In FIG. 4, ■ indicates a signal input terminal, 2 indicates a signal output terminal, 3 indicates a ground terminal, 4 indicates a resistive element, and 5 indicates a capacitive element.
抵抗素子4の抵抗値をR1容量素子5の容量値をCとし
、出力端子2と接地端子3との間に発生する出力信号v
、=v、(1−eτ )で示されることは周知である。The resistance value of the resistor element 4 is R1, the capacitance value of the capacitor element 5 is C, and the output signal v generated between the output terminal 2 and the ground terminal 3
, =v, (1-eτ) is well known.
ここてτ=C−Rてあって、この値を時定数という。前
式により1=0のときV。=0であることがか判る。ま
た一定のvIか印加された後の時間経過tに従い、指数
関数により上昇する変化状況を求めるこが出来る。その
ためこの時定数回路は微分回路、積分回路など信号波形
変換回路に多用されている。Here, τ=C−R, and this value is called a time constant. According to the previous formula, when 1=0, V. It can be seen that =0. Further, it is possible to obtain a change state that increases according to an exponential function according to the elapsed time t after a constant vI is applied. Therefore, this time constant circuit is often used in signal waveform conversion circuits such as differentiating circuits and integrating circuits.
第4図の回路を例えば積分回路として使用するときなと
、τの値を極めて太き・:する必要のあるとき、CとR
の値を各別に、或いは両者共に大きくする必要かある。When the circuit in Figure 4 is used as an integrating circuit, for example, when it is necessary to make the value of τ extremely large, C and R
Is it necessary to increase the values for each separately or for both?
そのとき半導体集積回路の基板上に時定数回路を構成し
ていたときなと、素子のサイズを無闇に大きくすること
か出来ず、上限値か定まってしまう欠点かあった。また
半導体素子の製造技術上、CとRの値にばらつきか大き
く、ばらついた値について両者間に相関関係かないため
、正確な値の時定数回路を設計製作することか極めて困
難であった。At that time, when a time constant circuit was constructed on the substrate of a semiconductor integrated circuit, the size of the element could not be increased arbitrarily, and there was a drawback that the upper limit was fixed. Furthermore, due to the manufacturing technology of semiconductor devices, the values of C and R vary widely, and since there is no correlation between the two values, it is extremely difficult to design and manufacture a time constant circuit with accurate values.
本発明の目的は前述の欠点を改善し、抵抗素子・容量素
子自体を格別大きくすることなく、回路構成によって等
価的に大きな値の得られる時定数回路を提供することに
ある。SUMMARY OF THE INVENTION An object of the present invention is to improve the above-mentioned drawbacks and to provide a time constant circuit that can obtain an equivalently large value by changing the circuit configuration without making the resistive element or capacitive element particularly large.
第1図は本発明の原理構成を示す図である。第1図にお
いて、1−1は第1の入力端子、12は第2の入力端子
、2は出力端子、3は接地端子、4は抵抗素子、6は本
発明による時定数回路の容量を全体的に示すもの、7は
回路6における容量素子、8は回路6の信号極性反転増
幅器を示す。FIG. 1 is a diagram showing the basic configuration of the present invention. In FIG. 1, 1-1 is the first input terminal, 12 is the second input terminal, 2 is the output terminal, 3 is the ground terminal, 4 is the resistive element, and 6 is the entire capacitance of the time constant circuit according to the present invention. , 7 is a capacitive element in the circuit 6, and 8 is a signal polarity inversion amplifier in the circuit 6.
第1の入力端子1−1と一端を接続した抵抗素′F4の
他端を容量素子7の一方端と接続し、容量素子7の他方
端を第2の入力端子1〜2に接続し、且つ前記容量素子
の一方端を信号出力端子2とする時定数回路において、
本発明は下記の構成としている。即ち、□″容量素子7
の一方端を信号極性反転増幅器8の入力端子に接続し、
容量素子7の他方端を前記、増幅器8の出力端子と接続
することで構成する。The other end of the resistor element 'F4 whose one end is connected to the first input terminal 1-1 is connected to one end of the capacitive element 7, and the other end of the capacitive element 7 is connected to the second input terminals 1-2, and a time constant circuit in which one end of the capacitive element is the signal output terminal 2,
The present invention has the following configuration. That is, □″capacitive element 7
Connect one end of the signal polarity inverting amplifier 8 to the input terminal of the signal polarity inverting amplifier 8,
The other end of the capacitive element 7 is connected to the output terminal of the amplifier 8 described above.
せ回路によって置換するたとが出来る。 ′〔作用
〕
第1図の回路において、抵抗素子4の出力側で増幅器8
の入力端子における電位の変化と、増幅器8の出力端子
における電位の変化は、丁度逆の関係と・G)の本のと
等しいこととなる。したがって抵抗素子4の抵抗値をR
とするとき、この回路の時定数は(R−C−G)となる
。そのため基板などの上で増幅器8を構成する領域か、
大きな容量(C−G)を形成する領域より小さければ、
基板上の面積を節約できる。It can be replaced by a circuit. ′ [Function] In the circuit shown in FIG. 1, the amplifier 8
The change in the potential at the input terminal of the amplifier 8 and the change in the potential at the output terminal of the amplifier 8 have exactly the opposite relationship and are equal to the book of .G). Therefore, the resistance value of resistance element 4 is R
Then, the time constant of this circuit is (R-C-G). Therefore, the area where the amplifier 8 is configured on the board etc.
If it is smaller than the area that forms a large capacitance (CG),
Saves space on the board.
次に第2図に示すように抵抗素子4を開閉器4Iと容量
素子(容量値C′)との組合せ回路とし、開閉器41の
開閉周波数をf’cとしたとき、抵抗値は等価的に1/
(C’ ・fc)となる。したかってこの回路の時
定数を定める式か(C−G) / (C’fc)となっ
て容量の比のみで表現することが出来る。Next, as shown in Fig. 2, a combination circuit is made of a resistive element 4, a switch 4I, and a capacitive element (capacitance value C'), and when the switching frequency of the switch 41 is f'c, the resistance value is equivalently ni 1/
(C' ・fc). Therefore, the formula for determining the time constant of this circuit is (CG)/(C'fc), which can be expressed only by the ratio of capacitances.
第3図は本発明の実施例の構成を示す図て菖る。 FIG. 3 is a diagram showing the configuration of an embodiment of the present invention.
第3図において、42は容量素子で容量値はCI、43
−1.43−2はトランジスタのような電子スイッチ、
44はインバータ、45は繰り返し周波数fcのパルス
発生器、81.82は演算増幅器で特に前者は電圧ホロ
ーアとして動作させるもの、83.84は抵抗素子で、
素子84の値をrとするとき素子83はG−rの値とし
たもの(ここてGは増幅器82の利得を表す)、電子ス
イッチ43−1.43−2はパルス発生器45の出力に
よって交互にオン・オフされるから、容量素子42との
組合せによって等測的に抵抗素子として動作する。第3
図に示すように構成したとき、抵抗素子として動作する
部分の抵抗値RはR=l/(C1・fc)
容量素子として動作する部分の容量値CはC=02 ・
G
(ここで02は容量素子7の値を表す)このとき時定数
τは
τ=C−R°=(C2・ G)/(C1・fc)比で表
すことか出来る。In Fig. 3, 42 is a capacitive element whose capacitance value is CI, 43
-1.43-2 is an electronic switch like a transistor,
44 is an inverter, 45 is a pulse generator with a repetition frequency fc, 81.82 is an operational amplifier, especially the former operates as a voltage follower, 83.84 is a resistor element,
When the value of the element 84 is r, the element 83 has a value of G-r (here, G represents the gain of the amplifier 82), and the electronic switch 43-1.43-2 is controlled by the output of the pulse generator 45. Since it is turned on and off alternately, in combination with the capacitive element 42, it operates isometrically as a resistive element. Third
When configured as shown in the figure, the resistance value R of the part that operates as a resistive element is R=l/(C1・fc), and the capacitance value C of the part that operates as a capacitive element is C=02.
G (Here, 02 represents the value of the capacitive element 7.) At this time, the time constant τ can be expressed as the ratio τ=C−R°=(C2·G)/(C1·fc).
そしてC,、C2か定まった後は、fcを変えることに
よってτの値を制御できるから、時定数の調整に際して
有効である。After C, C2 are determined, the value of τ can be controlled by changing fc, which is effective in adjusting the time constant.
このようにして本発明によると、時定数が回路を構成す
る容量素子の比で定められるため、精度高い値を得るこ
とか出来る。また時定数の値を変更するとき、容量素子
との接続を開閉する開閉器の開閉周波数を変更すること
て容易に出来る。更にこのような時定数回路を半導体製
造技術により基板上にまとめて構成するときは、大きな
値の時定数を得るとき従来の回路と比較してレイアウト
面積か極めて小さくて済むという効果を有し、且つ容量
素子製造技術においてばらつきか生じても、ばらつきの
傾向か等しいため、正確な時定数値を簡易に設計する二
とか出来る。In this manner, according to the present invention, since the time constant is determined by the ratio of the capacitive elements constituting the circuit, a highly accurate value can be obtained. Furthermore, when changing the value of the time constant, it can be easily done by changing the switching frequency of the switch that opens and closes the connection with the capacitive element. Furthermore, when such time constant circuits are collectively constructed on a substrate using semiconductor manufacturing technology, the layout area can be extremely small compared to conventional circuits when obtaining a large time constant. In addition, even if variations occur in the capacitive element manufacturing technology, the tendency of the variations is the same, so accurate time constant values can be easily designed.
第1図は本発明の原理構成を示す図、
第2図は本発明の他の構成を示す図、
第3図は本発明の実施例の構成を示す図、第4図は従来
の時定数回路を示す図である。
1−イ言号入力端子
2−信号出力端子
3−・・接地端子
・抵抗素子
時定数回路の容量を全体的に示すもの
容量素子
信号極性反転増幅器
特許出願人 富士通株式会社
代 理 人 弁理士 鈴木栄祐
第1図
第2図Fig. 1 is a diagram showing the principle configuration of the present invention, Fig. 2 is a diagram showing another configuration of the present invention, Fig. 3 is a diagram showing the configuration of an embodiment of the present invention, and Fig. 4 is a diagram showing the conventional time constant. It is a diagram showing a circuit. 1-A Word input terminal 2-Signal output terminal 3--Ground terminal/resistance element Overall indication of the capacitance of the time constant circuit Capacitive element signal polarity inversion amplifier Patent applicant Fujitsu Ltd. Representative Patent attorney Suzuki Eisuke Figure 1 Figure 2
Claims (1)
子(4)の他端を容量素子(7)の一方端と接続し、容
量素子(7)の他方端を第2の入力端子(1−2)に接
続し、且つ前記容量素子(7)の一方端を出力端子(2
)とする時定数回路において、 容量素子(7)の一方端を信号極性反転増幅器(8)の
入力端子に接続し、容量素子(7)の他方端を前記増幅
器(8)の出力端子と接続すること を特徴とする時定数回路。 2、請求項第1項記載の時定数回路における抵抗素子を
、他の容量素子と切換端子を接続した開閉器で構成する
ことを特徴とする時定数回路。 3、請求項第2項記載の時定数回路における開閉器を、
周期の可変できる信号により開閉することを特徴とする
時定数回路。[Claims] 1. The other end of a resistive element (4) whose one end is connected to the first input terminal (1-1) is connected to one end of a capacitive element (7), The other end is connected to the second input terminal (1-2), and one end of the capacitive element (7) is connected to the output terminal (2-2).
), one end of the capacitive element (7) is connected to the input terminal of the signal polarity inverting amplifier (8), and the other end of the capacitive element (7) is connected to the output terminal of the amplifier (8). A time constant circuit characterized by: 2. A time constant circuit characterized in that the resistive element in the time constant circuit according to claim 1 is constituted by a switch having a switching terminal connected to another capacitive element. 3. The switch in the time constant circuit according to claim 2,
A time constant circuit characterized by being opened and closed by a signal with a variable period.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19204890A JPH0481014A (en) | 1990-07-20 | 1990-07-20 | Time constant circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19204890A JPH0481014A (en) | 1990-07-20 | 1990-07-20 | Time constant circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0481014A true JPH0481014A (en) | 1992-03-13 |
Family
ID=16284748
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19204890A Pending JPH0481014A (en) | 1990-07-20 | 1990-07-20 | Time constant circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0481014A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06257226A (en) * | 1993-03-09 | 1994-09-13 | Kajima Corp | Joint construction of square steel pipe post or square steel pipe concrete post |
| JP2006145322A (en) * | 2004-11-18 | 2006-06-08 | Ricoh Elemex Corp | Printed circuit board and gas meter |
-
1990
- 1990-07-20 JP JP19204890A patent/JPH0481014A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06257226A (en) * | 1993-03-09 | 1994-09-13 | Kajima Corp | Joint construction of square steel pipe post or square steel pipe concrete post |
| JP2006145322A (en) * | 2004-11-18 | 2006-06-08 | Ricoh Elemex Corp | Printed circuit board and gas meter |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO1981001779A1 (en) | Switched-capacitor elliptic filter | |
| JPH0481014A (en) | Time constant circuit | |
| JPS58131811A (en) | Electric element simulator | |
| CA1162995A (en) | Switched capacitor bilinear resistors | |
| JPS5872271A (en) | Symmetrical integrator | |
| Choubey et al. | CCII based multifunction inverse filter | |
| JPS5923126B2 (en) | Cut-off frequency variable filter | |
| JPH01258188A (en) | Adder | |
| JPS59163903A (en) | Linear amplifier device | |
| JPH0257730B2 (en) | ||
| JPS60136404A (en) | Amplifying circuit | |
| JPS5951609A (en) | Integrated circuit device | |
| JPH0731218B2 (en) | Resistance measuring device | |
| JPH0429247B2 (en) | ||
| JPS62291214A (en) | Switched capacitor filter | |
| JPS6132617A (en) | Semiconductor circuit device | |
| JPH04111520A (en) | Hysteresis circuit | |
| JPS6132609A (en) | switch capacitor amplifier | |
| JP2007049506A (en) | Active filter | |
| JPS62180605A (en) | Clock driver for switched capacitor circuit | |
| JPS628967B2 (en) | ||
| JPS6312402B2 (en) | ||
| JPH01300710A (en) | Multiple circuit | |
| JPS6053482B2 (en) | variable equalizer | |
| JPS5951175B2 (en) | Pulse number integration circuit |