JPH0481299U - - Google Patents
Info
- Publication number
- JPH0481299U JPH0481299U JP12363990U JP12363990U JPH0481299U JP H0481299 U JPH0481299 U JP H0481299U JP 12363990 U JP12363990 U JP 12363990U JP 12363990 U JP12363990 U JP 12363990U JP H0481299 U JPH0481299 U JP H0481299U
- Authority
- JP
- Japan
- Prior art keywords
- storage area
- storage
- programmable rom
- rom
- mask
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 5
- 238000010586 diagram Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 1
Description
第１図は本考案の一実施例のブロツク図、第２
図は第１図の構成を具体的に示した図である。
１……複合ＲＯＭ、１ａ……マスクＲＯＭ、１
ｂ……ＰＲＯＭ、２１……アドレス線、２２……
データ線、２３……ヒユーズ。
Fig. 1 is a block diagram of an embodiment of the present invention;
The figure is a diagram specifically showing the configuration of FIG. 1. 1...Composite ROM, 1a...Mask ROM, 1
b...PROM, 21...Address line, 22...
Data line, 23...fuse.
Claims (1)
記憶領域および当該装置製造後に記憶情報が登録
される第２の記憶領域を１つの半導体チツプ上に
有し、各記憶領域が共通の制御信号によつて制御
されることを特徴とする半導体記憶装置。 (2) 前記第１の記憶領域はマスクＲＯＭによつ
て構成され、前記第２の記憶領域はプログラマブ
ルＲＯＭによつて構成されることを特徴とする実
用新案登録請求の範囲第１項記載の半導体記憶装
置。 (3) 前記マスクＲＯＭはバイポーラマスクＲＯ
Ｍであり、前記プログラマブルＲＯＭはヒユーズ
型プログラマブルＲＯＭであることを特徴とする
実用新案登録請求の範囲第２項記載の半導体記憶
装置。[Claims for Utility Model Registration] (1) In a non-volatile semiconductor memory device, a first storage area in which memory information is registered when the device is manufactured, and a second storage area in which storage information is registered after the device is manufactured. What is claimed is: 1. A semiconductor memory device comprising: on one semiconductor chip, each memory area being controlled by a common control signal. (2) The semiconductor according to claim 1, wherein the first storage area is configured by a mask ROM, and the second storage area is configured by a programmable ROM. Storage device. (3) The mask ROM is a bipolar mask RO.
3. The semiconductor memory device according to claim 2, wherein the programmable ROM is a fuse-type programmable ROM.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12363990U JPH0481299U (en) | 1990-11-27 | 1990-11-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12363990U JPH0481299U (en) | 1990-11-27 | 1990-11-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0481299U true JPH0481299U (en) | 1992-07-15 |
Family
ID=31871334
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12363990U Pending JPH0481299U (en) | 1990-11-27 | 1990-11-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0481299U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005203763A (en) * | 2003-12-19 | 2005-07-28 | Semiconductor Energy Lab Co Ltd | Semiconductor integrated circuit, semiconductor device, and method of manufacturing semiconductor integrated circuit |
-
1990
- 1990-11-27 JP JP12363990U patent/JPH0481299U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005203763A (en) * | 2003-12-19 | 2005-07-28 | Semiconductor Energy Lab Co Ltd | Semiconductor integrated circuit, semiconductor device, and method of manufacturing semiconductor integrated circuit |
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