JPH0481745B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing device that uses a battery to retain the memory contents of a storage unit during a power-off period, and particularly relates to a memory retention battery that detects a voltage drop in the battery. This invention relates to a voltage drop detection circuit.

[Prior Art] In information processing devices such as electronic cash registers, fixed data such as control programs that operate the device is generally stored in ROM (read-only).
(memory), etc., but data input from outside that should be processed is
The data is stored in a volatile storage unit such as RAM (Random Access Memory). Therefore, when the power to the device is cut off, the data stored in the RAM or the like disappears. In order to avoid such a situation, a backup battery is generally attached to the memory section such as the RAM, and when the power is cut off, the battery supplies voltage for memory retention. When the power is turned on again, the drive voltage is supplied from the power supply circuit instead of the battery.
In addition to supplying current to the RAM, the power supply circuit also supplies current to the battery to charge the battery.

[Problems to be Solved by the Invention] However, the following problems still need to be solved even in the information processing device in which the storage contents of the storage unit are retained by the battery during the power cut-off period as described above. It was hot. That is, when a battery is discharged for a long time, the terminal voltage gradually decreases.
When the battery is charged, it returns to the original specified voltage.
Furthermore, since batteries have a shorter lifespan than other components such as electronic components, charging efficiency decreases when used for a long period of time, and the battery may not return to the specified voltage immediately.

Conventional information processing devices have not incorporated a device that directly measures the terminal voltage of the battery. In other words, as mentioned above, during the power-off period, all power supplies are cut off, so there is no way to measure the terminal voltage of the battery, and during the power-on period, the battery is charging, so the terminal voltage of the battery is Even if you measure the voltage, you are only measuring the charging voltage, and it is not the true terminal voltage of the battery. Therefore, since the terminal voltage of the battery cannot be accurately grasped, there is a concern that the terminal voltage of the battery decreases during the power-off period and the memory contents of the RAM are erased.

To avoid this situation, ROM and
A device that stores the same data in a part of the RAM and detects that the two data match in synchronization with power-on, thereby confirming that the memory contents of the RAM have been accurately maintained. is being considered. However, with this device, a drop in battery voltage can only be confirmed when the data no longer match, and at that point the other data stored in the RAM has also disappeared. Therefore, battery voltage drop cannot be detected in advance.

The present invention was developed based on the above circumstances, and its purpose is to detect battery voltage drop in advance by slightly delaying the start of battery charging when the power is turned on. An object of the present invention is to provide a voltage drop selection circuit for a memory retention battery that can prevent the storage contents of the memory from disappearing and improve the reliability of the information processing device.

[Means for Solving the Problems] The voltage drop detection circuit for a memory retention battery of the present invention detects that when the power is turned on, the drive voltage supplied from the power supply circuit for driving each component including the memory section increases to a specified voltage. During the power-on period, drive voltage is supplied from the power supply circuit to the memory section that stores data, and during the power-off period, the memory section is powered up by the battery. In an information processing device in which the contents are retained and the battery is charged from the power supply circuit during the power-on period, a switching circuit that is made conductive by a voltage control signal is inserted in the charging path from the power supply circuit to the battery, and a delay circuit is used. With this, the input time to the voltage control signal switching circuit is delayed for a certain period of time,
The comparison circuit also compares the battery terminal voltage with a predetermined lower limit allowable voltage during the period from the voltage control signal output time to the switching circuit conduction time, and when the terminal voltage falls below the lower limit allowable voltage in this comparison circuit. It is designed to display battery voltage drop.

Further, in addition to the above invention, another invention includes a battery connecting device having a plurality of contacts that become conductive when the battery is connected between the battery and the comparison circuit, and a battery connecting device for setting the lower limit allowable voltage. One end of the voltage dividing resistor is grounded via the contact of the battery connection device, and the other end is connected to the lower limit permissible voltage input terminal of the comparator circuit.

[Function] With the memory retention battery voltage drop detection circuit configured as described above, when the power is turned on and a voltage control signal indicating that the drive voltage supplied from the power supply circuit has increased to the specified voltage is input, The information processing device starts up. Further, the switching circuit inserted in the charging path from the battery power supply circuit becomes conductive after being delayed for a certain period of time from the voltage control signal input time by the delay circuit. Then, the terminal voltage of the battery from the voltage control signal input time to the battery charging start time is compared with the lower limit allowable voltage by the comparison circuit. If the comparison result shows that the terminal voltage is lower than the lower limit allowable voltage, a battery voltage drop is displayed.

In addition to the above-mentioned effects, another aspect of the present invention is that if the battery is disconnected from the battery connection device during the power-on period, one end of the voltage dividing resistor for setting the lower limit permissible voltage will not be grounded. The input voltage at the voltage input terminal increases and becomes higher than the battery terminal voltage input to the other input terminal of the comparison circuit, that is, the battery charging voltage, and the aforementioned battery voltage drop is displayed.

[Example] An example of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram showing a voltage drop detection circuit for a memory retention battery according to an embodiment. In the figure, 1 is a plug connected to a commercial power supply (not shown), and input is input to a power supply circuit 2 through this plug 1. The resulting AC voltage is converted into, for example, a DC +5V drive voltage and supplied to the information processing device main body 3. Further, when the power switch 4 is turned on and the drive voltage of +5V rises to the specified voltage of 5V, a voltage control signal AVC is sent from the power supply circuit 2 to the information processing device main body 3.
When the information processing device main body 3 receives this voltage control signal AVC, it is activated and shifts to an operating state.

The information processing device main body 3 includes, as shown in the figure,
For example, a CPU (Central Processing Unit) 5 that incorporates various arithmetic circuits and the like to execute various information processing tasks, a ROM 6 that stores fixed data such as control programs, and a ROM 6 that inputs various data and control signals and outputs processing results. Temporarily stores variable data such as data input from I/O port 7 of I/O port 7.
It is composed of a RAM 8, a data bus 9, etc., which connect these components to each other.

5V output from the output terminal of the power supply circuit 2
The drive voltage is supplied to the information processing device main body 3, and is also supplied to the voltage input terminal of the RAM 8, which serves as a storage section, via a backflow prevention diode 10. Furthermore, it is supplied via a diode 11 to the emitter of a pnp type switching transistor 12 serving as a switching circuit. Further, the voltage control signal AVC output from the power supply circuit 2 is sent to the information processing device main body 3, and the resistor 1
3, an npn transistor 16 via an integrating circuit formed by a resistor 14 and a capacitor 15.
input to the base of The collector of this transistor 16 is connected to the base of the switching transistor 12 via a resistor 17. Therefore, resistor 14, capacitor 15, transistor 16, and resistor 17 constitute a delay circuit for voltage control signal AVC.

In addition, 18 in the figure is a battery for memory retention,
The (+) terminal of this battery 18 has three contacts a,
(+) contact a of battery connection device 19 with b, c, resistor 20 and diode 21 of the polarity shown
It is connected to the voltage input terminal of the RAM 8 via. Further, the collector of the switching transistor 12 is connected to the connection point between the diode 21 and the resistor 20. Therefore, diode 11, switching transistor 12 and resistor 20 form a charging path from power supply circuit 2 to battery 18.

Further, the (-) terminal of the battery 18 is connected to the (+) side input terminal of the comparator circuit 23 via the (-) contact b of the battery connection device 19 and the voltage dividing resistor 22 for setting the lower limit allowable voltage. It is grounded via another contact c of the battery connection device 19 by means of a short-circuit wire 24 . Note that this shorting line 24 connects the battery 18 to the battery connection device 19.
When the battery 18 is removed from the battery 18, it is removed in synchronization with the removal operation of the battery 18.

The (+) side input terminal of the comparator circuit 23 is connected to the +5V output terminal of the power supply circuit 2 via a resistor 25. When the battery 18 is attached to the battery connection device 19 as shown in the figure, the (-) side input terminal of the comparator circuit 23 has a lower limit tolerance set by the resistor 25 and the voltage dividing resistor 22. Voltage E _R is input. This lower limit allowable voltage E _R is set to a value slightly higher than the limit voltage for retaining the memory contents of the RAM 8. Further, the (-) side input terminal of the comparison circuit 23 is connected to the (+) terminal of the battery 18 via the resistor 26 and the (+) contact a of the battery connection device 19. Furthermore, this comparison circuit 23 operates with a drive voltage of +5V supplied from the power supply circuit 2. The output terminal of the comparator circuit 23 is connected to the +5V output terminal of the power supply circuit 2 via the resistor 27, and is also connected to the input terminal of the I/O port 7 of the information processing device main body 3. Therefore, when the terminal voltage E _B of the battery 18 via the resistor 26 inputted to the (-) side input terminal falls below the lower limit allowable voltage E _R inputted to the (+) side input terminal, the comparator circuit 23 Sends an H level output signal to I/O port 7.

The output terminal of I/O port 7 is connected via resistor 28.
It is connected to the base of an npn type transistor 29, and the collector of this transistor 29 is connected to a light emitting diode (LED) 3 as a voltage drop indicating means.
0, the power supply circuit 2 via the current limiting resistor 31
is connected to the +5V output terminal of the Further, the emitter of the transistor 29 is grounded.

When the CPU 5 of the information processing device body 3 receives the power control signal AVC from the power supply circuit 2, it displays the voltage drop of the battery 18 according to the flowchart of FIG. 2 before starting normal data processing operations. Execute display processing. That is, the power control signal
When AVC becomes H level, the output terminal of I/O port 7 is cleared. Next, I/O port 7
The signal level of the input terminal to which the output signal of the comparison circuit 23 is input is read. If the signal level is H level, it is determined that the terminal voltage E _B of the battery 18 has fallen below the lower limit allowable voltage E _R , and an H level signal is sent from the output terminal of the I/O port 7, and the transistor 29 is made conductive. When the transistor 29 becomes conductive, the light emitting diode (LED)
30 lights up. On the other hand, if the signal level of the input terminal is L level, it is determined to be normal and the process directly proceeds to the main routine.

The operation of the storage battery voltage drop detection circuit configured as described above will be explained below using the time chart shown in FIG. That is, before the power switch 4 is turned on at time t ₀ , the +5V driving voltage is not supplied from the power supply circuit 2 , so the memory is stored from the battery 18 to the voltage input terminal of the RAM 8 via the resistor 20 and the diode 21 . voltage E _C is supplied. Further, the terminal voltage of the battery 18 is inputted to the (-) side input terminal of the comparator circuit 23 via a resistor 26. Therefore, in this state, the battery 18 is in a discharged state. When the power switch 4 is turned on at time t ₀ ,
The drive voltage output from the power supply circuit 2 starts to rise. Then, at time t ₁ after a certain period of time has elapsed, the voltage value of the drive voltage becomes the memory retention voltage due to the battery 18.
When E _C is exceeded, the diode 10 becomes conductive and the diode 21 becomes reverse biased, so that the increasing drive voltage from the power supply circuit 2 is applied to the voltage input terminal of the RAM 8 . Then, the memory holding voltage E _C from the battery 18 is cut off by the diode 21 .

Furthermore, after time has elapsed, at time _t2 , power supply circuit 2
When the drive voltage output from reaches the regular 5V,
Comparison circuit 23 starts normal operation. Furthermore, 5V is applied from the power supply circuit 2 to the resistor 25 and voltage dividing resistor 22.
, the terminal voltage of the (+) side input terminal of the comparator circuit 23 becomes the normal lower limit allowable voltage _ER . As a result, the comparison circuit 23 sends an L level output signal to the input terminal of the I/O port 7.

At time _t3 after a certain grace period has elapsed after the drive voltage reached the regular 5V, the voltage control signal AVC at H level is output from the power supply circuit 2. The information processing device main body 3 receives the input time t ₃ of this voltage control signal AVC.
Start in sync with. When the information processing device main body 3 is started at time _t3 , the CPU 5 executes the flowchart shown in FIG.
0 is never lit.

Also, at time _t3 , the voltage control signal AVC at H level
When is output, the capacitor 15 of the integrating circuit starts charging, and the transistor 16 becomes conductive after a certain period of time, that is, at time _t4 after a certain delay time _T1 has elapsed. When transistor 16 becomes conductive, switching transistor 12 becomes conductive. Therefore,
Since the drive voltage of 5V is higher than the memory retention voltage E _C by the battery 18, the voltage control signal AVC output time
A charging voltage is applied to the battery 18 from the power supply circuit 2 via the switching transistor 12 from time t ₄ after a certain delay time T ₁ has elapsed from t ₃ . Therefore, the battery 18 is in a charged state after time _t4 .

When the battery 18 starts charging at time _t4 ,
Battery 1 is connected to the (-) side input terminal of the comparator circuit 23.
In place of the terminal voltage E _B of 8, a charging voltage is applied from the power supply circuit 2 via the resistor 20. Since this charging voltage is naturally higher than the lower limit allowable voltage _ER , the output signal of the comparator circuit 23 never becomes H level.

Next, power switch 4 discharges battery 1 during the cut-off period.
When _the terminal voltage E _B through the resistor 26 of No. 8 falls below the lower limit allowable voltage E _R , the comparator circuit ₂₃
The voltage applied to the (-) side input terminal of the comparator circuit 23 is smaller than the voltage applied to the (+) side input terminal.
sends an H level output signal to the input terminal of I/O port 7. Therefore, when the information processing device main body ₃ is started at time t3, the input terminal of the I/O port 7 is at level, so the light emitting diode 30
lights up.

The period from time t ₃ when the power switch 4 is turned on and the voltage control signal AVC indicating that the drive voltage has increased to the normal 5V is input until the delay time T ₁ set in the delay circuit elapses. By stopping the charging operation from the power supply circuit 2 to the battery 18, it is possible to determine whether the terminal voltage E _B of the battery 18 has decreased below the lower limit allowable voltage E _R by checking the lighting state of the light emitting diode 30. It is possible to confirm. By setting this lower limit allowable voltage E _R to a value slightly higher than the storage retention limit voltage of the RAM 8, it is possible to confirm a voltage drop in the battery 18 in advance. If this battery voltage drop is confirmed, it is possible to take measures such as extending the charging time or replacing the battery 18, so it is possible to reliably protect the stored contents of the memory unit such as the RAM 8, etc. The reliability of the entire information processing device can be improved.

Furthermore, if the battery 18 is removed from the battery connection device 19 for inspection or repair while the power switch 4 is turned on and the information processing device main body 3 is in operation, the shorting wire 24 is removed at the same time. One end of the voltage dividing resistor 22 will be separated from ground. As a result, the potential of the (+) side input terminal of the comparator circuit 23 becomes +
Since the voltage rises to 5V, the output signal of the comparison circuit 23 becomes H level. Therefore, the light emitting diode 30
lights up.

In this way, during the power-on period, when the battery 18 is removed from the battery connection device 19, the light emitting diode 30 lights up immediately, confirming that the battery 18 has been removed. It is possible to prevent the power switch 4 from being shut off as much as possible. Therefore, as described above, it is possible to further improve the reliability of the entire device.

[Effects of the Invention] As explained above, according to the present invention, the start of battery charging when the power is turned on is slightly delayed. Therefore, a battery voltage drop can be detected in advance, content stored in the storage section can be prevented from disappearing, and the reliability of the information processing device can be improved.

Furthermore, if the battery is removed during the power-on period, a message indicating that the battery has been removed is displayed, making it possible to further improve the reliability.

[Brief explanation of the drawing]

The figure shows a voltage drop detection circuit for a memory retention battery according to an embodiment of the present invention.
The figure is an overall circuit diagram, FIG. 2 is a flowchart showing the operation, and FIGS. 3 and 4 are time charts showing the operation. 2... Power supply circuit, 3... Information processing device main body, 4
...Power switch, 5...CPU, 7...I/O
Port, 8...RAM (storage unit), 10, 11, 2
1... Diode, 12... Switching transistor, 16, 29... Transistor, 18...
Battery, 19... Battery connection device, 22...
Voltage dividing resistor, 23... Comparison circuit, 24... Short circuit wire,
30... Light emitting diode (voltage drop display means).

Claims (1)

[Claims] 1. Started in synchronization with the input time of a voltage control signal indicating that the drive voltage for driving each component including the storage unit supplied from the power supply circuit when the power is turned on has increased to a specified voltage, During the power-on period, the drive voltage is supplied from the power supply circuit to the storage section that stores data, and during the power-off period, the storage contents of the storage section are held by the battery, and further during the power-on period, the drive voltage is supplied from the power supply circuit to the storage section that stores data. In an information processing device configured to charge the battery from a circuit, the battery is inserted into a charging path from the power supply circuit to the battery,
a switching circuit that is turned on by the voltage control signal; a delay circuit that delays the input time of the voltage control signal to the switching circuit for a certain period of time; A comparison circuit that compares a battery terminal voltage with a predetermined lower limit allowable voltage, and a voltage drop display means that displays a battery voltage drop when the terminal voltage falls below the lower limit allowable voltage in this comparison circuit. A voltage drop detection circuit for a memory retention battery. 2. It is activated in synchronization with the input time of a voltage control signal indicating that the drive voltage that drives each component including the storage unit supplied from the power supply circuit when the power is turned on has increased to a specified voltage, and the The drive voltage is supplied from the power supply circuit to the storage section that stores data, the storage contents of the storage section are held by the battery during the power-off period, and the battery is further charged from the power supply circuit during the power-on period. In the information processing device, the battery is inserted into a charging path from the power supply circuit to the battery;
a switching circuit that is turned on by the voltage control signal; a delay circuit that delays the input time of the voltage control signal to the switching circuit for a certain period of time; a comparison circuit that compares a battery terminal voltage with a predetermined lower limit allowable voltage; a voltage drop display means that displays a battery voltage drop when the terminal voltage falls below the lower limit allowable voltage in the comparison circuit; a battery connection device that is inserted between a battery and the comparison circuit and has a plurality of contacts that become conductive when the battery is connected; one end is grounded through the contact of the battery connection device; A voltage drop detection circuit for a memory holding battery, comprising a voltage dividing resistor for setting a lower limit allowable voltage, the end of which is connected to the lower limit allowable voltage input terminal of the comparison circuit.