JPH0481862B2 - - Google Patents

Info

Publication number
JPH0481862B2
JPH0481862B2 JP59094077A JP9407784A JPH0481862B2 JP H0481862 B2 JPH0481862 B2 JP H0481862B2 JP 59094077 A JP59094077 A JP 59094077A JP 9407784 A JP9407784 A JP 9407784A JP H0481862 B2 JPH0481862 B2 JP H0481862B2
Authority
JP
Japan
Prior art keywords
plating
package
nickel
electroless nickel
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59094077A
Other languages
Japanese (ja)
Other versions
JPS60236251A (en
Inventor
Toshihisa Yoda
Hiroo Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP59094077A priority Critical patent/JPS60236251A/en
Publication of JPS60236251A publication Critical patent/JPS60236251A/en
Publication of JPH0481862B2 publication Critical patent/JPH0481862B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10Containers or parts thereof
    • H10W76/12Containers or parts thereof characterised by their shape
    • H10W76/13Containers comprising a conductive base serving as an interconnection
    • H10W76/132Containers comprising a conductive base serving as an interconnection having other interconnections through an insulated passage in the conductive base
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/20Conductive package substrates serving as an interconnection, e.g. metal plates
    • H10W70/24Conductive package substrates serving as an interconnection, e.g. metal plates characterised by materials

Landscapes

  • Chemically Coating (AREA)

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明は半導体装置用パツケージに関し、一層
詳細には、無電解ニツケル−リンめつきの上に無
電解ニツケル−ボロンめつきを施すことによつ
て、耐蝕性、耐熱性、はんだ付性に優れ、しかも
安価に提供しうる半導体装置用パツケージに関す
るものである。 第1図はいわゆるTO型パツケージを示す。
TO型パツケージは鉄、鉄−ニツケル−コバルト
合金等を素材とする金属外環10に、鉄−ニツケ
ル合金、鉄−ニツケル−コバルト合金等を素材と
するリード線12がガラス14によつて絶縁して
植立され、また同じく鉄−ニツケル合金、鉄−ニ
ツケル−コバルト合金等を素材とするアースリー
ド線(図示せず)が必要により金属外環10に固
着される構造を有している。 そしてこのTO型パツケージには適当な機能め
つきが施されるとともに、金属外環10上には半
導体素子(図示せず)が銀ペースト、金共晶合金
等によつてろう付けされ、また、この半導体素子
とリード線12先端とは金属細線(ワイヤ)によ
つて電気的に接続され、さらに半導体素子と内部
リード線等を覆つて蓋体(図示せず)が固着され
て半導体素子が気密封止されて半導体装置として
供されるものである。 この半導体装置は外部リード線が接続端子には
んだ付け等されて使用される。 上記のような製造工程を経ることから、TO型
パツケージに施される前述の機能めつきは、単に
耐蝕性が要求されるのみならず、各製造段階、使
用段階に要求される機能を発揮するものでなけれ
ばならない。 すなわち、半導体素子を金属外環10上にろう
付けする工程は350〜500℃の高温で行われるか
ら、高温で変色しないなど耐熱性を有するもので
なければならず、また、前記のように外部リード
線がはんだ付けして用いられることから、はんだ
濡れ性のよいめつきでなければならない。 さらに、所期の耐蝕性を呈するためには、所定
のめつき厚さが要求される。 従来一般的な機能めつきとしては、金めつきあ
るいは無電解ニツケル−リンめつきが知られてい
る。 金めつきはこのような機能めつきとして、耐熱
性、はんだ付け性等にきわめて優れているもので
あるが、全面金めつきはもちろんのこと、部分金
めつきであつても高価なことが難点である。 また無電解ニツケル−リンめつきは、安価に所
定めつき厚のめつき層を形成できるために実際に
使用されているが、耐熱性、はんだ付け性に劣る
難点があり、耐熱性、はんだ付け性を犠牲にして
使用しているのが実情である。 本発明は上記難点に鑑みてなされたものであ
り、その目的とするところは、耐熱性、はんだ付
け性にきわめて優れ、しかも安価に所定めつき厚
さのめつき層が形成される半導体装置用パツケー
ジを提供するにある。 その特徴は、素子付部、リード部等にニツケル
めつきを施す半導体装置用パツケージにおいて、
該パツケージの表面を形成するニツケルめつきの
露出部分に、無電解ニツケル−リンめつきを施
し、この無電解ニツケル−リンめつき皮膜の上に
無電解ニツケル−ボロンめつきを施して成るとこ
ろにある。 以下本発明の実施例を詳細に説明する。 第2図はTO−8型パツケージを示す。各部材
は第1図のものと同一であるので同一符号をもつ
て示す。 まず金属外環10には通常の方法によつて5〜
8μmの厚さで電解ニツケルめつき皮膜16を形
成する。リード線12にもガラスとの濡れ性を向
上させるため電解ニツケル皮膜を形成し(必ずし
も施さなくてもよい)、通常のごとく、金属外環
10に設けた透孔を挿通してガラス14によつて
絶縁して植立する。 次に無電解ニツケル−リンめつき皮膜18を、
金属外環10およびリード線12上全面に、2〜
4μmの厚さで形成し、さらにこの無電解ニツケ
ル−リンめつき皮膜18の上に、0.1〜3μm程の
厚さで無電解ニツケル−ボロンめつき皮膜20を
形成する。無電解ニツケル−ボロンめつき皮膜2
0の厚さは0.1〜1μm程度でも充分に耐熱性、は
んだ付け性を向上させることができる。なお3μ
m以上になるとめつき皮膜の硬度が高いことか
ら、機械的応力によつてクラツクが発生して好ま
しくない。 表1、2に、本発明構成と方法並びに従来構成
と方法にて同一形状のパツケージを作成したとき
の、熱処理後の外観結果(表1)、はんだ濡れ性
試験結果(表2)を示す。
The present invention relates to a package for semiconductor devices, and more particularly, it has excellent corrosion resistance, heat resistance, and solderability by applying electroless nickel-boron plating on top of electroless nickel-phosphorus plating. The present invention relates to a package for semiconductor devices that can be provided at low cost. Figure 1 shows a so-called TO type package.
The TO type package has a metal outer ring 10 made of iron, iron-nickel-cobalt alloy, etc., and a lead wire 12 made of iron-nickel alloy, iron-nickel-cobalt alloy, etc., insulated by glass 14. A ground lead wire (not shown) made of iron-nickel alloy, iron-nickel-cobalt alloy, or the like is fixed to the metal outer ring 10 if necessary. Appropriate functional plating is applied to this TO type package, and a semiconductor element (not shown) is brazed onto the metal outer ring 10 using silver paste, gold eutectic alloy, etc. The semiconductor element and the tip of the lead wire 12 are electrically connected by a thin metal wire (wire), and a lid (not shown) is fixed to cover the semiconductor element and the internal lead wire, etc., so that the semiconductor element is protected from the air. It is sealed and used as a semiconductor device. This semiconductor device is used with external lead wires soldered to connection terminals. Due to the manufacturing process described above, the above-mentioned functional plating applied to TO type packages not only requires corrosion resistance, but also performs the functions required at each manufacturing and usage stage. It has to be something. That is, since the process of brazing the semiconductor element onto the metal outer ring 10 is carried out at a high temperature of 350 to 500°C, it must be heat resistant such as not discoloring at high temperatures. Since the lead wires are soldered, the plating must have good solder wettability. Furthermore, in order to exhibit the desired corrosion resistance, a certain plating thickness is required. Gold plating or electroless nickel-phosphorus plating is conventionally known as general functional plating. Gold plating is a functional plating with excellent heat resistance, solderability, etc., but even full-scale gold plating, as well as partial gold plating, can be expensive. This is a difficult point. In addition, electroless nickel-phosphorus plating is actually used because it can form a plating layer of a predetermined thickness at low cost, but it has the disadvantage of being inferior in heat resistance and solderability. The reality is that it is used at the expense of sexuality. The present invention has been made in view of the above-mentioned difficulties, and its purpose is to provide a semiconductor device with excellent heat resistance and solderability, and in which a plating layer of a predetermined thickness can be formed at low cost. We provide package packages. The feature is that in semiconductor device packages where element attachment parts, lead parts, etc. are plated with nickel,
Electroless nickel-phosphorus plating is applied to the exposed portion of the nickel plating forming the surface of the package, and electroless nickel-boron plating is applied on the electroless nickel-phosphorus plating film. . Examples of the present invention will be described in detail below. Figure 2 shows the TO-8 type package. Each member is the same as that in FIG. 1 and is designated by the same reference numeral. First, the metal outer ring 10 is coated with 5~
An electrolytic nickel plating film 16 is formed with a thickness of 8 μm. An electrolytic nickel film is also formed on the lead wire 12 in order to improve its wettability with the glass (this does not necessarily have to be applied), and the lead wire 12 is inserted through the through hole provided in the metal outer ring 10 and attached to the glass 14 as usual. Insulate and plant. Next, electroless nickel-phosphorus plating film 18 is applied.
2 to 2 on the entire surface of the metal outer ring 10 and lead wire 12.
On this electroless nickel-phosphorus plating film 18, an electroless nickel-boron plating film 20 is formed to a thickness of about 0.1 to 3 μm. Electroless nickel-boron plating film 2
A thickness of about 0.1 to 1 μm can sufficiently improve heat resistance and solderability. In addition, 3μ
If it is more than m, the hardness of the plating film will be high, and cracks will occur due to mechanical stress, which is not preferable. Tables 1 and 2 show the appearance results after heat treatment (Table 1) and the solder wettability test results (Table 2) when packages of the same shape were created using the configuration and method of the present invention and the conventional configuration and method.

【表】【table】

【表】 ロジンフラツクス使用
表1から明らかなように、本発明にてなるパツ
ケージは熱処理後に対し充分な耐熱性を有するに
対し、従来構成にてなるパツケージは100%もの
耐熱不良となつた。 また、表2から明らかなように、本発明にてな
るパツケージは従来構成にてなるパツケージと比
較して、はんだ濡れ性に対しても優れていること
がわかる。 本発明は上記のTO型パツケージに限定され
ず、ニツケルめつきを使用しているパツケージの
耐熱性、はんだ付け性を望むパツケージであれば
適用しうることはもちろんである。 以上のように本発明に係る半導体装置用パツケ
ージによれば、耐熱性、はんだ付け性に優れてい
るものの、硬くクラツクが発生し易い無電解ニツ
ケル−ボロンめつきを、クラツクが発生し難い薄
層めつきとすることができ、かつ、無電解ニツケ
ル−ボロンめつきの下地めつきとして施される無
電解ニツケル−リンめつきによつて所期のめつき
厚さとすることができる。 その結果、半導体用パツケージに金めつきを施
すことなく耐熱性、はんだ付け性、耐蝕性に優れ
ためつき層を形成できるため、安価な半導体用パ
ツケージを提供できる。 以上本発明につき好適な実施例を挙げて種々説
明したが、本発明はこの実施例に限定されるもの
ではなく、発明の精神を逸脱しない範囲内で多く
の改変を施し得るのはもちろんのことである。
[Table] Use of rosin flux As is clear from Table 1, the package of the present invention has sufficient heat resistance after heat treatment, whereas the package of the conventional structure had 100% poor heat resistance. Furthermore, as is clear from Table 2, it can be seen that the package according to the present invention is also superior in solder wettability compared to the package having the conventional structure. It goes without saying that the present invention is not limited to the above-mentioned TO type package, but can be applied to any package that requires the heat resistance and solderability of a package using nickel plating. As described above, according to the semiconductor device package according to the present invention, electroless nickel-boron plating, which has excellent heat resistance and solderability but is hard and easily causes cracks, can be replaced with a thin layer that does not easily cause cracks. The desired plating thickness can be obtained by electroless nickel-phosphorus plating, which is applied as a base plating for electroless nickel-boron plating. As a result, it is possible to form a tamping layer with excellent heat resistance, solderability, and corrosion resistance without gold plating the semiconductor package, thereby making it possible to provide an inexpensive semiconductor package. Although the present invention has been variously explained above with reference to preferred embodiments, the present invention is not limited to these embodiments, and it goes without saying that many modifications can be made without departing from the spirit of the invention. It is.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のTO型パツケージを示す断面
図、第2図は本発明に係る半導体装置用パツケー
ジの一実施例を示す断面図である。 10……金属外環、12……リード線、14…
…ガラス、16……電解めつき皮膜、18……無
電解ニツケル−リンめつき皮膜、20……無電解
ニツケル−ボロンめつき皮膜。
FIG. 1 is a sectional view showing a conventional TO type package, and FIG. 2 is a sectional view showing an embodiment of a package for a semiconductor device according to the present invention. 10... Metal outer ring, 12... Lead wire, 14...
...Glass, 16... Electrolytic plating film, 18... Electroless nickel-phosphorus plating film, 20... Electroless nickel-boron plating film.

Claims (1)

【特許請求の範囲】 1 素子付部、リード部等にニツケルめつきを施
す半導体装置用パツケージにおいて、 該パツケージの表面を形成するニツケルめつき
の露出部分に、無電解ニツケル−リンめつきを施
し、 この無電解ニツケル−リンめつき皮膜の上に無
電解ニツケル−ボロンめつきを施して成る半導体
装置用パツケージ。
[Scope of Claims] 1. In a package for a semiconductor device in which element attachment parts, lead parts, etc. are plated with nickel, electroless nickel-phosphorus plating is applied to the exposed part of the nickel plating forming the surface of the package, This semiconductor device package is made by applying electroless nickel-boron plating on this electroless nickel-phosphorus plating film.
JP59094077A 1984-05-10 1984-05-10 Package for semiconductor device Granted JPS60236251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59094077A JPS60236251A (en) 1984-05-10 1984-05-10 Package for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59094077A JPS60236251A (en) 1984-05-10 1984-05-10 Package for semiconductor device

Publications (2)

Publication Number Publication Date
JPS60236251A JPS60236251A (en) 1985-11-25
JPH0481862B2 true JPH0481862B2 (en) 1992-12-25

Family

ID=14100425

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59094077A Granted JPS60236251A (en) 1984-05-10 1984-05-10 Package for semiconductor device

Country Status (1)

Country Link
JP (1) JPS60236251A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6487940B2 (en) * 2014-11-27 2019-03-20 国立研究開発法人産業技術総合研究所 Semiconductor package and manufacturing method thereof

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5149578A (en) * 1974-10-25 1976-04-28 Hitachi Ltd KINZOKUJOKIHODENTO
JPS5258467A (en) * 1975-11-10 1977-05-13 Shinko Electric Ind Co Electronic parts package
JPS5992598A (en) * 1982-11-18 1984-05-28 鳴海製陶株式会社 Ceramic substrate for carrying electronic part

Also Published As

Publication number Publication date
JPS60236251A (en) 1985-11-25

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