JPH0481938A - Information processing system - Google Patents

Abstract

PURPOSE:To prevent the hindrance from occurring in evaluation of the whole system by providing a function for turning back a communication from a diagnostic processor as a desired reply communication by a system controller. CONSTITUTION:At the time of evaluating a processing program executed by a diagnostic processor 6 by a constitution of only the diagnostic processor 6 and a system controller 1, in the case a communication processing to the other processor is contained in its processing, the diagnostic processor 6 sets a flip-flop 150 prior to execution of the processing, and also, sets reply communication data of a communication used in the processing, prepared in advance to a register 140 and actuates the execution of the processing program. In such a state, when a communication request is executed in the processing program, the reply communication data thereto is returned artificially to the diagnostic processor 6, and the subsequent program can be executed. In such a way, even by an insufficient system constitution, the whole system can be sufficiently evaluated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing system having a diagnostic processor capable of inter-processor communication involving data, and particularly relates to an information processing system suitable for evaluating the communication function of the diagnostic processor. .

[Prior Art] The role of the diagnostic processor includes system failure handling, execution control of the diagnostic processor, initial settings, etc., but the functions provided to achieve these tasks increase the scale of the system. It tends to increase over time. For example, when a system becomes multi-processor, an inter-processor communication function is required to notify a normal processor of information about a faulty block, and when performing dynamic functional tests on processors,
A main memory access function is required to load the program into main memory and read the test results from main memory, and an inter-processor communication function is also required to notify the processor of instructions to execute the diagnostic program. .

When the above-described inter-processor communication function and main memory access function are provided in a diagnostic processor, they are often realized through a system control device such as an arithmetic processor or an input/output processor. Therefore, when evaluating a diagnostic processor at the system trial stage, there are processes that include inter-processor communication and main memory access, so even when evaluating a diagnostic processor, in addition to the system control unit, the main memory, arithmetic processor, input/output, etc. Requires a processor.

[Problems to be Solved by the Invention] As described above, in a conventional information processing system having a diagnostic processor with an inter-processor communication function, when performing a prototype evaluation of a diagnostic processor, processing using inter-processor communication is difficult. , Since inter-processor communication cannot be achieved only with the diagnostic processor and system control unit, evaluation must be postponed until the arithmetic processor and input/output processor are available, which delays the discovery of design errors and prevents evaluation of the entire system. There is a major drawback in that it can cause problems.

[Means for Solving the Problems] The present invention provides an information processing system including a diagnostic processor capable of communicating data with an arithmetic processor and an input/output processor via a system control device, wherein the diagnostic processor a communication return means for returning a communication request sent from a computer to an arbitrary arithmetic processor or an input/output processor within the system control device and sending a pseudo reply communication back to the diagnostic processor; and when the return means is effective, the arithmetic The present invention is characterized in that it includes a data replacement means that allows data to be replaced so that data set in advance by the processor becomes data for pseudo-reply communication.

[Example code] Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a system configuration diagram of an information processing system including an embodiment of the present invention.

In FIG. 1, a system control device 1 includes a main storage device 2. Arithmetic processor 3. Arithmetic processor 41 input/output processor 5 and diagnostic processor 6 are connected to signal line L1, respectively.
2 to L16, and the arithmetic processor 3. Arithmetic processor 4. The configuration is such that inter-processor communication and main memory access between the input/output processor 5 and the diagnostic processor 6 can be realized via the system control device 1.

Although peripheral devices are not shown in FIG. 1, at least the main system is a completed configuration, and if a prototype evaluation can be carried out with this configuration, the evaluation should proceed without any problems. However, in reality, devices and processors are designed with a limited number of personnel and assembled on a limited production line, and evaluations cannot proceed efficiently unless a system evaluation is performed after a unit evaluation. Therefore, it is rare for large-scale information processing systems in particular to have all devices and processors available at the beginning of prototype evaluation. Therefore, the initial configuration of the information processing system shown in FIG. 1 for prototype evaluation is often the configuration shown in FIG. 2.

FIG. 2 shows the configuration of the information processing system shown in FIG. 1 at the time of prototype evaluation. That is, the main storage device 2. in FIG. Arithmetic processor 3. Arithmetic processor 4. The input/output processor 5 and the signal lines L12 to L15 connecting them to the system control device 1 are not present, and only the system control device 11, the diagnostic processor 6, and the signal line L16 are present.

There are reasons to start the evaluation with such a configuration; first, it is appropriate to first evaluate the diagnostic processor 6, which is in charge of system initial settings, diagnostic program execution control, and fault handling; Second, the system control device 1 that controls the operation of the entire system includes arithmetic processors 3, 4 .
There is a desire to evaluate the input/output processor 5 and the main memory 2 in advance.

FIG. 3 is a block diagram showing an embodiment of the present invention in which the configuration shown in FIG. 2 can also perform pseudo inter-processor communication processing on the diagnostic processor θ. In Figure 3, the signal line L
131. L141. L151 is the signal line L13. shown in FIG. L14. A calculation processor 3°, a calculation processor 4. Input/output processor 5 and inter-processor communication control circuit 10 in system control device 1
This is the internal wiring of the system control device 1 of the signal line group connecting 0 to 0. FIG. 3 shows an arithmetic processor 3.
Since this is the initial configuration for prototype evaluation without the arithmetic processor 4 and input/output processor 5, the signal line L131. L
141 and L151 do not show external wiring of the system control device 1.

The inter-processor communication control circuit 100 includes an arithmetic processor 3
．． Arithmetic processor 4. This circuit controls communication between the input/output processor 5 and the diagnostic processor 6, but in the configuration shown in FIG. 3, it is only possible to receive communication requests sent from the diagnostic processor 6 to other processors. It is.

The signal line L160 is a signal line for a communication request instruction signal transmitted by the diagnostic processor 6 to other processors.

The signal line L161 is connected to the signal line L161 by the diagnostic processor 6.
This is a data line for communication data (or reply communication data) sent out in synchronization with.

The signal line L162 is a signal line for a communication request instruction signal to the diagnostic processor 6.

The signal line L163 is a data line for communication data (or reply communication data) sent to the diagnostic processor 6 in synchronization with the signal line L162.

The data formats of the communication data (reply communication data) transferred by the signal lines L161 and Li2S are both shown in FIG. 4, and are common not only to the diagnostic processor 6 but also to other processors. Looking at FIG. 4, it can be seen that the communication data has a length of 32 bits, the communication destination and communication source processor numbers are each 4 bits, and the communication instruction data is 24 bits. As shown in FIG. If the arithmetic processor 4 and the input/output processor 5 are connected, for example, in communication from the diagnostic processor 6 to the arithmetic processor 4, the communication destination processor number:
(0001)B, communication source processor number = (1000
) The communication data of B is sent from the diagnostic processor 6 to the arithmetic processor 4 via the system control device 1, and after the arithmetic processor 4 decodes and processes the communication instruction data, the communication destination processor number = (1000) B, the communication source processor Number = (
0001) B's reply communication data is sent back to the diagnostic processor 6 via the system control device 1.

The signal line L164 is a control line through which the diagnostic processor 6 sets or resets the flip-flop 150 inside the system control device 1.

The signal line L165 is a data line through which the diagnostic processor 6 sets data in the register 140 inside the system control device 1.

The flip-flop 150 is a flip-flop that can be set when evaluating the processing processor executed by the diagnostic processor 6 in the system configuration shown in FIG. 2. When the processing processor to be evaluated includes communication processing to other processors, Set to “1”. flip flop 150
The output of the AND circuit 11 inside the system control device 1
0. It is input to AND circuit 111 and selector 130.

The AND circuit 110 is a two-man powered AND circuit, and when the flip-flop 150 is "0", the signal on the signal line L160 is output to the signal line L170 and sent to the interprocessor communication control circuit 100. Therefore, the flip-flop 150 is “
When set to 1'', the communication request instruction signal from the diagnostic processor 6 is not sent to or output from the inter-processor communication control circuit 100.

The AND circuit 111 is also a two-person AND circuit, and outputs the signal on the signal line L160 to the signal line L173 when the flip-flop 150 is "1".

The signal line L171 is a signal line for a communication request instruction signal that the inter-processor communication control circuit 100 outputs to the diagnostic processor 6.

The OR circuit 120 connects the signal line L173 and the signal line L17.
This is an OR circuit for outputting an OR signal of the signals above 1 to the signal line L162. Therefore, the signal line L162 receives not only a communication request instruction signal from the inter-processor communication control circuit 100, but also information when the diagnostic processor 6 issues a communication request to another processor when the flip-flop 150 is "1". , the communication request instruction signal returned by the system control device 1 is output.

The signal line L172 is a signal line through which the inter-processor communication control circuit 100 outputs communication data to the diagnostic processor 6 in synchronization with the communication request instruction signal on the signal line L171.

The selector 130 connects the signal on the signal line L172 and the signal line Li.
This selector inputs the output of the register 140 on the 2S and selects and outputs the contents of the flip-flop 150. When the flip-flop 150 is “0”, the signal line L17
The contents of 2 are selected and output, and the flip-flop 150 becomes “
1'', the contents of the signal line L175, that is, the contents of the register 140, are selectively output.

Data is set in the register 140 by the diagnostic processor 6 when the flip-flop 150 is set to "1", and the data format is the same as the reply communication data shown in FIG.

Regarding the internal circuit of the system control device 1 explained above,
Its usage and operation will be explained next. When evaluating a processing program executed by the diagnostic processor 6 in a configuration including only the diagnostic processor 6 and the system control device 1 as shown in FIG. 3, if the processing includes communication processing to other processors, The diagnostic processor 6 sets a flip-flop 150 prior to execution of processing, and further sets reply communication data for communication used in the processing prepared in advance in the register 140 to start execution of the processing program. When a communication request is executed in the processing program, reply communication data in response to the request is sent back to the diagnostic processor 6 in a pseudo manner, allowing subsequent execution of the program. To explain with a specific example, when the diagnostic processor 6 evaluates a diagnostic program that includes a process of making a communication request for an internal status update request of the input/output processor 5, when the input/output processor 5 receives a communication requesting an internal status update, If it is known in advance that there are only two types of reply communication data to be sent back: normal update completion and update failure, the diagnostic processor 6 sets the flip-flop 150 before executing the diagnostic program, and then stores the data in the register 140. Communication destination processor number = (1000)B, communication source processor number = (0
100) and reply communication instruction data = (normal update completion code) data to start execution of the diagnostic program. If a communication requesting an internal status update to the input/output processor 5 is issued in the diagnostic program, it will be processed as if the reply communication of the normal update completion code set in the register 140 had been received from the input/output processor 5. The diagnostic processor 6 then receives the message and can execute the subsequent program according to the contents of this reply communication data.

Further, if the content set in the register 140 in the same procedure is reply communication instruction data=(update failure code), then after receiving the reply communication, it is possible to execute a subsequent program according to the contents of this reply communication data.

[Effects of the Invention] As explained above, the present invention has a function for returning communication from the diagnostic processor as a desired reply communication in the system control device. Even in an insufficient system configuration in which there is no processor to which the processor communicates, a significant effect is achieved in that the program including the communication processing of the diagnostic processor can be sufficiently evaluated.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the configuration at the time of system evaluation of an information processing system including an embodiment of the present invention, FIG. 2 is a diagram showing the configuration at the time of prototype evaluation of the information processing system including an embodiment of the present invention, FIG. 3 is a block diagram showing an embodiment of the present invention, and FIG. 4 is a diagram showing the data format of processor open communication data used in the information processing system shown in FIGS. 1 to 3. 1... System control device, 2... Main storage device, 3.
4... Arithmetic processor, 5... Input/output processor,
6... Diagnostic processor, 100... Inter-processor communication control circuit, 110, 111... AND circuit, 120
...OR circuit, 130...selector, 140...
Register, 150...Flip-flop.

Claims (1)

[Scope of Claims] An information processing system including a diagnostic processor capable of communicating with data between an arithmetic processor and an input/output processor via a system control device, wherein any arithmetic processor or input communication return means for returning a communication request sent to the output processor within the system control device and sending a pseudo-reply communication back to the diagnostic processor; 1. An information processing system comprising: replacement means that allows data to be replaced so that it becomes data of a pseudo-reply communication.