JPH0482184B2 - - Google Patents

Info

Publication number
JPH0482184B2
JPH0482184B2 JP61273280A JP27328086A JPH0482184B2 JP H0482184 B2 JPH0482184 B2 JP H0482184B2 JP 61273280 A JP61273280 A JP 61273280A JP 27328086 A JP27328086 A JP 27328086A JP H0482184 B2 JPH0482184 B2 JP H0482184B2
Authority
JP
Japan
Prior art keywords
chip
substrate
adhesive
bonding
bump
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP61273280A
Other languages
English (en)
Japanese (ja)
Other versions
JPS63127541A (ja
Inventor
Noryuki Inagaki
Yutaka Makino
Akihiro Yamamoto
Shinya Matsumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP61273280A priority Critical patent/JPS63127541A/ja
Publication of JPS63127541A publication Critical patent/JPS63127541A/ja
Publication of JPH0482184B2 publication Critical patent/JPH0482184B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/701—Tape-automated bond [TAB] connectors

Landscapes

  • Wire Bonding (AREA)
JP61273280A 1986-11-17 1986-11-17 チップの接合方法 Granted JPS63127541A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61273280A JPS63127541A (ja) 1986-11-17 1986-11-17 チップの接合方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61273280A JPS63127541A (ja) 1986-11-17 1986-11-17 チップの接合方法

Publications (2)

Publication Number Publication Date
JPS63127541A JPS63127541A (ja) 1988-05-31
JPH0482184B2 true JPH0482184B2 (de) 1992-12-25

Family

ID=17525645

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61273280A Granted JPS63127541A (ja) 1986-11-17 1986-11-17 チップの接合方法

Country Status (1)

Country Link
JP (1) JPS63127541A (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69009259T2 (de) * 1989-02-02 1994-10-13 Matsushita Electric Ind Co Ltd Verfahren zum Zusammensetzen von Halbleiteranordnungen.
JPH02234447A (ja) * 1989-03-07 1990-09-17 Nec Corp 半導体集積回路素子の接続方法
US5766972A (en) * 1994-06-02 1998-06-16 Mitsubishi Denki Kabushiki Kaisha Method of making resin encapsulated semiconductor device with bump electrodes
JP2005028202A (ja) * 2003-07-07 2005-02-03 Hitachi Industries Co Ltd テーブル平行度調整装置とそれを用いたディスペンサ
JP4835530B2 (ja) * 2007-07-25 2011-12-14 パナソニック電工株式会社 床材
JP2010034585A (ja) * 2009-11-06 2010-02-12 Toray Eng Co Ltd チップ実装装置における平行度調整方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60262430A (ja) * 1984-06-08 1985-12-25 Matsushita Electric Ind Co Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS63127541A (ja) 1988-05-31

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