JPH0482318A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce consumption by providing an input buffer suppressing a change in an input data in the power save mode so as to set the power save mode for a time when it is not required for the operation of the semiconductor integrated circuit. CONSTITUTION:A power save mode (PS) terminal 13 is provided separately and a power save instruction signal fed to the PS terminal is fed to a data input buffer 2 via an input buffer 14 as a control signal. The data input buffer 2 has a function fixing its output to 1 or 0 level even when any input is given thereto with the power save instruction signal set, e.g. to level 0. Thus, in the power saving mode, even when an input data to the semiconductor integrated circuit is varied in any way, the output of the input buffer 2 is kept constant as it is. Then each circuit of CMOS or bipolar CMOS configuration hardly consume power.

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a semiconductor integrated circuit, and particularly to an OMO8 type or bipolar CMOS type semiconductor integrated circuit.

Prior Art An example of a conventional semiconductor integrated circuit of this type has a configuration as shown in FIG. In this example, an example of a data bus is shown, and input data from a human data terminal 1 is supplied to a combinational circuit 3 via an input buffer 2, and an F/F
(Flip-flop) 4 is temporarily stored.

Then, it is inputted again to the next stage combinational circuit 5, and the F/F
6 is stored again. Thereafter, the same processing is repeated until the data is temporarily stored in the F/P 7 at the final stage. The data stored in the F/F 7 is outputted from an output terminal 9 via an output buffer 8.

The clock distributed to each F/F is at the clock input terminal 10.
It is distributed to each F/F via an input buffer 11 and other buffers 12 as necessary.

In such conventional semiconductor integrated circuits, when the human input data changes but the output data can be arbitrary, for example, there is a time when the program does not need to be executed on a personal computer (there is no calculation operation and no key input is required). Even in such cases, power will be consumed. In other words, even in such a case, the input data is changing due to external factors, so each circuit 2 to 8 receives this input data and operates accordingly, which has the disadvantage of causing power consumption. .

OBJECT OF THE INVENTION Therefore, the present invention has been made to solve the above-mentioned drawbacks of the prior art, and its purpose is to provide a semiconductor integrated circuit that can suppress power consumption.

Structure of the Invention According to the present invention, a CMO3 type or a bipolar CMO5
A type of semiconductor integrated circuit that has a power save terminal for reducing power consumption and a level that fixes the input data level of the integrated circuit to a constant level in response to a power save instruction signal applied to the power save terminal. A semiconductor integrated circuit characterized in that it includes a fixing means is obtained.

Example Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention, and parts equivalent to those in FIG. 2 are designated by the same reference numerals.

To describe only the parts that are different from the conventional example in FIG. 2, a power save mode (PS) terminal 13 is provided separately, and this P
The configuration is such that the power save instruction signal applied to the S terminal is supplied as a control signal to the data manual buffer 2 via the input huffer 14.

This data user cover sofa 2 has a function of fixing the output to "1" or "0" no matter what kind of human power is applied when the power save instruction signal is, for example, "0" (in power save mode). As a buffer circuit having such a function, a well-known circuit configuration can be adopted by those skilled in the art.

Therefore, in this power save mode, no matter how much the human input data to the semiconductor integrated circuit changes, the output of the human input buffer 2 remains fixed at a constant level, so the state of each circuit after the input buffer 2 does not change at all.

Therefore, each circuit of the CMO5 circuit or the bipolar CMO8 circuit configuration consumes almost no power.

Incidentally, the circuit shown in FIG. 1 is merely an example, and it goes without saying that the circuit shown in FIG. 1 can be employed in various circuit configurations.

Effects of the Invention As described above, according to the present invention, a human power huffer is provided to suppress changes in input data during the power save mode, so that when the semiconductor integrated circuit does not need to operate, the power save mode is used. This has the effect of significantly reducing power consumption and making it ideal for laptop-knob, portable-type computers, and per-pro computers.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a block diagram showing an example of a conventional semiconductor integrated circuit. Explanation of symbols of main parts 1...Manpower data terminal 2...Input buffer 13...Power SEBU terminal Applicant: NEC Corporation (1 other person)

Claims (1)

[Claims] (1) A CMOS type or bipolar CMOS type semiconductor integrated circuit, which has a power save terminal for reducing power consumption, and input data of this integrated circuit in response to a power save instruction signal applied to the power save terminal. 1. A semiconductor integrated circuit comprising: level fixing means for fixing a level to a constant level.