JPH0482714U - - Google Patents
Info
- Publication number
- JPH0482714U JPH0482714U JP12391590U JP12391590U JPH0482714U JP H0482714 U JPH0482714 U JP H0482714U JP 12391590 U JP12391590 U JP 12391590U JP 12391590 U JP12391590 U JP 12391590U JP H0482714 U JPH0482714 U JP H0482714U
- Authority
- JP
- Japan
- Prior art keywords
- power
- signal
- control signal
- section
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims 3
- 238000001514 detection method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Rectifiers (AREA)
- Control Of Electrical Variables (AREA)
- Power Conversion In General (AREA)
Description
第１図は本考案の実施例による交換装置の入力
力率調整装置のブロツク図、第２図は第１図の装
置の要部の電圧、電流波形図、第３図は一般の変
換装置の交流電圧、電流波形図である。
１……整流器、２ａ……第１のチヨツパ、２ｂ
……第２のチヨツパ、３ａ……第１のリアクトル
、３ｂ……第２のリアクトル、５ａ……第１のト
ランジスタ、５ｂ……第２のトランジスタ、６…
…直流コンデンサ、７……トランス、８，１１…
…交流／直流信号変換器、９，１９……変流器、
１０，２０……電流／電圧信号変換器、１１……
交流／直流信号変換器、１２……直流電圧検出器
、１３……第１の加減算器、１４……偏差増幅器
、１６……掛算器、１７ａ……第２の加減算器、
１７ｂ……第３の加減算器、１８……ヒステリシ
スコンパレータ、２１……コンパレータ、２２…
…ゼロクロス検出器、２３……フリツプフロツプ
、２４……オアゲート、２５……アンドゲート。
Fig. 1 is a block diagram of an input power factor adjustment device for a switching device according to an embodiment of the present invention, Fig. 2 is a voltage and current waveform diagram of the main parts of the device shown in Fig. 1, and Fig. 3 is a diagram of a general converter. It is an AC voltage and a current waveform diagram. 1... Rectifier, 2a... First chopper, 2b
...Second chopper, 3a...First reactor, 3b...Second reactor, 5a...First transistor, 5b...Second transistor, 6...
...DC capacitor, 7...Transformer, 8, 11...
...AC/DC signal converter, 9,19...Current transformer,
10, 20...Current/voltage signal converter, 11...
AC/DC signal converter, 12... DC voltage detector, 13... First adder/subtractor, 14... Deviation amplifier, 16... Multiplier, 17a... Second adder/subtractor,
17b...Third adder/subtractor, 18...Hysteresis comparator, 21...Comparator, 22...
...Zero cross detector, 23...Flip-flop, 24...OR gate, 25...AND gate.
Claims (1)
順変換部の直流電力を調整して後段の電力交換装
置に直流電力を供給する直流電力調整部からなる
主回路部と、該主回路部の直流電力調整部を制御
する制御手段からなり、 前記直流電力調整部が、それぞれリアクトルと
スイツチ素子を有し互いに並列接続された第１、
第２のチヨツパを有し、 前記制御手段が、前記直流電力調整部の出力電
圧と直流設定電圧の偏差分と前記順変換部の交流
入力電圧に対応する直流電圧信号とを掛算する掛
算手段と、前記順変換部の交流入力電流に対応す
る直流電圧信号と前記掛算手段による掛算信号と
の偏差分を入力とし第１の制御信号を発生する第
１の制御信号発生手段と、前記第１のチヨツパの
リアクトル電流検出信号と前記掛算手段の掛算信
号との比較信号と前記順変換部の交流入力電圧に
対応して第２の制御信号を発生する第２の制御信
号発生手段と、前記第１の制御信号と第２の制御
信号を基に前記第１、第２のチヨツパのスイツチ
素子に制御信号を供給する論理回路によつて構成
することを特徴とする電力変換装置の入力力率調
整装置。[Scope of Claim for Utility Model Registration] A main body consisting of a forward exchange unit that converts AC power into DC power, and a DC power adjustment unit that adjusts the DC power of the forward conversion unit and supplies DC power to a subsequent power exchange device. A circuit section, and a control means for controlling a DC power adjustment section of the main circuit section, wherein the DC power adjustment section has a reactor and a switch element, respectively, and is connected in parallel with the first circuit section.
a second chopper, wherein the control means multiplies a deviation between the output voltage of the DC power adjustment section and the DC set voltage by a DC voltage signal corresponding to the AC input voltage of the forward conversion section; , a first control signal generating means for generating a first control signal by receiving as input a deviation between a DC voltage signal corresponding to an AC input current of the forward converter and a multiplication signal by the multiplication means; a second control signal generating means for generating a second control signal in response to a comparison signal of a reactor current detection signal of the chopper and a multiplication signal of the multiplication means and an AC input voltage of the forward conversion section; An input power factor adjustment device for a power converter, comprising a logic circuit that supplies control signals to switch elements of the first and second choppers based on the control signal and the second control signal. .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12391590U JPH0482714U (en) | 1990-11-26 | 1990-11-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12391590U JPH0482714U (en) | 1990-11-26 | 1990-11-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0482714U true JPH0482714U (en) | 1992-07-17 |
Family
ID=31871597
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12391590U Pending JPH0482714U (en) | 1990-11-26 | 1990-11-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0482714U (en) |
-
1990
- 1990-11-26 JP JP12391590U patent/JPH0482714U/ja active Pending
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