JPH0483371A - Semiconductor device - Google Patents

Abstract

PURPOSE:To perform high integration, high speed and high performance by providing a second type board having a function for connecting a plurality of first type boards each having independent system function therebetween, and incorporating a semiconductor element or a sensor together with wirings in the second type board. CONSTITUTION:A wafer containing silicon as a main content is, for example, used as a mounting board 1 of a second type board. The silicon wafer is used to accurately form an element, wirings 3 or a sensor by using a normal silicon technology. 0 ions are implanted in a high concentration in the silicon board 13, heat treated to form an SiO2 film 2 in the board, and a silicon layer 11 is provided on a surface layer. The layer 11 is made of single crystal, a diffused region is suitably formed therein, a gate insulating film, a polysilicon gate electrode, etc., are formed thereon, and a semiconductor device such as a memory, etc., is formed. A CPU, a memory, etc., are formed on the second type board, and are used for a high class microcomputer with a display for visualizing a calculated result, a logic output to be output, on display means such as a liquid crystal display, etc., formed on the first type board.

Description

[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a semiconductor device, and particularly to a large-scale integrated semiconductor device that combines a plurality of substrates each having a system function. be.

(Prior art) In recent years, the development of semiconductor devices has been remarkable.
In particular, semiconductor devices using silicon substrates are becoming more highly integrated, faster, and more functional. these are,
In accordance with the well-known "shrinking side" rule, the size of semiconductor elements and wiring is reduced at a reduction rate of 0.6 to 0.7 times approximately every three years. As a result, the number of semiconductor devices integrated on a single silicon chip is increasing fourfold approximately every three years. Therefore, memory
A device has four times the storage capacity, and a logical device has four times more functionality.

At the same time, memory access speed and logical operation speed.

It has also become faster.

However, at present, processing technology has not yet reached the level where large-scale systems can be integrated on a single chip. .

It is quite possible that the economy will slow down. Therefore, a large-scale system has generally been realized by mounting a large number of products in which semiconductor chips are individually packaged on one printed circuit board, and then stacking several of these printed circuit boards.

However, in such a method, (1) the system is composed of several printed circuit boards, resulting in a large system size;

■Since several printed circuit boards are connected by wiring, there are resistance R, capacitance C, and inductance L components of the wiring, which causes changes in signal waveforms, that is, signal propagation delays and level fluctuations, which increases the speed of the system. performance and reliability.

■Since wiring is used to connect several printed circuit boards, the number of parts and processes increases, which tends to lengthen the completion period, increase costs, and reduce reliability.

There are drawbacks such as.

There is also a method called wafer scale integration. One method is to bake multiple semiconductor devices onto a single silicon wafer, and also bake the wiring that connects each semiconductor device to create a large-scale system on a wafer (this is called a monolithic system). A method called ``method'' has been used. Examples are B, R, E1w+er, W, E, Tchon
, A.J., Denboer.

R, Frommer, S, Kohya+n
a, K, H1rabayashi.

and I, Nojima,” Fault Tol
erant 92160 BitMultiphase
CCD Memory”, 1977 IEE
EI international Solid-S t
ate C1rcuitsConference (I
S S CCL Digest of Technic
al Papers, pp, 116-117. F
ed, 1977°.

However, even in this case, since semiconductor devices having independent functions are printed on each silicon wafer, if even one of them is defective, the entire silicon wafer becomes defective.

Therefore, manufacturing yield deteriorates and manufacturing costs increase.

As a countermeasure for (2), a method of introducing redundant circuits has already been proposed, but this does not essentially solve the drawback (2).

There are problems such as.

Furthermore, a hybrid approach has also been proposed in which several types of good quality silicon chips are mounted on a single silicon wafer. An example is M. Iwabuchi,
K, 0g1ue, K, Nakamura.

S, Nakagami, S, I somura
, S., Kuroda, and S., Kawa.
shimta, ”A 7ns 128K Multi
chipECL RAM-with-Logic Mo
dule”.

I S S CC87, Digest of Tech
nical Papers.

pP, 226-227. Fed, 1987°.

Even in this hybrid method in which silicon chips are mounted on a silicon wafer using, for example, solder bumps, ■In this case, only the wiring is drawn on the silicon wafer, which is the mounting substrate. In the future, when the signal propagation speed of the entire system increases dramatically, there is a possibility that restrictions will be placed on wiring, etc. to prevent skew. At that time, it may be necessary to form five semiconductor elements on this mounting board in order to ensure the degree of freedom in design.

■In response to the future high-speed era, when manufacturing semiconductor elements in addition to wiring on a mounting board, high-speed performance can be expected compared to bulk silicon due to the increased speed. So-called S.O.
A substrate with an I structure is used.

■In response to the future high-speed era, there is a possibility of using compound semiconductor wafers, which can manufacture devices faster than silicon.

■Future mounting boards will need to have multiple functions, especially display functions, but silicon wafer boards have limitations in producing large panels, and other board materials will be required. It's coming.

■In addition, it is necessary to avoid the problem of heat generation in response to the future era of ultra-high speeds. Therefore, the mounting board must be able to easily dissipate heat.

Problems such as these must be solved in order to make future systems ultra-high-speed, multifunctional, and compact.

One of the more effective measures to improve the degree of integration.

It is a three-dimensional integrated circuit that integrates devices in a structure in which semiconductor active layers are stacked in multiple layers. When the line width of a two-dimensional integrated circuit becomes 0.1 μm or less, it becomes a storage element of 1 gigabit class or more. As miniaturization progresses, circuits become too thin, increasing the number of factors that can cause malfunctions, and wiring becomes more complex and longer, reducing high-speed performance. therefore,
In a planar structure, it is thought that the limit for miniaturization is when the circuit line width is around 0.1 μm. This three-dimensional integrated circuit is one of the most suitable structures for overcoming such barriers to miniaturization and increasing the degree of integration. Because it uses a stacked structure, signal transmission between layers is extremely fast, and multilayer SO using insulating layers
I structure (multilayered S Ol5tru
Due to the interlayer isolation scheme of Cture, parasitic effects within the active layer are significantly reduced. For this reason, within each layer.

As interlayer circuit operations become faster, we can expect improvements in the performance of integrated circuits. However, in order to form a multilayer active layer, polycrystalline silicon is deposited on the surface of a planar integrated circuit.
A commonly considered means is to convert this into a single crystal using laser or electron beam annealing to form a laminated integrated circuit. This method is complicated, requiring multiple heating steps, and it is difficult to produce high-quality single crystals. Three-dimensional integrated circuits are also not an easy solution to higher integration, since even if any one of the multilayers is defective, the entire circuit will no longer function, resulting in poor yields.

(Problems to be Solved by the Invention) As mentioned above, the higher integration and speed of semiconductor devices,
Even though miniaturization is progressing in pursuit of higher functionality, it is conceivable that miniaturization technology will reach its limits in the near future.

In addition, methods such as stacking multiple printed circuit boards, wafer scale integration, and hybrid wafer scale integration, which have traditionally been known as large-scale integration methods, have advantages and disadvantages, such as high integration and high speed. However, it has not been sufficient as a means for manufacturing highly sophisticated and highly functional semiconductor devices.

The present invention was made in view of the above circumstances, and achieves high integration and high speed through a novel structure.

The purpose is to provide a highly functional semiconductor device.

[Structure of the invention]

(Means for Solving the Problems) A first aspect of the present invention is to provide a plurality of type 1 boards having independent system functions, and a type 2 board having a function of connecting the first type boards to each other. The present invention relates to a semiconductor device having a system function as a whole, and the second type substrate is characterized in that the second type substrate includes a semiconductor element or a sensor as well as wiring. Moreover, the second invention is.

It is characterized by having a third type substrate having a function of mounting a plurality of the above semiconductor devices and connecting them to each other.

For the first type substrate, for example, a semiconductor chip such as silicon, which is inexpensive and has an established technology, is used. Type 2 substrates include wafers made of single semiconductors such as silicon or compound semiconductors such as GaAs, quartz substrates, glass substrates,
It is selected from a metal plate mainly made of a metal with good heat dissipation such as copper or aluminum with an insulating film partially formed on it. A semiconductor element and a sensor are provided on the surface of the second type substrate.

So-called SOI (Silicon on Inverter) is equipped with a semiconductor active region in which interconnections and the like are formed.
r) structure. For example, single crystal silicon or polycrystalline silicon film is used for the semiconductor active region. This single-crystal silicon SO2 structure is, for example, a well-known SIMOX
by ImplantedC)xyl(en) method.

(Function) The present invention solves the problems of conventional wafer scale integration technology, especially wafer scale integration using a hybrid method.
As a means to solve problems in scale integration technology, improvements have been made mainly to the substrate that serves as a base for mounting multiple semiconductor chips.

In other words, in order to take full advantage of the high-speed performance of multiple semiconductor chips, the idea is to place semiconductor elements along with wiring on the board on which these chips are mounted, and to ensure that these elements can maintain high-speed performance. Alternatively, in order to increase the degree of wiring integration, the mounting board itself is made special. For example, if the mounting board is a semiconductor wafer, wiring and semiconductor element patterns can be easily printed using a special projection exposure apparatus. Furthermore, if the semiconductor wafer is, for example, a so-called SOI structure in which a semiconductor film is formed on an insulating film.

Capacitance parasitic to semiconductor elements and wiring formed thereon can be reduced. This is very advantageous in realizing faster signal propagation when signals are transmitted from one semiconductor chip to another semiconductor chip through wiring or semiconductor elements. Further, if the silicon thickness of the Sor substrate is a thin film SOI substrate, for example, about 5° n-, a higher speed semiconductor device can be manufactured.

A SIMOX substrate is one of the known examples of the SOI structure.

The SIMOX structure has a partially oxidized region (
In this method, an insulating region such as 8102) is formed and the surface or a part thereof is used as an active region. Oxygen ions are implanted at a high concentration to a depth of about several microns below the surface of the wafer by ion implantation, and annealing is performed at about 1000° C. to form a buried oxide film (Sin) to form an SOI structure. Nitrogen may be used instead of oxygen. In that case, the annealing temperature will be about 1200°C.

1. Even with a normal silicon substrate, a polycrystalline silicon film is deposited on an insulating film provided on the substrate, and on that film,
For example, if a semiconductor device such as an N-channel MO5FET is provided, a carrier mobility of about 10100 a/V, see can be obtained.

Furthermore, in pursuit of high speed, a compound semiconductor wafer is better than silicon for the mounting substrate. For example, a semiconductor chip may be mounted on a GaAs wafer as a mounting substrate. This semiconductor chip may be a silicon chip, a GaAs chip, or a combination of these. SIMOX substrates and GaAs substrates are relatively expensive, but SIMOX chips and GaAs chips
It is cheaper overall to mount an inexpensive silicon chip on a SIMOX or GaAs substrate with a small degree of integration than to mount an As-chip LSI on a normal board.

In addition to high speed, for example, in order to improve one functionality, a large quartz or glass substrate may be used instead of a silicon or GaAs wafer as the mounting substrate. Display devices such as liquid crystal display devices will play an increasingly important role as part of a system.

Therefore, the display section itself is used as a mounting board. In this case, since there is no semiconductor layer in either the quartz substrate or the glass substrate, a new layer of amorphous silicon, polycrystalline silicon, or a single crystalline silicon film made from them is provided on the substrate, and this region is A semiconductor device must be manufactured. In this case as well, a thin film SOI structure is created.

It is expected that the speed of semiconductor devices will increase.

(Example) Example 1 An example of the present invention will be described below with reference to FIG. FIGS. 1 and 2 are a perspective view of a semiconductor device of the present invention and a cross-sectional view of a main part of the BB' portion enlarged in A of the perspective view.

This embodiment is based on wafer scale integration, especially hybrid type integration. As shown in FIG. 1, a wafer mainly made of silicon, for example, is used as a mounting substrate 1 which is a second type substrate. By using a silicon wafer, elements, wiring 3, or sensors (for example, photoelectric conversion elements) can be precisely fabricated using techniques and equipment used to manufacture ordinary silicon devices using ordinary silicon technology. can be formed. Here, a wafer of a so-called SOI substrate is shown. A SIMOX structure is shown as a specific example of the SOI structure. The SIMOX structure is
O ions are implanted in a high concentration into the silicon substrate 13 and heat treated to form a 5in2 film 12 in the substrate, and a silicon layer 11 is provided on one surface layer.

This silicon layer 11 has a semiconductor element, for example, MO5FE.
Form T31. The silicon layer 11 is a single crystal, in which a diffusion region is appropriately formed, and a gate insulating film and a gate insulating film are formed thereon.
Polysilicon gate electrodes and the like are formed to form semiconductor devices such as memories.

When a MOSFET is provided on a SIMOX substrate 1 made of thin film silicon, the entire silicon layer under the MOSFET is depleted, so carrier mobility becomes higher than when the MOSFET is a thick film. In other words, a high-speed semiconductor element is formed.

A wiring 32 made of aluminum or the like is drawn out from the electrode of this semiconductor element (MOSFET) 31. This wiring layer 32 and the semiconductor chip 2 to be mounted are connected. The connection method is the second
As shown in the figure, this is done using the solder bump method. The wiring 3 on the SIMOX wafer of the mounting board is connected by solder bumps provided on the pads (not shown) of the semiconductor chip 2.
Align and connect with the 2nd pad part. The semiconductor element shown in FIG. 2 may be not only a MOSFET but also a bipolar element. Alternatively, a CMO5 circuit element consisting of an N-channel MO8FET and a P-channel MO5FET may be used.

Furthermore, a so-called BiC, MO8 circuit element composed of bipolar and OMO5 may also be used. Alternatively, it may be a so-called gate array or a programmable logic array in which a plurality of circuit elements are arranged in units of cells that constitute basic logic in advance. These semiconductor elements may be manufactured before the semiconductor chip 2 is mounted on the mounting board 1, or after the semiconductor chip 2 is mounted on the mounting board 1. However, after mounting, there are restrictions on the thermal process, so a low-temperature process is required. -For boat fishing, semiconductor devices are manufactured before mounting.
Only the wiring is formed after mounting. In this way.

A display means such as a liquid crystal display or a plasma display in which a CPU, memory, etc., mainly consisting of logic circuits, is formed on a type 2 substrate, and calculation results, logic outputs, etc. to be outputted are formed on a type 1 substrate. It is used for high-end microcontrollers with display screens, such as those visualized in .

In particular, it is preferable to form devices such as bipolar elements that easily generate heat on the mounting substrate 1 rather than forming them inside the semiconductor chip 2. That is, it is also possible to transfer the semiconductor element to be formed within the chip to the second type substrate.

In the figure, a SIMOX wafer is used as the mounting board 1, but it may also be a silicon wafer or a compound semiconductor wafer, such as a GaAs wafer.In particular, when a compound semiconductor wafer such as GaAs is used, optical devices can also be manufactured. Optical wiring, which uses light to make physical connections, becomes possible. This is preferable for wiring because there is no coupling capacitance between the wirings, so there is no interference.

In particular, it is good for wiring between a silicon chip mounted on a second type GaAs substrate.

Furthermore, a quartz plate or a glass plate can be used for the mounting board.

In this case, photoelectric conversion elements such as TPT are fabricated in most of the semiconductor active regions on these substrates, and semiconductor chips are mounted around them. A semiconductor chip with functions such as image processing.

A semiconductor chip with a memory function is mounted on the board, and in addition to sensors such as the photoelectric conversion elements, connection wiring (
If necessary, a system with a display function can also be produced by printing a transparent wiring material (using transparent wiring material if necessary).

In this case as well, since the structure is a thin film SOI substrate, it is possible to increase the speed of the semiconductor element, and it is possible to perform high-speed image processing.
A system with a display can be provided.

Example 2 In this example, a third type board is used as a mounting board, and a plurality of semiconductor devices shown in Example 1 are mounted on this board.

With such a configuration, its integration and multifunctionality are further improved than in the first embodiment.

The plurality of semiconductor devices described above may all be the same, or may have different structures. For example, if the semiconductor chips mounted as the first type substrate have different structures from each other, their multifunctionality will further increase. The third type substrate may be a thin film SOI substrate that has a semiconductor thin film and has an element function together with wiring, like the second type substrate, or it may be a substrate having only wiring, such as a semiconductor wafer, a quartz substrate, a glass substrate, Any one can be selected as the third type substrate from among insulated metal substrates containing aluminum or copper as a main component. 3 like this example 2
By adopting a dimensional structure, the improvement in the degree of integration can be maintained even more satisfactorily.

As described above, according to the present invention, high-density integration, high-speed operation, and multifunctionality can be achieved as a result of three-dimensional large-scale integration of semiconductor devices. Three-dimensional integration makes it possible to reduce power consumption/integration per chip and significantly shorten wiring delay time. Also.

By parallel operation of elements, functional use of elements with different intrinsic speeds, and adoption of circuit configurations that effectively execute parallel processing, it becomes possible to design systems that achieve higher speeds and higher functionality as a whole.

〔Effect of the invention〕

As described above, the present invention provides functionality such as semiconductor elements and sensors to a type 2 substrate that has a connection function, thereby exceeding the limits of miniaturization and making it possible to achieve high integration, while at the same time increasing speed and multifunctionality. etc. are progressing significantly.

[Brief explanation of drawings]

FIG. 1 is a perspective view of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view taken along line BB', which is an enlarged view of portion A of the semiconductor device shown in FIG. 1... Second type substrate (silicon wafer), 2... First
Seed substrate (semiconductor chip), 3... Semiconductor element and wiring, 11... Silicon thin layer, 12... Silicon oxide film, 13... Silicon, 21... Chip body,
22... Connection bump, 31... MOSFET,
32...Wiring.

Claims (4)

[Claims] (1) A semiconductor device comprising a plurality of type 1 substrates having independent system functions and a type 2 substrate having a function of connecting the first type substrates to each other, and having a system function as a whole. A semiconductor device characterized in that the type 2 substrate includes a semiconductor element or a sensor as well as wiring. (2) A semiconductor device having a third type substrate having a function of mounting a plurality of semiconductor devices according to claim 1 and connecting them to each other. (3) The semiconductor device according to claim 1, wherein the second type substrate has the semiconductor element or sensor formed on a semiconductor layer formed on a semiconductor substrate with an insulating film interposed therebetween. (4) The semiconductor device according to claim 1, wherein a logic integrated circuit is formed on the second type substrate, and a display means for displaying the output of the logic integrated circuit is formed on the first type substrate.