JPH0484463A - Composite type semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a high performance composite type semiconductor device proper to high voltage service by connecting a diode in the forward direction between a gate of an Si thyristor and a source of an MOSFET, reducing the reverse directional electric strength to 10V and lower, increasing a forward blocking gain of the thyristor to 30 and over, and minimizing the leakage current to 2mA and below when it is turned off. CONSTITUTION:A drain D of an MOSFET 2 is connected with a cathode K of an Si thyristor 1 where a diode 3 is connected between a gate G1 of the thyristor 1 and a source S of the MOSFET 2 so that it may conform to a forward direction to the MOSFET 2. The reverse directional electrical strength of a diode to be connected with the gate of the SI thyristor is reduced to 10V and lower while the forward recovery voltage of the diode is reduced, which makes it possible to inhibit the voltage to be applied between the drain and the source of the MOSFET 2 to 50V and under. At the same time, it is possible to obtain a high performance composite type semiconductor device suitable for high voltage service by adopting the thyristor wherein its forward blocking gain exceeds 30 and the leakage current fails to exceed 2mA when an off voltage is applied.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a composite semiconductor device that combines an electrostatic induction type SIRISK and a MOS field effect transistor.

B1 Summary of the Invention The present invention aims to improve the withstand voltage by connecting a diode in the forward direction between the gate of the Sl thyristor and the source of the MOSFET in a composite semiconductor device formed by connecting an SI thyristor and a MOSFET in cascode. .

C3 Prior Art In recent years, in the field of power semiconductors, there has been an increasing demand for devices that can handle higher frequencies in order to improve the efficiency and reduce noise of applied equipment.

Electrostatic induction thyristor (hereinafter referred to as SI thyristor)
is recognized for its superior high-frequency characteristics compared to other power semiconductors. However, the Sl thyristor has the disadvantage that it is necessary to draw a large current from the gate at turn-off, making the gate circuit more complex than other semiconductors. Therefore, as shown in FIG. 3, the cathode K of the Sr thyristor 1 is the drain D of the n-channel MOSFET 2, and the gate G1 of the Sl thyristor 1 is the n-channel MOS
It has been reported that a high-speed SI thyristor can be easily driven as a voltage-controlled device by connecting it to the source S of FET 2 (cascode connection).

D0 Problems to be Solved by the Invention In the cascade connection method as shown in Figure 3, the Sl thyristor 1 exhibits a characteristic similar to the forward direction characteristic of a diode when the gate is not reverse biased, in other words, it exhibits a completely normal characteristic. It needs to be a mullion type SI thyristor. For devices that exhibit characteristics that are normally off or intermediate between normally on and off, such as blocking a certain amount of anode voltage when no gate bias is applied, will the on characteristics deteriorate significantly with a cascode connection as shown in Figure 3? It will no longer turn on at all.

A normally-on type SI thyristor has a smaller anode voltage that can be blocked with the same gate reverse voltage than a normally-off type SI thyristor.

Normally-on type SI thyristors require a gate voltage of 60V or more to block an anode voltage of 1000V. The voltage applied between the source and drain of a MOSFET during cascode connection is determined mainly by the gate voltage required to block the anode voltage and the leakage current when blocking the anode voltage, and this gate voltage and leakage current increase. As the voltage increases, the voltage applied between the source and drain increases.

Therefore, the withstand voltage between the source and drain of MOSFET 2 needs to be higher than the voltage that should be applied to the gate.

Since the on-resistance of MOSFET 2 is proportional to about the 2.5th power of the withstand voltage between the source and drain, increasing the withstand voltage of the MOSFET results in a rapid increase in steady-state loss when connected in cascode. In order to increase the withstand voltage of the cascode-connected device shown in Figure 3, MOSFET2
It was also necessary to increase the withstand voltage of the device, and as a result, increasing the withstand voltage led to a significant increase in loss.

For this reason, it has been practically difficult to construct a device with a withstand voltage of 1000 V or more using cascode connection due to loss.

The present invention has been made in view of the above-mentioned problems, and its object is to connect the gate of the SI thyristor and the MOSFET in a cascode-connected system of an SI thyristor and a MOSFET.
An object of the present invention is to provide a high-performance composite semiconductor device suitable for high voltage use by forwardly connecting a diode between the sources of an ET.

E. Means and operation for solving the problem Connect the cathode of the SI thyristor to the drain of the MOSFET, connect the gate of the above-mentioned Sl thyristor to the source of the MOSFET and use it as the first electrode taken out to the outside, and connect the anode of the above-mentioned SI thyristor to the outside. In a composite semiconductor device in which the gate of the MO3FET is used as the second electrode and the gate of the MO3FET is used as the third electrode, the gate of the Sl thyristor and the gate of the MO3FET are used as the third electrode.
A diode is connected in the forward direction between the sources of the OSFET, and the reverse withstand voltage of the diode is set to IOV or less, the forward blocking gain of the SI thyristor is 30 or more, and the leakage current when turned off is 2 m. Make it below A.

F. EXAMPLE An example of the present invention will be described below with reference to FIGS. 1 and 2.

In this embodiment, as shown in FIG.
The drain D of MOSFET2 is connected to the cathode K of SI thyristor 1, and the gate
A diode 3 is connected between the source S of the FET 2 and the MOSFET 2 in a forward direction. In Figure 1, A is SI thyristor H7) 7 nodes, G2 is MOSF
The gate of ET2, C is a cathode terminal.

According to the composite semiconductor device having the structure described in 2 above, turn-off characteristics as shown in FIG. 2 can be obtained. Turn-off can be broadly classified into three periods.

Here, IA is the anode current, vAK is the anode-cathode current of the SI thyristor, vAK is the anode-cathode voltage of the SI thyristor, vDS is the drain-source voltage of the MOS FET, V6. is the gate voltage of the MOSFET.

That is, stage I is the storage period of s I thyristor l, stage ■ is the fall period and till period of SI thyristor 1, and stage
is the off period of Sr thyristor I. MOSFET2
The voltage Vp5 applied between the train and the source has a peak during the period of stage (2), rises again during the period of stages (2) to (2), and becomes constant.

Experiments in which the diode 3 was varied revealed that the voltage appearing between the resource and drain of the MOSFET 2 during Stage I is closely related to the forward recovery characteristics of the diode 3 connected to the gate of the SI thyristor. This recovery voltage tends to increase as the reverse withstand voltage of the diode increases. In fact, in the cascode connection shown in Figure 1, when a diode with a withstand voltage of 15V is used, a voltage of about 120V is generated between the drain and source of MOSFET2, but when a diode with a withstand voltage of 5V is used, the voltage is reduced to about 40V. It turned out that.

Furthermore, experiments have shown that the voltage between the drain and source that appears in stage ■ depends on the forward blocking gain of Sr thyristor 1 (the ratio of the anode voltage to the gate reverse voltage required to block the anode voltage) and the leakage current. It was confirmed.

Even for a 120oV class SI thyristor with a cascode connection, in the case of an SI thyristor with a forward blocking gain of 30 and a leakage current of about 2 mA, this phenomenon appears at stage ■ when a voltage of 1200V is applied between the anode and cathode. It was confirmed that the voltage between the drain and source could be suppressed to 60V or less.

If an SI thyristor with higher forward blocking gain and lower leakage current is used, the drain-source voltage can be suppressed even lower.

According to the composite semiconductor device of the above embodiment, (1) the built-in voltage of the diode 3 is applied to the Sl thyristor 1 as an on-gate voltage at turn-on, so the forward blocking gain is relatively high (approximately 100), and the Sl thyristor is close to normally-off.
Cascode connection can also be applied to thyristors without adding a complicated circuit to provide on-gate voltage. (2) By setting the reverse withstand voltage of the diode connected to the gate of the SI thyristor to IOV or less (preferably 5μ or less) and lowering the forward recovery voltage of the diode, the voltage applied between the drain and source of MOSFET2 at stage di/dt= 300 A/μsec
, it becomes possible to suppress the on-state current to 50 V or less under the condition of 50 A of on-current. (3) As an SI thyristor, the forward blocking gain is 30 or more, and the leakage current is 2 m when off voltage is applied.
By adopting A or less, the MOSFET in stage ■ for an anode off voltage of 1200V
The voltage between the drain and source of No. 2 can be suppressed to 60V or less.

Therefore, through (1) to (3) above, it has become possible to relatively easily realize a cascode connection exceeding 100 OV, which was impossible with the conventional technology. SI thyristor and MOS
In a device in which FETs are connected in cascode, a diode is connected in the forward direction between the gate of the SI thyristor and the source of the MOSFET, so that a composite semiconductor device with high performance and suitable for high voltage applications can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a composite semiconductor device according to an embodiment of the present invention, FIG. 2 is a turn-off characteristic diagram of the composite semiconductor device of FIG. 1, and FIG. 3 is a circuit diagram of a conventional composite semiconductor device. . I...SI thyristor, 2...MOSFET, 3...
...Diode, A...SI thyristor anode,
GI...Gate of SI thyristor, K...Cathode of Sl thyristor, D...Drain of MOSFET,
S...MOSFET source, G2...MOSFE
T gate, C... cathode terminal. 1 other person

Claims (2)

[Claims] (1) Connect the cathode of the SI thyristor to the drain of the MOSFET, and connect the gate of the SI thyristor to the MOSFET.
In a composite semiconductor device, the SI thyristor has a first electrode connected to the source of the ET and taken out to the outside, an anode of the SI thyristor as a second electrode, and a gate of the MOSFET as a third electrode. A composite semiconductor device characterized in that a diode is connected in the forward direction between the gate of the MOSFET and the source of the MOSFET. (2) Connect the cathode of the SI thyristor to the drain of the MOSFET, and connect the gate of the SI thyristor to the MOSFET.
In a composite semiconductor device, the SI thyristor has a first electrode connected to the source of the ET and taken out to the outside, an anode of the SI thyristor as a second electrode, and a gate of the MOSFET as a third electrode. A diode is connected in the forward direction between the gate of the MOSFET and the source of the MOSFET, the reverse withstand voltage of the diode is 10 V or less, the forward blocking gain of the SI thyristor is 30 or more, and the leakage current when turned off is A composite semiconductor device characterized in that the current is 2 mA or less.