JPH0484505A - Envelope detection circuit - Google Patents

Abstract

PURPOSE:To separate an envelope from a modulation signal even when a frequency of the modulation signal and that of a modulated signal are close to each other by controlling two peak levels so that one peak level being an output of one of two peak level detection circuits is synchronized with a positive peak synchronizing signal and the other peak level is the same as the peak level of the other peak level detection circuit. CONSTITUTION:One-shot monostable multivibrator circuits 11, 12 output peak level detection pulses (e), (f) synchronously with negative and positive peaks of an input terminal (a) respectively and the negative peak level detection signal (e) controls an output signal of a peak level detection circuit 4 to generate a signal (c). A comparator 13 applies a comparison signal to an AND circuit 14 when the signal (c) is smaller than an output signal of a peak level detection circuit 3 and the AND circuit 14 outputs an error signal (g) synchronously with the positive peak level detection pulse (f). The error signal (g) controls the output signal of the peak level detection circuit 3 and the result is outputted from an output terminal 2 as an envelope detection signal (b). Thus, an envelope is separated from a modulation signal even when a frequency of the modulation signal and that of a modulated signal are close to each other.

Description

DETAILED DESCRIPTION OF THE INVENTION r Industrial Application Field The present invention relates to an envelope detection circuit, and particularly to an envelope detection circuit for amplitude modulated signals.

[Conventional technology]

Conventionally, this type of envelope detection circuit uses a low-pass filter to detect a rectified input signal as a first technique to detect a modulated signal, that is, an envelope, which is extremely low compared to a non-modulated signal.

In a second technique, the envelope is detected by holding the peak level of the peak position detection signal using a sample hold circuit and a peak position detection circuit.

[Problem to be solved by the invention]

The conventional envelope detection circuit described above detects the envelope, which is a non-modulated signal, using a low-pass filter in the first technique. There is a problem in that the envelope cannot be separated more accurately than the amplitude modulated signal because of the characteristics of the amplitude modulated signal.

In addition, in the second technique, since the modulated signal is sampled and held using the peak position detection signal, it is possible to separate the envelopes even when the frequencies of the modulated signal and the modulated signal are close, which solves the problem of the conventional first technique. However, since the peak position detection signal is theoretically output a little later than the peak position, there is a problem that the peak level cannot be accurately maintained when the frequency of the modulation signal becomes high.

An object of the present invention is to provide envelope detection that can separate the envelope from the modulated signal even when the frequencies of the modulated signal and the modulated signal are close, and that can accurately maintain the level of the envelope even when the modulated signal is a high frequency signal. The purpose is to provide circuits. .

[Failure to solve the problem]

The envelope detection circuit of the present invention is an envelope detection circuit that extracts an envelope of a modulated signal. a second peak level detection circuit; The first one corresponds to the second peak level detection circuit and maintains the output peak level. a second capacitor; a pulse signal generating means for generating a pulse signal in synchronization with the positive peak and the negative peak of the modulation signal; and discharging the electric charge of the first capacitor in synchronization with the pulse signal synchronized with the negative peak. and a control means that controls the electric charge of the second capacitor to be at the same level as the holding voltage of the first capacitor in synchronization with a pulse signal synchronized with the positive peak.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a waveform diagram showing signal waveforms in FIG. 1. This embodiment includes an input terminal 1 to which an input signal a is input, peak level detection circuits 3 and 4 that output the peak level of the input signal a, capacitors 6 and 7 that hold the respective output peak levels, and an input terminal 1 to which the input signal a is input. A comparator 8 generates a pulse signal d from the signal a via a differentiating circuit 5, and a comparator 8 receives the pulse signal d and generates an input signal a.
a one-shot circuit 11 that outputs a negative peak level detection pulse e synchronized with the negative peak of A switch circuit 10 that is controlled by the detection signal e and generates a signal C from the output signal of the peak level detection circuit 4 compares the output signal of the peak level detection circuit 3 with the signal C, and detects that the signal C is the output signal of the peak level detection circuit 3. a comparator 13 which outputs a comparison signal when it is smaller than the output signal; an AND circuit 14 which outputs an error signal g synchronized with the positive peak level detection pulse f from the positive peak level detection pulse f and the comparison signal; A switch circuit 9 is configured to generate an envelope detection signal l) from the output signal of the peak level detection circuit 3.

Next, the operation of this embodiment will be explained. The input signal waveform a is transmitted to the peak level detection circuit 3.4 and the differential circuit li!
85, and the peak level detection circuit 3.4 stores the peak level in each capacitor 6.7.

The output signal of the differentiating circuit 5 is passed through the comparator 8 to generate a pulse signal d, and the pulse signal d is transmitted from 729971 to circuit 11. , 1-2. One shot circuit 11.
1.2 outputs peak level detection pulses e and f synchronized with the negative peak and positive peak of the input signal a, respectively. The negative peak level detection signal e is passed through the switch circuit 10,
The signal C is generated by controlling the output signal of the peak level detection circuit 4. The comparator 13 supplies a comparison signal to the AND circuit 14 when the signal C is smaller than the output signal of the peak level detection circuit 3. The AND circuit 14 outputs an error signal g synchronized with the positive peak level detection pulse ``.The error signal g controls the signal of the peak level detection circuit 3 via the switch circuit 9, It is output from output terminal 2.

〔Effect of the invention〕

As explained above, the present invention performs modulation by controlling the peak level of one of the two peak level detection circuits to be synchronized with the positive peak synchronization signal and at the same level as the peak level of the other peak level detection circuit. Even when the frequencies of the signal and the modulated signal are close, the envelope can be separated from the modulated signal, and even when the modulated signal is a high frequency signal, the level of the envelope can be accurately maintained.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a waveform diagram showing signal waveforms in FIG. 1. 1...Input terminal, 2...Output terminal, 3
．．・1...Peak level detection circuit, 5...
Differential circuit, 67... Capacitor, 8, 13...
... Comparator, 9.10 ... Switch circuit, 1.1, 1.2 ... One shot circuit, 14
...AND circuit, a...Input signal, b
...Envelope detection signal, C...signal, d.
-...Pulse signal, e...Negative peak level detection pulse, f...Positive peak level detection pulse, g...Error signal. Agent patent attorney fees

Claims (1)

[Claims] 1. An envelope detection circuit that extracts an envelope of a modulated signal, comprising: first and second peak level detection circuits that output a peak level of the modulated signal; first and second capacitors that correspond to a peak level detection circuit and hold an output peak level; pulse signal generation means that generates a pulse signal in synchronization with the positive peak and negative peak of the modulation signal; a discharging means for discharging the charge of the capacitor in synchronization with a pulse signal synchronized with the negative peak; and discharging means for discharging the charge of the second capacitor in synchronization with a pulse signal synchronized with the positive peak and equal to the holding voltage of the first capacitor. An envelope detection circuit characterized in that it has a control means for controlling the level. 2. The pulse signal generation means includes a first comparator that generates a pulse signal from the modulation signal via a differentiation circuit, and a negative peak level detection pulse inputted with the pulse signal and synchronized with the negative peak of the modulation signal. The envelope detection circuit according to claim 1, further comprising: a first one-shot circuit that outputs a positive peak level detection pulse; and a second one-shot circuit that outputs a positive peak level detection pulse synchronized with the positive peak. 3. Envelope detection according to claim 1 or 2, wherein the discharge means is a first switch circuit whose discharge of the signal from the second capacitor is controlled by the negative peak level detection signal. circuit. 4. The control means compares the output signal of the first peak level detection circuit and the signal discharged by the discharge means so that the signal discharged by the discharge means is the same as that of the first peak level detection circuit. a second comparator that outputs a comparison signal when it is smaller than the output signal; an AND circuit that outputs an error signal synchronized with the positive peak level detection pulse from the positive peak level detection pulse and the comparison signal; and the error signal. 4. The envelope detection circuit according to claim 1, further comprising a second switch circuit controlled by the envelope detection circuit.