JPH0492472A - Manufacturing method of semiconductor device - Google Patents
Manufacturing method of semiconductor deviceInfo
- Publication number
- JPH0492472A JPH0492472A JP20897890A JP20897890A JPH0492472A JP H0492472 A JPH0492472 A JP H0492472A JP 20897890 A JP20897890 A JP 20897890A JP 20897890 A JP20897890 A JP 20897890A JP H0492472 A JPH0492472 A JP H0492472A
- Authority
- JP
- Japan
- Prior art keywords
- film
- manufacturing
- gate
- gate electrode
- contamination
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000004140 cleaning Methods 0.000 claims abstract description 20
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000002344 surface layer Substances 0.000 claims abstract description 10
- 229910021529 ammonia Inorganic materials 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims abstract description 5
- 239000007864 aqueous solution Substances 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 15
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- -1 ammonia peroxide Chemical class 0.000 claims description 3
- 239000000243 solution Substances 0.000 claims 1
- 239000010408 film Substances 0.000 abstract description 29
- 238000011109 contamination Methods 0.000 abstract description 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 7
- 239000002245 particle Substances 0.000 abstract description 6
- 229910052681 coesite Inorganic materials 0.000 abstract description 4
- 229910052906 cristobalite Inorganic materials 0.000 abstract description 4
- 229910052682 stishovite Inorganic materials 0.000 abstract description 4
- 229910052905 tridymite Inorganic materials 0.000 abstract description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 4
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 abstract description 3
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 abstract description 3
- 239000000377 silicon dioxide Substances 0.000 abstract description 3
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 3
- 239000010409 thin film Substances 0.000 abstract description 3
- 235000011114 ammonium hydroxide Nutrition 0.000 abstract description 2
- 238000005406 washing Methods 0.000 abstract description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract 1
- 230000001846 repelling effect Effects 0.000 abstract 1
- 230000002269 spontaneous effect Effects 0.000 abstract 1
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000000758 substrate Substances 0.000 description 2
- 229910017974 NH40H Inorganic materials 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 239000005416 organic matter Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体装置の製造方法に関する。特に、ＬＳ
Ｉの高信頼性化を可能にする。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device. In particular, L.S.
Enables high reliability of I.
従来、ＭＯＳＦＥＴからなるＬＳＩの製造方法では、ゲ
ート前洗浄を例えばＨＰで処理し、ゲート絶縁膜を形成
後、直接ゲート電極膜を形成してイタ。マタ、ゲート絶
縁膜形成後、レジストをマスクにして選択的にイオン注
入を行なう（言ゎゆるチャネルドープ）工程がある場合
には、Ｈ，ＳＯ２またはＯ，プラズマでレジストばくり
後、ゲート電極膜を形成した。Conventionally, in the manufacturing method of LSIs consisting of MOSFETs, pre-gate cleaning is performed using, for example, HP, and after forming a gate insulating film, a gate electrode film is directly formed. After forming the gate insulating film, if there is a step of selectively implanting ions using a resist as a mask (so-called channel doping), after removing the resist with H, SO2 or O plasma, the gate electrode film is was formed.
しかしながら、従来技術では次の問題が存在することか
明らかになった。すなわち、ゲート酸化膜が薄くなると
、ゲート酸化膜は、前洗浄により特性が変化するという
問題である。例えば、ＨＰ水溶液の前洗浄後、ゲート酸
化した、５ｉｎ２薄膜の表面には■チャージが存在し、
ＮＨ，ＯＩ（過水水溶液の前洗浄後、ゲート酸化した５
ｉ０２薄膜の表面にはｅチャージがトラップされ、これ
ら表面のチャージは、酸化後のＮ２熱処理により除去で
きないことがｓｐｖ法（５ｕｒｔ２Ｌｘｓ Ｐｈｏｔｏ
Ｍｏｌｔａｇｅ法）により明かになった。さらにｓｐ
ｖ法によりゲート酸化５ｉ０２膜中のチャージ分布を分
析したところ、前洗浄により発生する・■またはＯのチ
ャージは、８１０２表面層約５Ｘに存在することがわか
った。However, it has become clear that the prior art has the following problem. That is, as the gate oxide film becomes thinner, the characteristics of the gate oxide film change due to pre-cleaning. For example, after pre-cleaning with an HP aqueous solution, there is a charge on the surface of a 5in2 thin film that has been gate oxidized.
NH, OI (gate oxidized after pre-cleaning with hydrogen peroxide solution)
The spv method (5urt2Lxs Photo
This was revealed by Moltage method). More sp
When the charge distribution in the gate oxide 5i02 film was analyzed by the V method, it was found that the .I or O charges generated by the pre-cleaning were present in about 5X of the 8102 surface layer.
また、チャネルドープの工程が存在する場合には、ゲー
ト酸化膜表面に同じようにチャージが存在し、また、汚
染も表面に存在する。Furthermore, if a channel doping process is present, charges similarly exist on the surface of the gate oxide film, and contamination also exists on the surface.
これら、Ｓｉｎ、表面のチャージ量や汚染は、前洗浄と
酸化方法のプロセスパラメーターのわずかの変化に大き
く依存し、制御が困難である。このため、薄膜化したゲ
ート酸化膜の物性が安定せず、ｇＯ３ＦＥＴの電気特性
や信頼性が不安定になるという欠点があった。The amount of charge and contamination on the surface of the Si layer depends largely on slight changes in the process parameters of the pre-cleaning and oxidation methods, and is difficult to control. For this reason, the physical properties of the thinned gate oxide film are not stable, resulting in the disadvantage that the electrical characteristics and reliability of the gO3FET become unstable.
本発明はかかる従来の欠点を補ない、ゲート膜形成時の
８１０２表面チャージ及び汚染を制御可能にし、高信頼
性な半導体装置提供を可能にするものである。The present invention compensates for such conventional drawbacks, makes it possible to control 8102 surface charge and contamination during gate film formation, and makes it possible to provide a highly reliable semiconductor device.
本発明では、前洗浄の影響が、熱酸化膜表面層のみのチ
ャージや汚染に現れることを明らかにし、それらの表面
層を除去することにより、高品質５１０２膜を提供でき
、前記従来の課題を解決した。In the present invention, it has been clarified that the influence of pre-cleaning appears in charge and contamination only on the surface layer of the thermal oxide film, and by removing those surface layers, a high quality 5102 film can be provided, and the above-mentioned conventional problems can be solved. Settled.
本発明では、前洗浄にＮＨ，ＯＨ過水洗浄を用いている
。この洗浄は有機物やパーティクルなどの異物除去に優
れる。このためゲート膜のピンホール発生を抑止できる
。しかしながら、ＮＨ４ＯＨ過水洗浄では表面に自然酸
化膜が形成され、ＦｅやＡＬなどの汚染を酸化生成熱が
５ｉｎ２より大きいＡｌ２Ｏ３、Ｆｅ２Ｏ，の形で取り
込まれるという弱点がある。さらに自然酸化膜がＯＨで
ターミネートされ、これらのＯＨはｅチャージを持つこ
れらの不具合は、酸化後、８１０□表面領域に存在する
ため、本発明では、チャージや汚染の存在する５膜０２
表面を除去している。さらにＳ１０、表面をＨＦまたは
Ｈａｔで処理することによりＳ１０．及びｐｏｌｙ−８
ｉなどのゲート電極界面が、Ｈ，ＦまたはＣＺの存在で
安定し、電気特性の安定したＭＯＳＦＥＴから成る半導
体装置を得る。In the present invention, NH,OH perwater cleaning is used for pre-cleaning. This cleaning is excellent in removing foreign substances such as organic substances and particles. Therefore, generation of pinholes in the gate film can be suppressed. However, the NH4OH overwater cleaning has the disadvantage that a natural oxide film is formed on the surface, and contamination such as Fe and AL is taken in the form of Al2O3 and Fe2O, whose oxidation heat is larger than 5 in2. Furthermore, the natural oxide film is terminated with OH, and these OH have e-charges. Since these defects exist in the 810□ surface region after oxidation, in the present invention, the
The surface is being removed. Furthermore, in step S10, the surface is treated with HF or Hat. and poly-8
A semiconductor device including a MOSFET whose gate electrode interface such as i is stabilized by the presence of H, F or CZ and whose electrical characteristics are stable is obtained.
以下、本発明を実施例を用いて説明する。 The present invention will be explained below using examples.
第１〜６図には、本発明による半導体製造方法の工程断
面図を示しである。第１図では、８１基板１に素子分離
絶縁膜Ｓｉ０，２が形成されている。第２図においては
、Ｈｙ：Ｈ，ｏ（＝１： １００）で６０秒処理し水
洗後、アンモニア過水（ＮＨ４０Ｈ： Ｈ２Ｏ２： Ｈ
２０＝ｉ ： １ ： ５０ ）で洗浄した後、表面に
は、自然酸化膜６が形成される。自然酸化膜６は、Ｎ
Ｈ，ＯＨが０５％以上、Ｎ２３．が０５％以上含まれる
水溶液であれば、パーティクルと反発しあう性債を持ち
、パーティクルの付着を回避する。第６図においては、
熱酸化によりゲー） Ｓ ｉ Ｏ２膜４を形成後の工程
断面図である。前洗浄の影響は、５１０２４の表面領域
５に出る。前洗浄がアンモニア過水の場合は、表面層６
にはＯＨターミネータ−によるｅチャージが蓄積し、若
干のＡＬ汚染が存在している。第４図では、ＨＦ：１（
、Ｏ＝１ ：ＴＯＯ（２５℃）１０秒処理することによ
り表面層６（第３図）を除去している。この時、ｅチャ
ージは無くなり、ＡＬ汚染も除去される。この後、多結
晶８１ゲート電極薄膜５を形成（第５図）、パターニン
グ後ソース・ドレイン６を形成してできたＭ ＯＳ Ｆ
ＥＴの断面図が第６図である。また、第４図において
、ＨＯｌを用いた洗浄を行なえば、８１０２表面にａｔ
が付着し、ゲート電極５とゲート膜４の界面準位密度を
低減し、安定した電気特性を得る〔発明の効果〕
本発明によれば、ゲート酸化前洗浄をアンモニア過水で
処理しているため、Ｓｉ基板表面はＯＨ基でターミネー
トされ親水性の性質を示し、パーティクル、有機物の付
着を回避できる。さらにゲート電極形成前に、ゲート酸
化膜をＨＦまたはＨａＺ処理するため、ゲート酸化膜表
面のアンモニア過水前洗浄の効果（ＯＨ基によるｅチャ
ージやＡＬ汚染）は回避され、Ｈ，Ｆ、またはａｔでタ
ーミネートされた表面を持つ。このため、安定したゲー
ト電極／ゲート膜界面を得、電気特性の安定したＭＯＳ
ＦＥＴからなる半導体装置を得る。1 to 6 are cross-sectional views showing steps of the semiconductor manufacturing method according to the present invention. In FIG. 1, element isolation insulating films Si0 and Si2 are formed on a substrate 1. In Figure 2, after treatment with Hy:H,o (=1:100) for 60 seconds and washing with water, ammonia peroxide (NH40H: H2O2: H
20=i:1:50), a natural oxide film 6 is formed on the surface. The natural oxide film 6 is N
H,OH is 05% or more, N23. An aqueous solution containing 0.5% or more has the ability to repel particles and avoid particle adhesion. In Figure 6,
FIG. 4 is a process cross-sectional view after forming a SiO2 film 4 by thermal oxidation. The influence of pre-cleaning appears on the surface area 5 of 51024. If the pre-cleaning is ammonia perhydration, the surface layer 6
e-charges due to OH terminators are accumulated and there is some AL contamination. In Figure 4, HF:1(
, O=1:TOO (25° C.) for 10 seconds to remove the surface layer 6 (FIG. 3). At this time, the e-charge is eliminated and the AL contamination is also removed. After this, a polycrystalline 81 gate electrode thin film 5 is formed (FIG. 5), and after patterning, a source/drain 6 is formed, resulting in a MOS F
FIG. 6 is a cross-sectional view of ET. In addition, in FIG. 4, if cleaning with HOl is performed, the surface of 8102 will be exposed to at.
adheres, reducing the interface state density between the gate electrode 5 and the gate film 4, and obtaining stable electrical characteristics. [Effects of the Invention] According to the present invention, cleaning before gate oxidation is performed using ammonia-hydrogen hydroxide. Therefore, the surface of the Si substrate is terminated with OH groups and exhibits hydrophilic properties, making it possible to avoid adhesion of particles and organic matter. Furthermore, since the gate oxide film is subjected to HF or HaZ treatment before forming the gate electrode, the effects of pre-cleaning with ammonia and water on the surface of the gate oxide film (e-charge and AL contamination due to OH groups) are avoided, and H, F, or at has a surface terminated with Therefore, a stable gate electrode/gate film interface can be obtained, and MOS with stable electrical characteristics can be achieved.
A semiconductor device consisting of an FET is obtained.
以上説明した様に、本発明は、ＬＳＩの高信頼性化を可
能にする半導体装置の製造方法を提供する。As described above, the present invention provides a method of manufacturing a semiconductor device that enables high reliability of LSI.
第１図〜第６図は、本発明によ 遣方法の工程断面図。 １・・・・・・・・・Ｓ１基板 ２ ・−・・・・・・・ Ｓ １０２ ６・・・・・・・・・自然酸化膜 ４・・・・・・・・・ゲート酸化膜 ５・・・・・・・・・ゲート電極 ６・・・・・・・・・ソース・ドレインる半導体装置源 FIGS. 1 to 6 illustrate the present invention. A process cross-sectional diagram of the method. 1...S1 board 2・-・・・・・・・・S102 6・・・・・・Natural oxide film 4......Gate oxide film 5......Gate electrode 6... Semiconductor device source with source and drain
Claims (3)
、ゲート酸化膜形成の前洗浄の最終洗浄をアンモニア過
水にて処理し、ゲート絶縁膜形成後、ゲート電極形成前
に、該ゲート絶縁膜の表面層を除去後、ゲート電極膜を
形成することを特徴とする半導体装置の製造方法。(1) In a method for manufacturing an LSI consisting of a MOSFET, the final cleaning process before the formation of a gate oxide film is treated with ammonia peroxide, and after the formation of the gate insulating film and before the formation of the gate electrode, the surface layer of the gate insulating film is 1. A method of manufacturing a semiconductor device, comprising forming a gate electrode film after removing .
、ゲート絶縁膜形成後、ゲート電極形成前に該ゲート絶
縁膜の表面層をＨＦ蒸気あるいはＨＦ水溶液で除去後、
ゲート電極層を形成することを特徴とする半導体装置の
製造方法。(2) In a method for manufacturing an LSI consisting of a MOSFET, after forming a gate insulating film and before forming a gate electrode, removing the surface layer of the gate insulating film with HF vapor or an HF aqueous solution,
A method for manufacturing a semiconductor device, comprising forming a gate electrode layer.
、ゲート絶縁膜形成後、ゲート電極形成前に該ゲート絶
縁膜の表面層をＨＣｌ蒸気あるいはＨＣｌ過水水溶液で
処理後、ゲート電極層を形成することを特徴とする半導
体装置の製造方法。(3) In the method for manufacturing an LSI consisting of a MOSFET, after forming a gate insulating film and before forming a gate electrode, the surface layer of the gate insulating film is treated with HCl vapor or an aqueous HCl peroxide solution, and then a gate electrode layer is formed. A method for manufacturing a featured semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2208978A JP2985253B2 (en) | 1990-08-07 | 1990-08-07 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2208978A JP2985253B2 (en) | 1990-08-07 | 1990-08-07 | Method for manufacturing semiconductor device |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11181673A Division JP2000068512A (en) | 1999-06-28 | 1999-06-28 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0492472A true JPH0492472A (en) | 1992-03-25 |
| JP2985253B2 JP2985253B2 (en) | 1999-11-29 |
Family
ID=16565312
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2208978A Expired - Lifetime JP2985253B2 (en) | 1990-08-07 | 1990-08-07 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2985253B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000353810A (en) * | 1999-03-26 | 2000-12-19 | Semiconductor Energy Lab Co Ltd | Semiconductor device and its manufacture |
| US7871936B2 (en) | 1999-03-26 | 2011-01-18 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing active matrix display device |
-
1990
- 1990-08-07 JP JP2208978A patent/JP2985253B2/en not_active Expired - Lifetime
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000353810A (en) * | 1999-03-26 | 2000-12-19 | Semiconductor Energy Lab Co Ltd | Semiconductor device and its manufacture |
| US7871936B2 (en) | 1999-03-26 | 2011-01-18 | Semiconductor Energy Laboratory Co., Ltd. | Method of manufacturing active matrix display device |
| US8274083B2 (en) | 1999-03-26 | 2012-09-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and a method of manufacturing the same |
| US8658481B2 (en) | 1999-03-26 | 2014-02-25 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
| US8686553B2 (en) | 1999-03-26 | 2014-04-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and a method of manufacturing the same |
| US9105523B2 (en) | 1999-03-26 | 2015-08-11 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and a method of manufacturing the same |
| US9620573B2 (en) | 1999-03-26 | 2017-04-11 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device including light-emitting element |
| US9876033B2 (en) | 1999-03-26 | 2018-01-23 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and a method of manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2985253B2 (en) | 1999-11-29 |
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