JPH051100Y2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to hybrid integrated circuits, and more particularly to R-C hybrid integrated circuits.

Although electronic circuits are becoming smaller and smaller, the degree of integration has not yet been achieved sufficiently. There is also a requirement that the manufacturing process must not become complicated, no matter how high the degree of integration. It is an object of the present invention to provide an R-C hybrid integrated circuit which is simple in structure, easy to manufacture, and has a high degree of integration.

Briefly describing the present invention, a conductor pattern for wiring is formed on the surface of a dielectric substrate containing multiple capacitors, and multiple resistance layers are formed on an insulating substrate smaller than the dielectric substrate to form an integrated resistor. A hybrid integrated circuit is provided, comprising: preparing a resistor plate, and placing the integrated resistor plate at a predetermined location on a dielectric substrate with a built-in capacitor to establish a predetermined electrical connection between a conductive pattern and a resistor layer. .

With such a configuration, the capacitor-embedded substrate itself has a simple structure and can be completed by only the lamination and firing steps for manufacturing the capacitor, and the same goes for the resistor plate, making it easy to control each step. However, on the other hand, both the capacitor-embedded substrate and the resistor plate have a high degree of integration, and by mounting the resistor plate on the capacitor-embedding substrate and electrically connecting them by soldering, a predetermined hybrid integrated circuit can be easily completed.

Hereinafter, embodiments of the hybrid integrated circuit of the present invention will be described in detail with reference to the drawings. FIG. 1 shows a dielectric substrate with a built-in capacitor. This substrate has dielectric layer 1
0 and internal electrode layers 11 and 12 are alternately laminated a predetermined number of times and then fired, and has a plurality of capacitor functions. External terminals T ₁ to T ₄ and T ₁ ′ to _{T 4} ′ are baked on the side portions of this laminate to connect the external circuit, the wiring conductive pattern on the surface, and the capacitor. The illustrated electrodes 11 and 12 are T ₁ ,
A laminated electrode (actually multiple layers) extending from T ₁ ' forms a capacitor C ₁ there. Similarly for T ₂ and T ₂ ', capacitors C ₂ , C ₃ and C ₄ are formed.

FIG. 2 shows an integrated resistance plate 13 made of an insulating plate on which a resistance layer is baked. Four resistance layers R ₁ , R ₂ , R ₃ and R ₄ are formed on the surface of the insulating plate 14 . The resistance plate 13 can be manufactured by coating or printing a known resistance powder paste such as ruthenium oxide on an insulating plate made of the same material as the dielectric of the capacitor-embedded substrate 10, and then sintering the paste at a high temperature. The values of the resistors R ₁ to R ₄ can be changed by appropriately adjusting their widths.

This change is made by cutting the side edges of the resistor with a cutting tool, but since the thin insulating plate is interposed, the capacitor-embedded board is protected from scratches by the cutting tool, so the characteristics do not change.

As shown in FIG. 3, a capacitor built-in board 10
The surface is used as a printed wiring surface to form a conductor pattern 15. Further, predetermined circuit components such as a transistor Q and a chip inductor L are mounted, and a resistor plate 13 shown in FIG. 2 is further mounted and temporarily attached, and electrical connections are made by soldering at predetermined locations. If necessary, external terminals T ₅ , T ₆ , T ₇ , T ₈
may be further provided.

FIG. 4 shows one circuit example of the hybrid integrated circuit shown in FIG.

As described above, the present invention simplifies the manufacturing process by combining the integrated capacitor board (dielectric substrate with a built-in capacitor) and the integrated resistor board (insulating board with a built-in resistor) to form the basic part of a hybrid integrated circuit. , it is possible to obtain effects such as an improvement in the degree of integration.

[Brief explanation of the drawing]

Fig. 1 is a perspective view of a dielectric substrate with a built-in integrated capacitor according to the present invention, Fig. 2 is a perspective view of an integrated resistor plate, and Fig.
The figure is a perspective view of the hybrid integrated circuit of the present invention, and FIG. 4 shows the circuit example of FIG. 3. The main parts in the figure are as follows. 10...Dielectric substrate with built-in capacitor, 11,1
2...Electrode, _T1 ~ _T8 , _T1 '~ _T4 '...External terminal,
13... Resistance plate, 14... Insulating plate, R ₁ , R ₂ , R ₃ ,
R ₄ ...Resistance.

Claims (1)

[Scope of utility model registration request] A dielectric substrate containing a plurality of capacitors made of an integrally sintered body of an alternately laminated body of a plurality of sets of electrodes and dielectric layers, a wiring pattern formed on the surface of the dielectric substrate, and a thin insulating substrate. A hybrid integrated circuit comprising a resistive network substrate having a plurality of resistive layers fixed to its surface, drawn out to the edge of said insulating substrate, directly attached to said pattern, and mounted in a manner that can be adjusted as appropriate.