JPH0511231A - Liquid crystal display - Google Patents

Abstract

PURPOSE:To realize a polymer dispersion type liquid crystal(PDLC) with a high brightness and with a wide view angle and to realize a high capacity matrix display device being high at a display quality having feature by varying a gate wave form and adjusting a TFT operation point at an optimum condition. CONSTITUTION:On a TFT substrate 25, a TFT 24 and a display electrode 23 are provided with the device and on a confronting substrate 26 a confronting electrode 22 is provided. A gap between the confronting substrate and the TFT substrate is filed with a PDLC layer 21. In this case a voltage applied on a scanning electrode preferably has at least more than three voltage values within one circumstance of the scanning voltage wave form applied on the scanning electrode. Also as a common electrode voltage applied on a second electrode AC voltage inversing the polarity is applied at every time when the polarity of a signal voltage applied on a signal electrode inverses. Thus by performing a TFT active matrix drive, the PDLC is applied a driving voltage with the TFT. Hence the duty of the PDLC applying voltage is nearly 100% and the structure with a large capacity of matrix is available.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat display, and more particularly to improvement of display quality of an active matrix display device using polymer dispersed liquid crystal.

[0002]

2. Description of the Related Art In order to clarify the improvement points of the present invention, the characteristics of a polymer-dispersed liquid crystal will be described. The polymer dispersed liquid crystal (hereinafter abbreviated as PDLC) has two display modes, that is, a scattering mode and a guest / host mode. The display principle of the PDLC in the scattering mode is shown in FIG. In the scattering mode PDLC of (a), a large number of nematic liquid crystals are dispersed in the transparent polymer 79 in small particles. Liquid crystal grain 82
Is about 1-2 μm, and the thickness of the PDLC layer 80 is
It is about 5 to 10 μm. The relationship between the two refractive indexes n (parallel) and n (vertical) of the nematic liquid crystal and the refractive index n _p of the polymer is shown by the following equation.

N (vertical) ≈n _p n (parallel) ≠ n _p
(Equation 1) It is considered that the liquid crystal molecules in the liquid crystal grains have two poles for each particle and are aligned along the wall surface of the polymer. The orientation direction is random among the liquid crystal grains. Therefore, the incident light 77 is refracted and scattered by the interface between these liquid crystal grains due to the difference in refractive index between the liquid crystal and the polymer.

When a sufficient voltage V is applied to the PDLC layer from the power supply 75 via the switch 76 and the electrode 73, the liquid crystal molecules in the grains are aligned in the electric field direction. As a result, the refractive index of the polymer and nematic liquid crystal becomes equal to the incident light,
The outgoing light 78 goes straight and changes to a transparent state. As described above, the scattering state and the transparent state are selected by turning the voltage ON / OFF. Further, when a voltage equal to or lower than the voltage V is applied to the PDLC layer, an intermediate state between the scattering state and the transparent state is obtained, and gradation display can be performed.

As the second display mode of the PDLC element,
There is a guest-host (GH) mode that applies dye absorption. The display principle of the GH mode PDLC element is shown in FIG.
Shown in. Conventionally, as for the characteristics of PDLC, SPII 1080 No. 41-47 (SPIE Vol.
80, pp. 41-47), in GH mode,
The nematic liquid crystal containing the dye 74 is dispersed in the transparent polymer 79 as liquid crystal particles 82. The relationship between the refractive index of the polymer and that of the nematic liquid crystal is similar to that of the scattering mode.

In the state of no electric field, the orientation directions of the liquid crystal molecules in the liquid crystal grains are random among the liquid crystal grains, and the orientations of the dye molecules in the liquid crystal are also random. Therefore, PDL
Light incident on the C layer is absorbed by the dye in the liquid crystal grains and turned off.
It becomes a state. When a voltage is applied to the PDLC layer, liquid crystal molecules are aligned in the electric field direction, and the dye molecules are also aligned in the electric field direction. For this reason, the incident light is not absorbed by the dye but is transmitted as it is and is in the ON state.

As described above, the two display modes of the PDLC element do not use a polarizing plate for modulating light. Therefore, unlike the TN mode, highly efficient use of light is expected in the PDLC element.

[0008]

The above-mentioned prior art was developed in 1985 by using a PDLC panel as a window material for light control.
First announced by Fergason. SID In 1986, we announced a static display segment display device, and aimed to develop its application in displays.

Here, the dependency of luminance on the applied voltage in the PDLC element was measured. The results are shown in Fig. 8. For comparison, the measurement results of the TN liquid crystal are shown at the same time. In order to drive the liquid crystal, it is necessary to apply a voltage with which the brightness is saturated, and the value is 5V for the TN liquid crystal and 30V for the PDLC.
I find it necessary.

In order to perform matrix driving using a liquid crystal, it is necessary that the threshold voltage characteristic of the applied voltage dependency of the brightness is steep. Furthermore, in order to realize a panel having a large display capacity, it is necessary to integrate a panel drive circuit. For that purpose, it is necessary to reduce the driving voltage. However, as compared with the TN liquid crystal, the rise of the PDLC characteristic graph is gentler, and therefore matrix driving cannot be performed, and no consideration has been given to this point. However, in order to apply 30V as the liquid crystal drive voltage, it is necessary to change the operating point of the TFT as compared with the TN liquid crystal.
Sufficient consideration was not given to the off current.

An object of the present invention is a PD having high brightness and a wide viewing angle.
An object of the present invention is to provide a large-capacity matrix display device having a high LC-characteristic and high display quality.

[0012]

The above objects are PDLC and
This is achieved by changing the gate waveform and adjusting the operating point of the TFT to the optimum condition in the active matrix system in which the TFT is combined.

[0013]

By performing the TFT active matrix drive, the PDLC applies a drive voltage via the TFT.
Therefore, the duty of the PDLC applied voltage is almost 1
It becomes 00%. Further, since it is not necessary that the applied voltage dependency is steep, a large capacity matrix can be constructed. Regarding the display quality, the operating point of the TFT is adjusted so that the off-current at the time of off is always minimized by changing the gate voltage, so that the display quality is less deteriorated.

[0014]

EXAMPLES Examples of the present invention will be described below.

First, TFT active matrix PDL
The structure of the C panel will be described. FIG. 2 shows a schematic sectional structure of a pixel portion of a TFT active matrix PDLC panel. The TFT 24 and the display electrode 23 are arranged on the TFT substrate 25, and the counter electrode 22 is arranged on the counter substrate 26. The PDLC layer 21 is provided in the gap between the counter substrate and the TFT substrate.
Is filled with. Of course, it goes without saying that the gate wirings for connecting the gates and drains of the TFTs, the drain wirings, and the color filters for performing color display actually exist.

The electric circuit of the pixel portion is shown in FIG. TFT4
The gate 43 is connected to the gate wiring 41, the drain 44 is connected to the drain wiring 42, and the source is connected to the PDLC liquid crystal capacitor 46 and the storage capacitor 47. One end of the PDLC liquid crystal capacitor may be connected to the counter electrode, and one end of the storage capacitor may be connected to a low-impedance gate wiring or both storage capacitors, and a DC voltage or an AC voltage may be externally applied thereto.

FIG. 3 shows the configuration of a display system constructed by using a TFT panel having this sectional structure. T
In the FT active matrix PDLC panel 31, from the outside, the gate wiring 32 has an output terminal of the scanning drive circuit 33, the drain wiring 34 has an output terminal of the signal side drive circuit 35, and the common electrode extraction wiring 36 of the counter substrate has a common electrode. The drive circuit 37 is connected. Common electrode drive circuit 37
Outputs a counter electrode drive voltage. This voltage is DC,
Exchange is also acceptable. By applying an AC voltage, a part of the liquid crystal applied voltage described later can be applied from the common electrode, so that the amplitude of the drain voltage can be reduced.

Next, FIG. 5 shows the measurement results of the gate-drain voltage-drain current characteristics of the TFT. The source / drain voltage was measured at 1V and 60V. When the gate-source voltage increases, the drain current gradually decreases, reaches the minimum value, and increases again regardless of the source-drain voltage. At this time, the gate
The source voltage depends on the source / drain voltage. FIG. 1 shows a drive waveform when driving a PDLC using this characteristic. (A) is a case of an on display, (b) is a case of an off display. In the figure, VD indicates a drain voltage, VG indicates a gate voltage, and VS indicates a source voltage waveform. Each time the gate voltage rises, the TFT enters an ON state in which a drain current flows, and the source voltage changes toward the drain voltage. At this time, in the ON display, a sufficient driving voltage is applied to the PDLC by setting the amplitude of the drain voltage to the saturation voltage of the PDLC. Since the drain voltage drives the liquid crystal in an alternating current, the voltage is inverted every frame period. On the other hand, in the off state, as shown in (b), the PDLC can be turned off by making the amplitude of the drain voltage smaller than the liquid crystal threshold voltage.

Next, when the gate voltage is lowered, that is, when the TFT is turned off, the drain current moves to a low operating point, so that the current to the pixel portion is cut off and the source voltage is held. Here, when the drain current flows, the source voltage changes and the PDLC applied voltage changes. Then, the transmittance of the pixel changes, and the display quality deteriorates. When the operating point of the TFT when turned off is confirmed in (a), it depends on the polarity of the drain voltage. When the polarity of the drain voltage is +, the source-drain voltage is VDS +,
The gate-source voltage VGS +, which is indicated by the point a in FIG. When the polarity of the drain voltage is −, the source / drain voltage is VDS− and the gate / source voltage VGS−, which is indicated by the point a ′ in FIG. The drain current of a is larger than the drain current at the point b, and the source voltage decreases.

Therefore, the gate-drain voltage when off is changed, and the operating point is changed so as to be closest to the region where the drain current in FIG. 5 is the smallest, that is, the valley in the graph. Therefore, the gate drive voltage is changed. The drive waveform at this time is shown in FIG. When the gate voltage is low, the gate voltage is changed according to the phase of the drain voltage, that is, according to the AC drive signal of the panel. The operating points in this case are also plotted in FIG. The point b is the case where the drain has a positive polarity, and the drain current is smaller than that at the point a. On the other hand, the point b'is the same as the point a '. Therefore, when the drain has a positive polarity, the drain current at the time of OFF can be reduced.

FIG. 6 shows the configuration of the scanning drive circuit for carrying out this drive system. The shift register 61 is set by the frame start signal 68 and sequentially shifted by the vertical clock 69. The shift register output 62 is connected to the output switch train 63, and the output changeover switch 71
And the VGL changeover switch 72 changes the output level to VGH (65), VHL1 (66), VGL2 (67).
And output to the output terminal 64. When the shift register output is 1, VGH is selected, and when the shift register output is 0, the output voltage of the VGL changeover switch is selected. V
The GL changeover switch 72 is V when the AC signal is 1.
When it is GL1, 0, VGL2 is output. By doing so, the gate voltage shown in FIG. 1C can be generated.

[0022]

According to the present invention, a TFT active matrix type PDLC panel can be obtained, and high-luminance and large-capacity display excellent in display quality can be obtained.

[Brief description of drawings]

FIG. 1 is a TFT active matrix drive waveform diagram.

FIG. 2 is a schematic cross-sectional structure diagram of a TFT-PDLC pixel portion.

FIG. 3 is a block diagram of a TFT-PDLC display system.

FIG. 4 is a pixel section TFT circuit diagram.

FIG. 5 is a gate-source voltage-drain current characteristic diagram of the TFT element.

FIG. 6 is a scan drive circuit configuration diagram.

FIG. 7 is a principle diagram of PDLC.

FIG. 8 is a luminance-applied voltage characteristic diagram of the PDLC element.

[Explanation of symbols]

21 ... PDLC layer, 22 ... Counter electrode, 23 ... Display electrode,
24 ... TFT, 25 ... TFT substrate, 26 ... Counter substrate, 3
1 ... TFT active matrix PDLC panel, 32
... gate wiring, 33 ... scanning drive circuit, 34 ... drain wiring, 35 ... signal drive circuit, 36 ... common electrode extraction wiring, 37 ... common electrode drive circuit, 41 ... gate wiring, 42
... Drain wiring, 43 ... Gate, 44 ... Drain, 45
... Source, 46 ... Liquid crystal capacity, 47 ... Storage capacity, 48 ... T
FT, 61 ... Shift register, 62 ... Shift register output, 63 ... Output switch string, 64 ... Output terminal, 65 ... V
GH, 66 ... VGL1, 67 ... VGL2, 68 ... Frame start signal, 69 ... Vertical clock, 70 ... Alternating signal, 71 ... Output changeover switch, 72 ... VGL changeover switch, 73 ... Electrode, 74 ... Dye, 75 ... Power supply , 7
6 ... switch, 77 ... incident light, 78 ... outgoing light, 80 ... P
DLC layer, 81 ... Substrate, 82 ... Liquid crystal particles.

Claims (2)

[Claims] 1. A plurality of scanning electrodes, a plurality of signal electrodes intersecting them, and at least one TFT at each intersection.
An element, a substrate on which one transparent electrode is formed, and a second electrode substrate facing the substrate, at least a polymer and a granular region filled with a plurality of liquid crystals in the polymer are sandwiched between the substrate and the TFT. A liquid crystal display device having a pixel formed of elements, wherein a voltage applied to the scan electrode has at least three voltage values within one cycle of a scan voltage waveform applied to the scan electrode. 2. The alternating voltage for reversing the polarity is applied every time the polarity of the signal voltage applied to the signal electrode is inverted for the common electrode voltage applied to the second electrode. Liquid crystal display device.