JPH05129957A - Attenuation circuit and integrated circuit - Google Patents

Abstract

(57) [Summary] [Purpose] Obtaining a linear damping ratio. [Constitution] In a control circuit 8, a switch 4 and a switch 6 are switched according to a control signal output from, for example, a microcomputer (not shown), and a contact is selected. The impedance viewed from the output terminal 7 (output impedance) changes intricately depending on the contact selected by the switches 4 and 6, but in the control circuit 8, the switch 10a of the switch unit 10
To 10d are controlled to be turned on / off, the resistance value of the series circuit 11 (the resistance value between the output terminal 7 and the output terminal 12) changes so as to correct the change in impedance seen from the output terminal 7, and the output terminal The change in impedance seen from 12 is suppressed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an attenuation circuit suitable for use in an integrated circuit such as a D / A converter having an attenuation circuit for attenuating a level of an input signal and outputting the attenuated signal. Regarding the circuit.

[0002]

2. Description of the Related Art FIG. 7 is a circuit diagram showing a configuration of an example of a conventional attenuator. The input terminal 2 is connected to one end on the side of the resistor 3a of the series circuit 3 to which the resistors 3a and 3b are connected. The switch 4 includes a contact 4a, that is, a connection point between the input terminal 2 and the series circuit 3 (a connection point between the input terminal 2 and the resistor 3a), a contact 4b, that is, a connection point between the resistor 3a and the resistor 3b, or a contact 4c, That is, one of the other ends of the series circuit 3 (one end on the resistor 3b side) is selected, and the selected contact (connection point) and one end on the resistor 5a side of the series circuit 5 in which the resistors 5a to 5d are connected in series. And connect. Switch 6
Is a contact point 6a, that is, a connection point between the switch 4 and the series circuit 5 (a connection point between the switch 4 and the resistor 5a), a contact point 6b, that is, a connection point between the resistors 5a and 5b, and a contact point 6c, that is, the resistance 5
Either the connection point between b and the resistor 5c or the contact point 6d, that is, the connection point between the resistor 5c and the resistor 5d is selected, and the selected contact point (connection point) is connected to the output terminal 7. The other end of the series circuit 5 (one end on the side of the resistor 5d) is connected to the ground (GN
D).

The control circuit 31 is connected to, for example, an input / output interface (not shown) of a microcomputer, and controls the switch 4 and the switch 6 in accordance with a control signal from the input / output interface.

In the attenuator having such a structure,
When the signal source 9 for supplying the voltage v _i is connected to the input terminal 2, when the output terminal 7 is in the open state, the voltage v _o output to the output terminal 7 is between the contact selected by the switch 6 and the ground. Resistance value (series resistance value of resistors 5a to 5d (value obtained by adding resistance values) R _5a + R _5b + R _5c +
R _5d , series resistance value of resistors 5b to 5d R _5b + R _5c +
R _5d , series resistance value R _5c + R _{5d of} resistance 5c, 5d, or resistance value R _5d of resistance _5d ), series resistance value R _5a + R _5b + R _5c + R _{5d of} resistances 5a to _5d , input terminal 2 and switch The resistance value between the contacts selected by 4 (0, the resistance value R _{3a of} the resistance 3a, or the series resistance value R _3a + R of the resistances 3a and 3b)
_3b) and the ratio of the resistance value obtained by adding, comprising a voltage v _i divided voltage, i.e. the voltage obtained by attenuating the voltage v _i.

For example, in 2 dB steps, -22 dB to 0
An attenuator having an attenuation ratio in the dB range is used, for example M
When realized on the OSIC, the resistance values R _3a , R _3b and R _{5a to} R of the resistors 3a and 3b and the resistors 5a to 5b.
_5d is determined by the following method.

First, the resistance value of the series circuit 5 R _5a + R
_5b + to R _5c + R _5d, for example, 20kΩ. The resistance value may be in the range that can be manufactured by MOS. To obtain the attenuation ratio of 2 dB step, the resistors 5b to 5 of the series circuit 5
The ratio of the series resistance value R _5b + R _5c + R _{5d of d} to the resistance value R _5a + R _5b + R _5c + R _5d of the series circuit 5 is −2 dB (about 0.7 dB).
95: 1), and the series resistance value of the resistors 5c and 5d R _5c +
And R _5d, the ratio between the resistance value _{R 5a + R 5b + R 5c} + R 5d series circuit 5 is -4 dB (about 0.63: 1) becomes, and the resistance value R _5d of the resistor 5d, the resistance of the series circuit 5 R _5a + R _5b + R _5c +
_So that the ratio with R _5d is -6 dB (about 0.5: 1),
That is, the resistance values R _{5a to} R _5d are set so that the voltage applied to the series circuit 5 is divided by 2 dB at the contacts 6a to 6d of the switch 6. Therefore, R _5a is 4.1k
Ω, R _5b is 3.3 kΩ, R _5c is 2.6 kΩ, R _5d is 10
It becomes kΩ.

Thus, in the series circuit 5, 2 dB
When the contact 4b is selected by the switch 4 after setting the damping ratio in the range of −6 dB to 0 dB in the step, the resistance value R _5a + R _5b + R _5c + R of the series circuit 5 is selected.
_5d and the ratio of the + series resistance R _3a of the resistor 3a and the series circuit 5 of the series circuit _{3 (R 5a + R 5b +} R 5c + R 5d) is -8dB
(About 0.4: 1) and when the contact 4c is selected by the switch 4, the resistance value of the series circuit 5 is R _5a + R _5b + R _5c.
+ R _5d and the series resistance value of the series circuit 3 and the series circuit 5 (R
_3a + _R3b ) + ( _R5a + _R5b + _R5c + _R5d ) is -1.
The resistance values R _3a and R _3b are set so that the voltage applied to the input terminal 2 is divided by 8 dB at 6 dB (about 0.16: 1), that is, at the contacts 4b and 4c of the switch 4. To do. Therefore, R _3a is 30.2kΩ, R _3b
Is 76 kΩ.

In the attenuator designed in this manner, for example, in a DAT, the digital signal reproduced from the tape is D / A converted by the D / A converter, and the signal level of the analog signal output from the digital signal is attenuated ( It is used in the output stage of a D / A converter for adjustment.

[0009]

However, the impedance viewed from the output terminal 7 side (output impedance)
Is a resistance value between the contact selected by the switch 6 and the connection point between the switch 4 and the series circuit 5 (0, the resistance value R _{5a of} the resistance 5a, the series resistance value R _5a + R _{5b of} the resistances 5a and _5b , or Series resistance value of resistors 5a to 5c R _5a + R _5b + R _5c )
And the resistance value between the connection point selected by the switch 4 and the input terminal 2 (0, the resistance value R _{3a of} the resistance 3a, or the series resistance value R _3a + R _{3b of the} resistances 3a and _3b ) are added. , And the parallel resistance value of the resistance value between the connection point selected by the switch 6 and the ground (a value obtained by adding the reciprocal numbers of the respective resistance values and taking the reciprocal number).

Therefore, as shown in FIG. 8, when the contacts selected by the switches 4 and 6 change, the output impedance (impedance viewed from the output terminal 7) changes in a complicated manner. ,
When the input impedance of the circuit connected to the subsequent stage (after the output terminal 7) is not a sufficiently large value, for example, about 10 kΩ, current flows from the output terminal 7 to the circuit of the subsequent stage in response to the output impedance that changes in a complicated manner, and the output Terminal 7
There is a problem that the voltage v _O output to the output changes and the linear damping ratio cannot be obtained as compared with the designed damping ratio (the damping ratio when the output terminal 7 is open).

Therefore, in order to simplify the change in the output impedance, the input terminal 2 is connected to the connection point between the switch 4 and the series circuit 5, the series circuit 3 and the switch 4 are removed, and the series circuit 5 and the switch 6 are removed. There is a method of constructing an attenuator by using the above method, but this method has a problem that the dynamic range of the attenuation ratio becomes small.

In order to solve this, there is a method of increasing the number of resistors connected in series in the series circuit 5 and the number of connection points between the resistors connected in series and the switch 6 (the number of contacts of the switch 6). However, when the attenuator is constructed on a one-chip semiconductor substrate, the switch 6
Is composed of, for example, a field effect transistor (FET), so that increasing the number of contacts increases the capacitance between the gate and drain of the FET and between the gate and the source of the FET. There was a problem of deterioration.

Also, in order to prevent current from flowing from the output terminal 7 to the circuit connected to the subsequent stage, a MOS operational amplifier having a large input impedance is connected to the output terminal 7 as a voltage follower, and then the original output terminal is connected. There is a method of connecting a circuit connected to 7. However, in this method, an attenuator is incorporated in the DAT, for example.
When the output of a voltage follower MOS operational amplifier used in the output stage of a / A converter is supplied to a headphone, it is necessary to reduce the signal level of that output, but the effect of the S / N of the MOS operational amplifier is reduced. However, there is a problem that the S / N of the signal received and supplied to the headphones is deteriorated.

Therefore, there is a method of connecting a bipolar operational amplifier having a good S / N to the output terminal 7 of the attenuator. However, when the attenuator and the bipolar operational amplifier are integrally formed on a one-chip semiconductor substrate, the attenuator is used. Since the D / A converter and the D / A converter are generally composed of MOS, a circuit must be composed of MOS and bipolar on one chip, which complicates the manufacturing process and increases the cost. was there.

The present invention has been made in view of the above circumstances, and is intended to suppress variations in output impedance and to obtain a linear damping ratio.

[0016]

An attenuator circuit according to a first aspect of the present invention comprises a plurality of resistors connected in series or in parallel for dividing and attenuating a signal, for example, resistors 3a and 3b and resistors 5a to 5d. Voltage dividing means and resistors 3a, 3b
And a selection means including switches 4 and 6 for selecting connection points of the resistors 5a to 5d, and a plurality of resistors connected to the connection points of the selected resistors 3a and 3b and resistors 5a to 5d, for example, resistors 11a to 11a. 11d and other impedance correction means, and the selected resistor 3
a, 3b and resistors 5a to 5d corresponding to the impedance seen from the connection point, and the control means including the switches 10a to 10d for controlling the impedance of the resistors 11a to 11d.

The attenuating circuit according to a second aspect of the present invention comprises a resistor 3a,
3b and resistors 5a to 5d, switches 4 and 6, resistors 11a to 11d, and switches 10a to 10d.
Are all integrally formed on a one-chip semiconductor substrate.

An integrated circuit according to a third aspect of the present invention converts a digital signal into an analog signal and outputs the analog signal, for example, a D / A converter 22, an amplifier 23 and a low pass filter 24.
D / A conversion means including, and a voltage dividing means including resistors 3a and 3b and resistors 5a to 5d having a plurality of resistors connected in series or in parallel for dividing and attenuating the output analog signal, Selection means, such as switches 4 and 6, for selecting connection points of the resistors 3a and 3b and the resistors 5a to 5d, and the selected resistor 3a,
3b and the resistors 5a to 5d, and a plurality of resistors connected to the impedance correction means, such as resistors 11a to 11d, and selected resistors 3a and 3b.
And the resistors 11a to 11d for controlling the impedance of the resistors 11a to 11d corresponding to the impedances seen from the connection points of the resistors 5a to 5d, for example, switches 10a to 10
D / A converter 2 provided with a control means such as d.
2, amplifier 23 and low-pass filter 24, resistor 3
a, 3b and resistors 5a to 5d, switches 4 and 6, resistors 11a to 11d, and switches 10a to 10d are all integrally formed on a one-chip semiconductor substrate.

[0019]

In the attenuating circuit according to the first aspect, the resistors 3a connected in series or in parallel for dividing and attenuating the signal are provided.
The connection point of 3b and 5a to 5b is selected, and the impedance of the resistors 11a to 11b connected to the connection point is controlled according to the impedance seen from the connection point. Therefore, the variation of impedance seen through the resistors 11a and 11b is suppressed, and a linear damping ratio can be always obtained.

In the attenuation circuit according to the second aspect, the resistors 3a and 3b, the resistors 5a to 5b, the switches 4 and 6, the resistors 11a to 11d, and the switches 10a to 10d.
Are all integrally formed on a one-chip semiconductor substrate. Therefore, the circuit can be made compact.

According to another aspect of the integrated circuit of the present invention, a serial or parallel circuit that divides and attenuates the analog signal output from the D / A converter 22, the amplifier 23, and the low-pass filter 24 that converts the digital signal into the analog signal. The connection point of the resistors 3a, 3b and 5a to 5b connected to is selected, and the impedance of the resistors 11a to 11b connected to the connection point is controlled according to the impedance seen from the connection point. Then, the D / A converter 22, the amplifier 23, the low-pass filter 24, the resistor 3a,
3b, resistors 5a to 5d, switches 4 and 6, resistor 11a
To 11d and the switches 10a to 10d are all integrally formed on a one-chip semiconductor substrate.
Therefore, the fluctuation of the output impedance of the circuit can be suppressed, and the circuit can be made compact.

[0022]

1 is a circuit diagram showing the configuration of an embodiment of an attenuation circuit according to the present invention. The parts corresponding to those in FIG. 7 are denoted by the same reference numerals, and the resistance values of the resistors 3a and 3b and the resistors 5a to 5d are the design values described above. A series circuit 11 in which resistors 11a to 11d are connected in series is connected to the output terminal 7, and each resistor (resistor 11
a to 11d), the switches 10a to 10d are connected in parallel. The control circuit 8 includes the switch 4 and the switch 6 as well as the switch 10a of the switch unit 10.
To 10d. Switch 10 of switch unit 10
A to 10d are controlled by the control circuit 8 and are turned on / off to change the resistance value (impedance) between the output terminal 7 and the output terminal 12.

The resistors 3a and 3b, the resistors 5a to 5d and the resistors 11a to 11d are, for example, thin film resistors, and are composed of the switches 4 and 6 and the switches 10a to 10d.
Is an NMOS field effect transistor (FET) and an analog switch in which the drain and the source and the source of the PMOS FET are connected to each other, as shown in FIG. 6, all on a one-chip semiconductor substrate such as a MOS. , Can be easily configured. Further, the control circuit 8 is composed of, for example, a microcomputer and the like, which can be integrated if necessary.
It may be a separate body.

Next, the operation will be described. In the control circuit 8, the switches 4 and 6 are controlled (switched) according to a control signal output from, for example, a microcomputer (not shown), and the contact is selected. As mentioned above, the output terminal 7
The tangled impedance (output impedance) changes intricately depending on the contact selected by the switches 4 and 6, but in the control circuit 8, the output terminal 12
In order not to change the impedance seen from, the maximum value (16.83) of the output impedance shown in FIG.
kΩ) switch 1 of switch unit 10
0a to 10d are controlled.

Here, the resistors 11a to 1 of the series circuit 11 are connected.
The resistance value of 1d is set as follows. The minimum resistance is r
If the resistance value of the series circuit 11 is changed in r steps, a resistor having a resistance value of 2r, 4r, ..., 2 ^N r, ... Is required next to r (where N is It is an integer of 0 or more, and in the case of the embodiment of FIG. 1, N = 3). The impedance seen from the output terminal 12 is always
In order to make it about 16.83 kΩ, the difference between the maximum value and the minimum value of the impedance seen from the output terminal 7 and the maximum value of the series resistance value of the resistors 10a to 10d are made substantially equal. Just do it. That is, the maximum value of the impedance seen from the output terminal 7 is 16.83 kΩ, and the minimum value is 0 kΩ (FIGS. 2 and 8). In this embodiment, the series circuit 11 includes four resistors 11a to 11d. Since the resistors are connected in series, the maximum resistance value (the resistance value when all the switches 10a to 10d are turned off) r + 2r + 4r + 8r, that is, 15r and 16.8.
It suffices that 3-0 kΩ, that is, 16.83 kΩ, be substantially equal. Therefore, in this embodiment, r is 1.1 kΩ.
Set to.

In the control circuit 8, the switches 10a to 10d of the switch section 10 are turned on / off as shown in FIG. 2, and the resistance value of the series circuit 11 (output terminal 7
The resistance value between the output terminal 12 and the output terminal 12 is changed, and the change in the impedance seen from the output terminal 7 is corrected.
The fluctuation of the impedance seen from is suppressed.

In FIG. 2, the four-digit number (0 and 1) in the "state of switch section 10" column in the table is the switch section 10
1 when the switch 10a is in the on (short-circuit) state, 0 when it is in the off (open) state, 1 when the switch 10b is in the on state, 0 when it is in the off state, and 1 when the switch 10c is in the on state. , 0 when the switch is off, 1 when the switch 10d is on, and 0 when the switch 10d is off, and the states of the switches 10a to 10d are shown in order from the left. Further, the correction impedance represents the resistance value (impedance) between the output terminal 7 and the output terminal 12 which changes depending on the state of the switch unit 10.

When the contact 4a is selected in the switch 4 and the contact 6a is selected in the switch 6,
When the output terminal 12 is connected to a circuit having an infinite input impedance, that is, in the open state, the damping ratio becomes the designed damping ratio, that is, 0 dB. At this time, the impedance seen from the output terminal 7 becomes 0Ω, so that the impedance seen from the output terminal 12 becomes close to 16.83 kΩ which is the maximum value of the impedance seen from the output terminal 7, as described above. Will be corrected. Therefore,
The control circuit 8 controls the switches 10a to 10d.
Are all turned off (indicated by 0000 in FIG. 2), and the resistance value between the output terminals 7 and 12 is the resistance value 15 obtained by adding all the resistance values of the resistors 11a to 11d.
r (= r + 2r + 4r + 8r). Therefore, r is 1.1 kΩ, so the correction impedance is 16.5 (1
5 × 1.1) kΩ, and the impedance viewed from the output terminal 12 is the sum of the correction impedance and the impedance viewed from the output terminal 7, that is, 1
It becomes 6.5 (16.5 + 0) kΩ.

Similarly, when the contact 4a is selected in the switch 4 and the contact 6b is selected in the switch 6, when the output terminal 12 is in the open state, the attenuation ratio becomes -2 dB. At this time, since the impedance seen from the output terminal 7 is 3.26 kΩ, the impedance seen from the output terminal 12 is corrected so as to be close to 16.83 kΩ which is the maximum impedance seen from the output terminal 7. .. Therefore, the control circuit 8 turns off the switches 10a and 10b, and the switches 10c and 10b are turned off.
10d is turned on (indicated by 0011 in FIG. 2) and the correction impedance is set to the resistances 11a and 11b.
It becomes 13.2 kΩ by adding the resistance value of. Therefore, the impedance viewed from the output terminal 12 is 16.46 kΩ.

When the contact 4a is selected in the switch 4 and the contact 6c is selected in the switch 6,
When the output terminal 12 is open, the attenuation ratio is -4 dB. At this time, the impedance seen from the output terminal 7 is 4.66 kΩ, so that the impedance seen from the output terminal 12 is corrected to be close to 16.83 kΩ which is the maximum value of the impedance seen from the output terminal 7. ..
Therefore, the control circuit 8 causes the switches 10a,
10c and 10d are turned off and switch 10b
Is turned on (indicated by 0100 in FIG. 2),
The correction impedance includes resistors 11a, 11c and 11
It becomes 12.1 kΩ obtained by adding the resistance value of d. Therefore, the impedance seen from the output terminal 12 is 16.76 kΩ.
become.

When the contact 4a is selected in the switch 4 and the contact 6d is selected in the switch 6,
When the output terminal 12 is open, the attenuation ratio is -6 dB. At this time, since the impedance seen from the output terminal 7 becomes 5.00 kΩ, the impedance seen from the output terminal 12 is corrected to be close to 16.83 kΩ which is the maximum impedance seen from the output terminal 7. ..
Therefore, the control circuit 8 turns off the switches 10a and 10c, and the switches 10b and 1c.
0d is turned on (indicated by 0101 in FIG. 2), and the correction impedance is set to the resistances 11a and 11c.
It becomes 11.0 kΩ by adding the resistance value of. Therefore, the impedance viewed from the output terminal 12 is 16.00 kΩ.

When the contact 4b is selected in the switch 4 and the contact 6a is selected in the switch 6,
When the output terminal 12 is open, the attenuation ratio is -8 dB. At this time, the impedance seen from the output terminal 7 is 1
Since it is 2.03 kΩ, the impedance viewed from the output terminal 12 is corrected so as to be close to 16.83 kΩ which is the maximum value of the impedance viewed from the output terminal 7.
Therefore, the switch 10b is turned off by the control circuit 8 and the switches 10a, 10c and 10d are turned on.
Is turned on (indicated by 1011 in FIG. 2),
The correction impedance is the resistance value of the resistor 11b.
It becomes 4 kΩ. Therefore, the impedance viewed from the output terminal 12 is 16.47 kΩ.

When the contact 4b is selected in the switch 4 and the contact 6b is selected in the switch 6,
When the output terminal 12 is in the open state, the attenuation ratio is -10 dB. At this time, since the impedance seen from the output terminal 7 is 10.86 kΩ, the impedance seen from the output terminal 12 is corrected so as to be close to 16.83 kΩ which is the maximum value of the impedance seen from the output terminal 7. .. Therefore, the control circuit 8 causes the switch 10
b and 10d are turned off, switches 10a and 10c are turned on (indicated by 1010 in FIG. 2), and the correction impedance is set by resistors 11b and 11b.
It becomes 5.5 kΩ obtained by adding the resistance value of d. Therefore, the impedance viewed from the output terminal 12 is 16.36 kΩ.

When the contact 4b is selected in the switch 4 and the contact 6c is selected in the switch 6,
When the output terminal 12 is open, the attenuation ratio is -12 dB. At this time, since the impedance seen from the output terminal 7 is 9.43 kΩ, the impedance seen from the output terminal 12 is corrected to be close to 16.83 kΩ which is the maximum value of the impedance seen from the output terminal 7. ..
Therefore, the control circuit 8 turns off the switches 10b and 10c, and the switches 10a and 1c are turned off.
0d is turned on (indicated by 1001 in FIG. 2), and the correction impedance is set to the resistances 11b and 11c.
It becomes 6.6 kΩ by adding the resistance value of. Therefore, the impedance viewed from the output terminal 12 is 16.03 kΩ.

When the contact 4b is selected in the switch 4 and the contact 6d is selected in the switch 6,
When the output terminal 12 is open, the damping ratio is -14 dB. At this time, since the impedance seen from the output terminal 7 is 8.00 kΩ, the impedance seen from the output terminal 12 is corrected to be close to 16.83 kΩ which is the maximum impedance seen from the output terminal 7. ..
Therefore, the control circuit 8 turns off the switch 10a and turns on the switches 10b to 10d (indicated by 0111 in FIG. 2), and the correction impedance becomes 8.8 kΩ which is the resistance value of the resistor 11a. .. Therefore, the impedance seen from the output terminal 12 is
It becomes 16.80 kΩ.

When the contact 4c is selected in the switch 4 and the contact 6a is selected in the switch 6,
When the output terminal 12 is open, the attenuation ratio is -16 dB. At this time, the impedance seen from the output terminal 7 becomes 16.83 kΩ, which is the maximum value, so no correction is performed (correction of 0 is performed). Therefore, the control circuit 8 turns on all the switches 10a to 10d (indicated by 1111 in FIG. 2), and the correction impedance becomes 0Ω which is the resistance value of the resistor 11b. Therefore, the impedance seen from the output terminal 12 is
It becomes 16.83 kΩ.

When the contact 4c is selected in the switch 4 and the contact 6b is selected in the switch 6,
When the output terminal 12 is open, the damping ratio is -18 dB. At this time, since the impedance seen from the output terminal 7 becomes 13.90 kΩ, the impedance seen from the output terminal 12 is corrected to be close to 16.83 kΩ which is the maximum value of the impedance seen from the output terminal 7. .. Therefore, the control circuit 8 causes the switch 10
c is turned off and switches 10a, 10b and 1
0d is turned on (indicated by 1101 in FIG. 2), and the correction impedance becomes 2.2 kΩ which is the resistance value of the resistor 11c. Therefore, the impedance viewed from the output terminal 12 is 16.10 kΩ.

When the contact 4c is selected in the switch 4 and the contact 6c is selected in the switch 6,
When the output terminal 12 is open, the attenuation ratio is -20 dB. At this time, since the impedance seen from the output terminal 7 is 11.30 kΩ, the impedance seen from the output terminal 12 is corrected so as to be close to 16.83 kΩ which is the maximum impedance seen from the output terminal 7. .. Therefore, the control circuit 8 causes the switch 10
b and 10d are turned off, switches 10a and 10c are turned on (indicated by 1010 in FIG. 2), and the correction impedance is set by resistors 11b and 11b.
It becomes 5.5 kΩ obtained by adding the resistance value of d. Therefore, the impedance viewed from the output terminal 12 is 16.80 kΩ.

When the contact 4c is selected in the switch 4 and the contact 6d is selected in the switch 6,
When the output terminal 12 is open, the damping ratio is -22 dB. At this time, since the impedance seen from the output terminal 7 is 9.21 kΩ, the impedance seen from the output terminal 12 is corrected to be close to 16.83 kΩ which is the maximum impedance seen from the output terminal 7. ..
Therefore, the control circuit 8 turns off the switches 10b to 10d and turns on the switch 10a (indicated by 1000 in FIG. 2), and the correction impedance is obtained by adding the resistance values of the resistors 11b to 11d. It becomes 7 kΩ. Therefore, the impedance seen from the output terminal 12 is 16.91 kΩ.

As described above, the impedance seen from the output terminal 7 varies in a wide range of 0 to 16.83 kΩ, but the impedance seen from the output terminal 12 is
The impedance seen from the output terminal 7 is corrected, and 16.
It fluctuates only in a narrow range of 00 to 16.91 kΩ.
Therefore, even if the input impedance of the circuit connected to the subsequent stage (after the output terminal 12) is not a sufficiently large value as compared with this output impedance (impedance viewed from the output terminal 12), for example, about 10 kΩ, the output The current flowing from the terminal 12 to the circuit in the subsequent stage is almost constant, and the voltage v output to the output terminal 12 changes in proportion to the designed damping ratio.
A linear damping ratio can be obtained in the same manner as 2 when the damping ratio is open.

Further, FIG. 3 is a graph showing the relationship between the designed damping ratio and the actual damping ratio. When the output is open (indicated by a dashed line in the figure), the designed damping ratio and the actual damping ratio naturally match. But 1 in the output
In the case of the present embodiment (indicated by a broken line in the figure) in which a load of 0 kΩ is applied, the output terminal 12 is compared with the relationship between the designed attenuation ratio of the conventional device and the actual attenuation ratio (indicated by a solid line in the figure).
Since the impedance fluctuation seen from the above is suppressed, the relationship between the designed damping ratio of this device and the actual damping ratio is
You can see that it is almost linear.

Further, the circuit constituted by the resistors 11a to 11d for correcting the output impedance and the switches 10a to 10d is the resistor 11a as shown in the embodiment.
To 11d are connected in series and each resistor (resistor 11a
To 11d), in addition to connecting the switches 10a to 10d in parallel, as shown in FIG.
0a connected in series, a resistor 11b and a switch 10b connected in series, a resistor 11c and a switch 10c connected in series, a resistor 11d
Alternatively, a series circuit in which the switch 10d and the switch 10d are connected in series can be connected in parallel.

Further, the circuit composed of the resistors 11a to 11d for correcting the output impedance and the switches 10a to 10d is like an FET in which the resistance value between the drain and the source changes in accordance with the voltage applied to the gate. It is also possible to use a variable resistance element.

Next, FIG. 5 is a block diagram showing the configuration of an embodiment of DAT to which an integrated circuit in which the attenuator 1 is provided in the output stage is applied. The D / A converter 22 subjects the digital signal input from the input terminal 21 to D / A conversion processing and outputs an analog signal. The amplifier 23 is a D / A
De-emphasis processing is performed on the signal output from the converter 22. The low pass filter (LPF) is the amplifier 2
The high frequency component of the signal output from 3 is cut and only the low frequency component is output. The LPF 2 is connected to the headphone terminal 25.
The signal output from 4 is attenuated by the attenuator 1 and output. The signal output from the LPF 24 is directly output to the line terminal 26.

Further, its operation will be described. A digital signal reproduced from a tape (not shown) is subjected to processing such as separation of control signals and error correction in a reproducing circuit (not shown), and a D / A signal is input via an input terminal 21.
It is input to the converter 22. The analog signal that has been D / A converted in the D / A converter 22 and output is input to the amplifier 23. The LPF 24 removes the high-frequency component of the signal de-emphasized in the amplifier 23 and outputs only the low-frequency component. LP
The signal output from F24 is input to the line terminal 26 and the attenuator 1. In attenuator 1, L
The signal output from the PF 24 is −22 as described above.
It is attenuated in the range from 0 dB to 0 dB and is output to the headphone terminal 25. The signal output to the headphone terminal 25 is supplied to headphones (not shown) via a headphone amplifier (not shown).

In this case, since the signal level of the signal supplied to the headphone amplifier is attenuated by the attenuator 1, the headphone amplifier can be constructed by a bipolar operational amplifier having a good S / N ratio. The input impedance of the bipolar operational amplifier is several tens to several hundreds kΩ, which is considerably lower than the input impedance of the MOS operational amplifier, which is several MΩ. Therefore, when the output impedance changes intricately when the switches 4 and 6 are operated (controlled) by the control circuit 31, like the conventional attenuator shown in FIG. 7, the signal level output from the headphones suddenly decreases. In extreme cases or extremes, switches 4 and 6 should be used to increase the damping ratio.
The signal level rises even though is being operated.

However, as described above, the attenuator 1 of this embodiment uses the control circuit 8 to switch the switch 4
Even if (6) and 6 are operated (controlled), their output impedances are substantially constant, so that the signal level output from the headphones changes in proportion to the designed attenuation ratio.

The D / A converter 2 of the embodiment shown in FIG.
2 to LPF 24 and the attenuator 1 can all be formed on a one-chip MOSIC, for example.
Furthermore, in addition to this, for example, an A / D converter or the like may be added to be integrally formed on a semiconductor substrate on one chip.

[0049]

As described above, according to the attenuation circuit of the first aspect, the connection point of a plurality of resistors connected in series or in parallel for dividing and attenuating the signal is selected, and the impedance seen from the connection point is selected. The impedance of the resistor connected to the connection point is controlled according to. Therefore, fluctuations in the output impedance of the circuit are suppressed, and a linear damping ratio can always be obtained.

According to the attenuating circuit of the second aspect, the voltage dividing means, the selecting means, the impedance correcting means, and the control means are all integrally formed on a one-chip semiconductor substrate. Therefore, the circuit can be made compact.

According to the integrated circuit of the third aspect, a digital signal is converted into an analog signal, and a connection point of a plurality of resistors connected in series or in parallel for dividing and attenuating the analog signal is selected, The impedance of the resistor connected to the connection point is controlled according to the impedance seen from the connection point. Then, the D / A conversion means, the voltage dividing means,
The selection means, impedance correction means, and control means are all integrally formed on a one-chip semiconductor substrate. Therefore, the fluctuation of the output impedance of the circuit can be suppressed, and the circuit can be made compact.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an embodiment of an attenuation circuit of the present invention.

FIG. 2 is a diagram showing the impedance of the output terminal 7 when the switches 4 and 6 of the embodiment of FIG. 1 are operated, the state of the switch section 10, and the resistance value between the output terminals 7 and 12 ( FIG. 5 is a diagram showing a correction impedance), an impedance seen from an output terminal 12, and an attenuation ratio when a load of 10 kΩ is applied to the output terminal 12.

FIG. 3 shows the designed damping ratio and the output terminal 1 of the embodiment of FIG.
It is a graph which shows the relationship with the damping ratio when a load of 10 kΩ is applied to 2.

FIG. 4 is a circuit diagram showing a configuration of a second embodiment of a circuit including resistors 11a to 11d and switches 10a to 10d of the embodiment of FIG.

5 is a block diagram showing a configuration of one embodiment of DAT to which an integrated circuit provided with an attenuator 1 of the embodiment of FIG. 1 in a subsequent stage is applied.

6 is a circuit diagram showing a configuration of an analog switch in which a switch 4, a switch 6, and switches 10a to 10d in FIG. 1 are configured by field effect transistors.

FIG. 7 is a circuit diagram showing a configuration of an example of a conventional attenuator.

FIG. 8 shows the impedance seen from the output terminal 7 and the output terminal 7 when the switches 4 and 6 of FIG. 7 are operated.
It is a figure which shows the damping ratio when a load of 10 kΩ is applied to.

[Explanation of symbols]

 1 attenuator 3 series circuit 3a, 3b resistance 4 switch 4a to 4d contact 5 series circuit 5a to 5d resistance 6 switch 6a to 6d contact 8 control circuit 9 signal source 10 switch section 10a to 10d switch 11 series circuit 11a to 11d resistance 22D / A converter 23 amplifier 24 low-pass filter (LPF) 25 headphone terminal 26 line terminal 31 control circuit

Claims (3)

[Claims] 1. A voltage dividing means having a plurality of resistors connected in series or parallel for dividing and attenuating a signal, selecting means for selecting a connection point of the resistors of the voltage dividing means, and the selecting means. And an impedance correction unit having a plurality of resistors connected to the connection point of the resistors, and a resistance of the impedance correction unit corresponding to the impedance seen from the connection point of the resistors of the voltage dividing unit selected by the selection unit. A damping circuit comprising: a control unit that controls impedance. 2. The attenuation circuit according to claim 1, wherein the voltage dividing means, the selecting means, the impedance correcting means, and the controlling means are all integrally formed on a one-chip semiconductor substrate. .. 3. A D / A converting means for converting a digital signal into an analog signal and outputting the analog signal, and a plurality of resistors connected in series or in parallel for dividing and attenuating the analog signal output from the D / A converting means. A voltage dividing means, a selecting means for selecting a connection point of the resistors of the voltage dividing means, and an impedance correction having a plurality of resistors connected to the connection point of the resistors of the voltage dividing means selected by the selecting means. Means, and control means for controlling the impedance of the resistance of the impedance correction means in accordance with the impedance seen from the connection point of the resistance of the voltage dividing means selected by the selection means, the D / A conversion means The voltage dividing means, the selecting means, the impedance correcting means, and the control means are all integrally formed on a one-chip semiconductor substrate. Product circuit.