JPH05130516A - Solid-state imaging device - Google Patents

Abstract

(57) [Abstract] [PROBLEMS] To provide an image pickup apparatus in which exposure adjustment is performed by controlling the charge accumulation time of a solid-state image pickup element, and which can perform stable image pickup even in a high-speed shutter region. A reset pulse control circuit 20 is provided in an image pickup apparatus using a solid-state image pickup device 1 in which charge accumulation time is controlled by controlling a sweeping-out timing of accumulated charges.
A sawtooth wave that is reset to a predetermined potential is generated in each vertical cycle, the output level of the solid-state image sensor 1 is compared with this sawtooth wave, and the charge accumulation of the solid-state image sensor 1 is performed based on the comparison result. In addition to controlling the time, the timing at which the output level and the sawtooth wave match is detected, and the amplitude of the sawtooth wave is controlled in accordance with this detection timing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device using a solid-state image pickup device such as a CCD imager applied to a video camera or the like.

[0002]

2. Description of the Related Art Conventionally, for example, in a video camera, a photoelectric conversion element and a charge coupled element (CCD: C) which are solid-state image pickup elements.
As a mechanism for automatically adjusting the amount of light received by a so-called CCD imager composed of a charge coupled device) (hereinafter referred to as automatic exposure adjustment),
For example, a mechanism for automatically adjusting a so-called iris (aperture) incorporated in a lens disclosed in JP-A-63-82067 and the like (hereinafter referred to as an auto iris mechanism) is known.

Specifically, the video camera comprises a lens section 50 and a video camera body 60, as shown in FIG.

The lens section 50 includes a lens 51, an iris 52, a detection circuit 53 for detecting the level of an image pickup signal sent from the video camera body 60, and the detection circuit 5.
It has a comparison circuit 54 for comparing the output of No. 3 and the reference voltage, and an iris drive circuit 55 for controlling the opening and closing of the iris 52 based on the output of the comparison circuit 54.

Further, the video camera body 60 includes a CCD imager (hereinafter referred to as CCD) 61 which is a solid-state image pickup device.
And an amplification circuit 62 for amplifying the image pickup signal from the CCD 61, and a so-called AGC (Automatic Gain Control) for the image pickup signal amplified by the amplification circuit 62.
The AGC circuit 63 for applying 1) and a signal processing circuit 64 for converting the image pickup signal from the AGC circuit 63 into a video signal conforming to the so-called NTSC system, PAL system or the like are provided so that this video signal can be taken out from a terminal 65. It has become.

The auto iris mechanism is provided with an iris 52 built in the lens unit 50, a video camera main body 6
This is achieved by feeding back the output level of the CCD 61 built in 0.

That is, the amplification circuit 62 and the detection circuit 53
The opening / closing of the iris 52 is automatically adjusted so that the output level of the CCD 61 obtained via the reference voltage becomes the reference voltage, that is, the output of the comparison circuit 54 becomes zero.

On the other hand, as an exposure adjusting mechanism which does not use an iris, for example, the present applicant has previously proposed a mechanism for controlling the charge accumulation time of a so-called field accumulation type CCD image sensor (hereinafter, referred to as an electronic shutter) (Japanese Patent Application No. 2000-242242). Flat 2-23
8930).

Specifically, in a field storage type CCD image sensor having an electronic shutter function, the A in FIG.
When a low level signal (hereinafter referred to as a vertical blanking signal) V BLK indicating the so-called vertical blanking period (vertical blanking period) shown in FIG. 9 is supplied, the image read pulse SG (high level) shown in B of FIG. Is supplied, and the charges accumulated from the image read pulse SG of an arbitrary field to the image read pulse SG of the next field are read based on the image read pulse SG of the next field. ..

As shown in FIG. 9C, the electronic shutter function has a high level pulse (hereinafter referred to as "substrate") of a so-called substrate of the CCD image sensor after the image reading pulse SG of an arbitrary field is supplied. A SUB (referred to as a reset pulse) is supplied during a so-called horizontal blanking period (horizontal blanking period) as will be described later, the charges accumulated up to that point are swept away, and the next field after the last reset pulse SUB is supplied The time until the image reading pulse SG is supplied is controlled, and the charge storage time T _CHG is controlled. For example,
In the NTSC system, the maximum charge storage time T _CHG is 16.7 ms determined by the field frequency, and in the PAL system, the maximum charge storage time T _CHG is 20 ms determined by the field frequency.

[0011]

By the way, for example, in an industrial video camera, many interchangeable lenses of the so-called C mount system are used, and the lenses of the video camera main body can be freely combined and used. However, the auto-iris lens adopting the auto-iris mechanism as described above has various problems in connection (interface) with the video camera body. For example,
There were problems such as compatibility of the connector for connecting the auto iris lens and the video camera body, and matching problems of standards such as power supply voltage, current capacity, and feedback signal level supplied by the video camera body to the auto iris lens.

Further, as shown in FIG. 8 described above, the detection circuit 53, the comparison circuit 54, and the like are built in the lens unit 50, and each time the lens unit 50 is replaced, a reference is made in the lens unit 50. It was necessary to adjust the voltage and the like to obtain optimum exposure.

Further, in general, an auto iris lens is
It is more expensive than a manual iris lens in which the iris is manually adjusted, and cable connection is complicated.

Further, in the adjustment of the exposure time using the electronic shutter function described above, the horizontal blanking is performed so that the reset pulse SUB for sweeping away the accumulated charges does not affect the image pickup signal currently being read. Therefore, as shown in E of FIG. 8 described above, the charge accumulation time T _CHG is the time corresponding to one cycle of the so-called horizontal synchronizing signal (hereinafter referred to as 1H), that is, 64 μs. Is controlled as. Therefore, in the low-speed shutter region where the subject is dark and the shutter speed is slow, the stepwise (step) control of the charge accumulation time T _CHG is not a problem, but in the high-speed shutter region where the subject is bright and the shutter speed is fast, the step width is small. There was a problem that it was too coarse and not suitable for practical use.

In order to solve this problem, the applicant of the present invention has previously proposed an image pickup device capable of finely controlling the shutter speed (that is, the charge accumulation time) in the high shutter range (Japanese Patent Application No. 2-327850). ).

However, if a high-speed shutter of 1/1000 second or more is simply realized, the image signal that is picked up and output becomes unstable, and flicker may occur. That is, in the high-speed shutter region, the shutter speed may be several times faster even if the shutter speed is changed by one step, and the charge accumulation time may be doubled or more due to a slight change in the control signal. For example, 1/1 from the high speed side
Assuming that the shutter speed changes to 0000 seconds, 1/4000 seconds, 1/2000 seconds, ... It is assumed that the control signal fluctuates and the image is temporarily captured in 1/4000 second. At this time, the charge accumulation time becomes twice or more, so that the level of the image pickup signal temporarily becomes extremely large. In this way, if there is a constant level fluctuation in which the charge accumulation time temporarily becomes twice or more, when the output video signal is displayed on the monitor receiver, the screen brightness fluctuation occurs in a short cycle. It becomes so-called flicker,
The image becomes very unsightly.

Therefore, it is necessary to stabilize the control signal for determining the shutter speed.

In view of the above points, an object of the present invention is to provide an electronic shutter mechanism capable of stably capturing an image even in a high speed shutter range.

[0019]

According to the present invention, as shown in FIGS. 1 and 2, for example, a solid-state image pickup device 1 whose charge storage time is controllable by controlling the sweeping-off timing of stored charge, and a vertical A sawtooth wave generation circuit 27 that generates a sawtooth wave that is reset to a predetermined potential every vertical cycle by a reset pulse that is supplied during the blanking period, and a level detection unit 11 that detects the output level of the solid-state imaging device 1.
And a comparator 28 for comparing the output potential of the level detecting means 11 with the output potential of the sawtooth wave generating circuit 27.
By the comparison in the comparator 28, the sawtooth wave generation circuit 27
In the solid-state imaging device that controls the charge storage time of the solid-state imaging device 1 based on the timing when the output potential of the level detection means 11 exceeds the output potential of the level detection means 11, the sawtooth wave in the comparator 28 changes the output potential of the level detection means 11. Timing detection means 34 for detecting the exceeded timing is provided, and the detection result of the timing detection means 34 determines the sawtooth wave generation circuit 27.
It controls the amplitude of the sawtooth wave output by.

Further, according to the present invention, as shown in FIG. 1 and FIG. 2, for example, a solid-state image pickup device 1 capable of controlling charge accumulation time by controlling the sweeping-off timing of accumulated charges,
A first sawtooth wave generation circuit 27 that generates a sawtooth wave that is reset to a predetermined potential every vertical period by a reset pulse that is supplied during the vertical blanking period, and a level that detects the output level of the solid-state imaging device 1. Detecting means 11 and a comparator 28 for comparing the output potential of the level detecting means 11 with the output potential of the first sawtooth wave generating circuit 27 are provided, and the comparator 28 compares the output potential with the first sawtooth wave. A comparator in a solid-state imaging device that generates a predetermined pulse when the output potential of the state wave generation circuit 27 exceeds the output potential of the level detection means 11 and controls the charge storage time of the solid-state imaging device 1 based on this pulse. Timing detection means 34 for detecting the pulse output timing of 28, and a second sawtooth wave generation circuit 36 for generating a sawtooth wave which is reset to a predetermined potential every horizontal scanning period. Level detection means 35, 37 for detecting the output potential of the second sawtooth wave generation circuit 36 at the detection timing of the timing detection means 34 are provided, and the potential detected by the level detection means 35, 37 causes the first The amplitude of the sawtooth wave output from the sawtooth wave generation circuit 27 is controlled.

[0021]

By doing so, the amplitude of the sawtooth wave generation circuit that outputs a sawtooth wave having a vertical cycle is changed according to a minute change in the level of the image pickup signal by the solid-state image pickup element, and the image pickup is performed. When comparing the signal level and the vertical cycle sawtooth wave level, even if there is a slight change in the imaging signal level, the vertical cycle sawtooth wave level also changes, resulting in a constant state. The comparison is performed, and the charge accumulation time of the solid-state imaging device is stably controlled based on the comparison result.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 is a diagram showing the structure of a video camera to which the solid-state image pickup device of this embodiment is applied. In the figure, reference numeral 1 shows a solid-state image pickup device (hereinafter referred to as CCD) whose charge accumulation time can be controlled. The image light incident through an image pickup lens (not shown) is accumulated as electric charge for each pixel and is output as an electric image pickup signal. The electric charge accumulation time depends on a vertical drive pulse V SUB described later. Controlled.

In this case, the image pickup signal corresponding to the electric charge accumulated in the CCD 1 is read by the sample / hold circuit 2, the image pickup signal output from the sample / hold circuit 2 is amplified by the amplifier 3, and then the automatic gain adjusting circuit ( AGC circuit) 4
Adjust the gain to a predetermined level with. Then, the image pickup signal output from the automatic gain adjustment circuit 4 is supplied to the video signal processing circuit 5, and the video signal processing circuit 5 converts the image signal into a video signal of a predetermined format such as the NTSC system. The converted video signal is output from the output terminal 6 to the monitor receiver, V
Supply to various video equipment such as TR.

In this example, the image pickup signal output from the sample / hold circuit 2 is supplied to the detection circuit 11,
The detection circuit 11 performs peak detection (or average value detection) of the level of the image pickup signal, and supplies the detection output to the reset pulse control circuit 20 via the amplifier 12. Then, the reset pulse control circuit 20 compares the sawtooth wave of the vertical cycle with the detection output to generate the reset pulse X SUB based on the comparison result, and the reset pulse X S
The UB is supplied to the vertical drive circuit 13, and the vertical drive circuit 1
The vertical drive pulse V SUB in which the drive voltage is superposed on the reset pulse X SUB in 3 is set as the vertical drive pulse V SUB.
The SUB is supplied to the CCD 1, and the charge accumulation time of each field in the CCD 1 is determined by the vertical drive pulse V SUB.

Next, FIG. 2 shows the structure of the circuit block of the reset pulse control circuit 20, and FIG. 3 shows the circuit block. First, the reset pulse control circuit 20 has a system controller (not shown) of a video camera. ) Side, a horizontal transfer pulse CLP of a horizontal cycle and a read pulse X of a vertical cycle from terminals 21, 22 and 23 as control pulses, respectively.
The SG and the vertical synchronizing signal VD are supplied. And terminal 2
The pulses XSG and VD obtained at 2 and 23 are supplied to the V BLK pulse and sawtooth wave reset pulse generation circuit 24 to generate the vertical blanking signal V BLK and the sawtooth wave reset pulse having the vertical period. Then, the vertical blanking signal V BLK is supplied from the generating circuit 24 to the reset pulse X SUB generating circuit 25, and the sawtooth wave reset pulse is supplied to the vertical cycle sawtooth wave generating circuit 27. The vertical cycle sawtooth wave generation circuit 27 is a circuit for generating a sawtooth wave (sawtooth wave) whose potential changes in a sawtooth shape in a vertical cycle in response to a sawtooth wave reset pulse, and is supplied from a level conversion circuit 38 described later. The amplitude of the sawtooth wave is controlled by the voltage signal. Then, the sawtooth wave output from the vertical cycle sawtooth wave generation circuit 27 is supplied to the-side input terminal of the comparator 28.

The detection output of the image pickup signal supplied from the amplifier 12 side to the terminal 12a is supplied to the low-pass filter 29 for averaging, and the output of the low-pass filter 29 is supplied to one fixed contact 30a of the changeover switch 30. To do.
Reference numeral 31 in the drawing denotes a camera adapter. This camera adapter 31 is a terminal to which a control voltage for controlling the shutter speed is supplied from the outside. The voltage signal obtained by the camera adapter 31 is applied to the other fixed contact of the changeover switch 30. Three
Supply to 0b. In this case, when a plug is connected to the camera adapter 31 from the outside, the camera adapter connection detection circuit 32 detects this and connects the movable contact 30m of the changeover switch 30 to the other fixed contact 30b. When nothing is connected to, the movable contact 30m is connected to one fixed contact 30a.

In the following description, it is assumed that the movable contact 30m is connected to one fixed contact 30a and the output of the low pass filter 29 is supplied to the movable contact 30m.

The movable contact 30 of the changeover switch 30.
The voltage signal obtained at m is sent to the comparator 2 via the amplifier 33.
Supply to the + side input terminal of 8. And this comparator 28
Then, the level of the sawtooth wave output from the vertical cycle sawtooth wave generation circuit 27 is compared with the detection signal of the image pickup signal supplied from the low-pass filter 29 side. At this time, the comparator 29 outputs a high level signal “1” when the level of the detection signal is higher than the level of the sawtooth, and outputs a low level signal “0” when the level of the sawtooth is higher than the level of the detection signal. Output. The output of the comparator 29 is supplied to the reset pulse XSUB generation circuit 25 as a window pulse.

Then, in the reset pulse X SUB generation circuit 25, while the window pulse supplied from the comparator 29 is at the low level, the horizontal transfer pulse CLP obtained at the terminal 21 is thinned out to obtain the window pulse. The reset pulse X SUB in which the pulse of the horizontal cycle is superimposed is generated only while the signal is at the high level. Then, the reset pulse X SUB is applied to the terminal 26.
Is supplied to the vertical drive circuit 13 via the
It is supplied to CCD 1 as SUB.

With such a structure, the vertical cycle sawtooth wave output from the vertical cycle sawtooth wave generation circuit 27 and CC
The level of the image pickup signal obtained by image pickup in D1 is compared by the comparator 28 for each vertical period, and the reset pulse XSUB (vertical drive pulse V generated based on the result of this comparison).
The charge accumulation time of the CCD 1 is controlled by (SUB), and an automatic exposure adjustment mechanism is configured by controlling the shutter speed of the electronic shutter. The configuration so far is based on the same principle as the solid-state imaging device proposed by the present applicant.

In this example, the amplitude of the sawtooth wave output from the sawtooth wave generation circuit 27 is controlled by detecting a minute change in the window pulse output from the comparator 28. The configuration will be described below. The window pulse output from the comparator 28 is supplied to the sampling pulse generation circuit 34, and a pulse (sampling pulse) that rises at the timing when the window pulse falls from the high level to the low level is generated. Then, at the timing when this sampling pulse rises, the changeover switch 3
Switch 5

In this changeover switch 35, the sawtooth wave of the horizontal period output from the horizontal period sawtooth wave generation circuit 36 is supplied to one fixed contact 35a, and the other fixed contact 35b is opened. When the movable contact 35m is connected to the capacitor 37 and the movable contact 35m is connected to the one fixed contact 35a, the horizontal cycle sawtooth wave output from the horizontal cycle sawtooth wave generation circuit 36 charges the capacitor 37, The level conversion circuit 38 detects the charging potential of the capacitor 37.

In this case, the horizontal cycle sawtooth wave generation circuit 36 is
Horizontal transfer pulse CLP and vertical blanking signal V BL
K is supplied to generate a sawtooth wave whose potential changes in a sawtooth shape in a horizontal cycle in a period other than the vertical blanking period.

Then, as described above, the movable contact 35m of the changeover switch 35 is switched from one fixed contact 35a to the other fixed contact 35b at the timing when the sampling pulse rises, and the horizontal direction to the capacitor 37 is made at the timing when the sampling pulse rises. The charging of the sawtooth wave of the cycle is stopped, and the charging potential at this time is changed to the level conversion circuit 38.
To detect. Then, the level conversion circuit 38 performs level conversion of the detected potential and supplies it to the vertical cycle sawtooth wave generation circuit 27 as an amplitude control signal. The level conversion in the level conversion circuit 38 is performed so that the amplitude change of the sawtooth wave in the vertical cycle and the level change of the image pickup signal described later with reference to FIGS.

In the vertical cycle sawtooth wave generation circuit 27, the amplitude control signal supplied from the level conversion circuit 38 is supplied to the constant current source 27a (see FIG. 3) so that the amplitude of the sawtooth wave created is constant current. Corresponding to the output of the source 27a.

Next, the image pickup operation in the solid-state image pickup device constructed as described above will be described with reference to the timing chart of FIG. 4, focusing on the state of generation of the pulse supplied to the CCD 1.

First, the sawtooth wave of the vertical cycle created by the vertical cycle sawtooth wave generation circuit 27 is reset every time the read pulse XSG of the vertical cycle shown in FIG. 4A is supplied, and is shown in FIG. 4B. Become a signal. Here, the level R shown in B of FIG.
_Assuming that ₀ is the level of the image pickup signal supplied from the detection circuit 11 side to the comparator 28, the window pulse falling at the timing when the level R ₀ becomes equal to the sawtooth wave is shown in FIG.
As shown in C of FIG. This window pulse is supplied every time the read pulse XSG is supplied (that is, D in FIG. 4).
Each time the vertical blanking signal V BLK shown in (1) falls, the level is returned to the high level, and the level becomes the low level for each period according to the level of the image pickup signal. That is, when the level of the image pickup signal becomes higher and the level R ₀ becomes higher, the period during which the window pulse becomes low level in each vertical cycle becomes shorter.

Then, the horizontal transfer pulse CLP is E in FIG.
In the state shown in FIG. 4, the signal from which the pulse CLP is removed only during the period when the window pulse is at the low level and the predetermined period following the vertical blanking period is F in FIG.
The reset pulse X SUB shown in FIG. The reset pulse X SUB is supplied to the vertical drive circuit 13 to be a vertical drive pulse V SUB.
The charge accumulation time of each field in the CCD 1 is determined based on the SUB. That is, in each field period, while the pulse of the horizontal cycle corresponding to the horizontal transfer pulse CLP is being supplied, the accumulated charge is swept away in the reset period, and the charge is accumulated while the reset pulse X SUB does not change. Then, the accumulated charge is read at the timing when the read pulse XSG is supplied and is used as an image pickup signal.
Note that the horizontal cycle indicated by the horizontal transfer pulse CLP in FIG. 4 is thinned out from the actual horizontal cycle for the sake of explanation.

Here, in this example, a minute change in the level of the image pickup signal (level R ₀ shown in B of FIG. 4) is detected. That is, the sampling pulse generation circuit 34 generates a sampling pulse (G in FIG. 4) at the timing when the window pulse (C in FIG. 4) falls, and the horizontal cycle sawtooth wave generation circuit 36 operates at the timing when the sampling pulse rises. A horizontal cycle sawtooth wave (H in FIG. 4) to be output is sampled.

The sampling state of the sawtooth wave of the horizontal period will be described with reference to FIG. 5. In the state where the sawtooth wave of the horizontal period is continuously output as shown in FIG. It is assumed that the window pulse has fallen as indicated by the solid line in B of FIG. At this time, a sampling pulse (solid line in C of FIG. 5) is generated at the falling timing of the window pulse, and the level conversion circuit 38 detects the level of the sawtooth wave in the horizontal cycle when the sampling pulse rises. ..

The level detected at this time changes correspondingly with a slight change in the timing when the window pulse falls. That is, even if the change point of the window pulse slightly changes before or after the window pulse as shown by the broken line in FIG. However, a large variation occurs in the level detected based on the sampling pulse.

Then, the amplitude of the sawtooth wave of the vertical cycle created by the vertical cycle sawtooth wave generation circuit 27 is changed according to the detected level. Since the amplitude of the sawtooth changes, the comparison between the sawtooth wave having a vertical cycle and the level of the image pickup signal in the comparator 28 can be stably performed in a constant state. That is, for example, as shown in A of FIG. 6, when the amplitude of the sawtooth wave of the vertical period is constant when the level of the image pickup signal is temporarily reduced from R ₀ to R ₁ , the window pulse becomes B of FIG. The state shown in FIG. 6 changes to the state shown in FIG. 6C, and the low level period is expanded. If the window pulse changes, it affects the reset pulse X SUB, the charge accumulation time becomes long, and the shutter speed changes. However, in this example, the sawtooth wave of the horizontal cycle described in FIG. By level detection,
Since the control is performed to reduce the amplitude of the sawtooth wave V _{0 in} the vertical cycle to V ₁ , the timing at which the sawtooth wave in the vertical cycle exceeds the level of the image pickup signal becomes constant, and the window pulse is in the state shown in B of FIG. Therefore, the comparison by the comparator 28 is stably performed without being affected by the minute fluctuation of the level of the image pickup signal.

Further, when the level of the image pickup signal is temporarily increased, the same control is performed. That is, as shown in A of FIG. 7, when the amplitude of the sawtooth wave in the vertical cycle is constant when the level of the image pickup signal temporarily rises from R ₀ to R ₂ , the window pulse changes to B in FIG. The state shown in is C in FIG.
The shutter speed is increased as the low level period is shortened and the sawtooth amplitude is V _{0 correspondingly.}
From V to V ₂ , the window pulse does not change from the state shown in FIG. 7B.

Therefore, the shutter speed does not change unless there is a level change of the image pickup signal that changes the timing of the fall of the window pulse for one horizontal scanning period or more. Then, when there is a relatively large level change of the image pickup signal that changes the fall timing of the window pulse for one horizontal scanning period or more, the window pulse correspondingly changes, the shutter speed changes, and the exposure adjustment is performed. Be seen.

Thus, according to the solid-state imaging device of this example,
When the exposure is adjusted by controlling the charge storage time of the CCD 1 (that is, the shutter speed), the shutter speed does not change even if there is a slight change in the level of the detected image pickup signal.
It is possible to prevent a phenomenon in which the shutter speed is constantly changed due to a minute change in the level of the image pickup signal to cause flicker, and stable image pickup is performed.

Further, in the case of this example, since the circuit is configured to operate in an analog manner, a digital control circuit such as a microcomputer is not required, the circuit can be configured easily and inexpensively, and a circuit of this exposure adjustment mechanism is required. The space is very small (microcomputers require a relatively large space), which allows the video camera to be miniaturized.

[0048]

According to the present invention, the level comparison between the image pickup signal level and the sawtooth wave of the vertical cycle, which is performed for controlling the charge accumulation time of the solid-state image pickup device, shows that the image pickup signal level has a slight variation. Is stably performed in a constant state, the charge accumulation time of the solid-state image sensor is stably controlled based on the comparison result, and the captured image is stable.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an overall configuration of an embodiment of the present invention.

FIG. 2 is a configuration diagram showing a reset pulse control circuit of one embodiment.

FIG. 3 is a circuit diagram showing a circuit configuration of a reset pulse control circuit according to an embodiment.

FIG. 4 is a timing diagram provided for explaining a reset pulse control circuit according to an embodiment.

FIG. 5 is an explanatory diagram showing a window pulse detection state according to an embodiment.

FIG. 6 is an explanatory diagram showing a window pulse generation state according to an embodiment.

FIG. 7 is an explanatory diagram showing a window pulse generation state according to an embodiment.

FIG. 8 is a block diagram showing an example of a conventional video camera.

FIG. 9 is a timing diagram for explaining a conventional solid-state imaging device.

[Explanation of symbols]

 1 Solid-state imaging device (CCD) 11 Detection circuit 20 Reset pulse control circuit 25 Reset pulse X SUB generation circuit 27 Vertical cycle sawtooth wave generation circuit 28 Comparator 34 Sampling pulse generation circuit 36 Horizontal cycle sawtooth wave generation circuit

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroshi Fukui 6-735 Kita-Shinagawa, Shinagawa-ku, Tokyo Sony Corporation

Claims (2)

[Claims] 1. A solid-state image sensor capable of controlling charge accumulation time by controlling a sweeping-out timing of accumulated charges, and a reset pulse supplied during a vertical blanking period to reset to a predetermined potential every vertical cycle. A sawtooth wave generating circuit for generating a sawtooth wave, level detecting means for detecting the output level of the solid-state image sensor, and an output potential of the level detecting means and an output potential of the sawtooth wave generating circuit. A comparator is provided, and the timing at which the output potential of the sawtooth wave generation circuit exceeds the output potential of the level detection means is detected by comparison by the comparator, and the charge of the solid-state image pickup device is detected based on this timing. In the solid-state imaging device for controlling the accumulation time, the timing at which the comparator detects the timing when the sawtooth wave exceeds the output potential of the level detection means. The detecting means is provided, the detection result of the timing detection unit, a solid-state imaging apparatus adapted to control the amplitude of the sawtooth wave in which the sawtooth wave generating circuit outputs. 2. A solid-state image sensor capable of controlling charge accumulation time by controlling a sweeping-off timing of accumulated charges, and a reset pulse supplied during a vertical blanking period to reset to a predetermined potential every vertical cycle. Of the first sawtooth wave generation circuit, a level detection means for detecting the output level of the solid-state image sensor, an output potential of the level detection means and the first sawtooth wave generation circuit. A comparator for comparing with the output potential is provided, and a predetermined pulse is generated when the output potential of the first sawtooth wave generation circuit exceeds the output potential of the level detection means by comparison by the comparator. A solid-state imaging device for controlling the charge storage time of the solid-state imaging device based on the pulse; timing detection means for detecting pulse output timing of the comparator; A second sawtooth wave generating circuit that generates a sawtooth wave that is reset to a predetermined potential every inspection period; and the second sawtooth wave at the detection timing of the timing detection means.
And a level detecting means for detecting an output potential of the sawtooth wave generating circuit, the amplitude of the sawtooth wave output from the first sawtooth wave generating circuit is controlled by the potential detected by the level detecting means. Solid-state imaging device.