JPH05196688A - Test system for semiconductor ic - Google Patents

Abstract

PURPOSE:To shorten the test time by short-circuiting a plurality of pins at specified intervals, and providing a plurality of pin-DC test unit groups connected to DC test units, and testing them while shifting them in order separately for each DC unit. CONSTITUTION:Taking the example of the case where the number of pins of IC is 12 and the number of DC units is four, pins NOs1, 5, and 9 are set to a DC pin 1 and those are all short-circuited. Similarly, pins 2, 6, and 10, to DC2, and pins 3, 7, and 11, to DC 3, and pins 4, 8, and 12, to DC 4, are set, and those are all short-circuited, respectively First, the measurement is started with the unit of DC 1, and it advances to DCs 2, 3, and 4. Since each unit is independent, the fellow adjacent pins are never measured at the same time. This way, since the pins allotted to the DC units are all short-circuited, respectively, and those are measured en-block in order of units, the test time can be shortened, and synthetic throughput can be elevated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor IC test system, and more particularly to a DC characteristic test system.

[0002]

2. Description of the Related Art A conventional test system is equipped with several measuring units for performing a DC test (direct current capability check) of an IC, and each pin of the IC to be measured is assigned to this DC unit for testing. The method is shown in FIG.
As shown in (c), there are three systems, A, B, and C. Where I
Assume that you measure pins 1 to 12 of C and that you have four measurement units. The pin assignment of each unit is as shown in FIG.

In the test A method, one pin is set for each unit, and the test proceeds in the order of units and pin numbers. Therefore, 12 tests are performed.

In the test B method, one pin is set for each unit, but unlike the method A, four units simultaneously execute the test. Therefore, the test is completed three times.

In the test C method, all the pins assigned to each unit are short-circuited and the tests are executed simultaneously for each unit, so that the measurement for 12 pins is completed in one test.

Which of these methods A to c is selected is determined according to the contents of the test. FIG. 4 is an example of a pin-to-pin leak test that checks whether the pins of the IC are completely insulated. Here, the test result is because a short circuit occurs between pins 2 and 3 via a resistor R. Is determined to be a defective IC.

That is, when measuring every pin, 2
By applying 5V to the pin and setting 0V to the 3rd pin, it is measured whether or not a current flows between the 2nd pin and the 3rd pin. In this test, the test A method of FIG. 3A is used.

[0008]

This conventional semiconductor IC
The test system of the IC is the IC shown in FIG.
When measuring the inter-pin leak of
Since the measurement is performed pin by pin, the determination can be performed accurately, but there is a drawback that the test time becomes long because the number of measurements is required for the number of pins.

In the B method, since four pins are measured simultaneously, the same potential is set on pins 1 to 4, and the leak between pins 2 and 3 shown in FIG. 4 cannot be determined.

In the C method, since all pins are measured simultaneously, it is divided into odd-numbered pins and even-numbered pins in the program for measuring the IC, and it is necessary to devise such that the same potential is not applied to the apparent pins, and there are many types of ICs. At present, there is a drawback that a large number of man-hours are required for handling. Therefore, at present, there is no other effective means, and the result is measured by method A at the expense of test time.

[0011]

A semiconductor IC test system according to the present invention is a semiconductor IC test system in which a plurality of pins are connected to a plurality of DC test units to perform an electrical DC characteristic test. Is provided with a plurality of pin-DC test snoop groups connected to the DC test unit by short-circuiting with a predetermined feeling, and the DC units are sequentially tested for each DC unit.

[0012]

The present invention will be described below with reference to the drawings. FIG. 1A shows the number of DC units to be measured and the pin assignment diagram of each IC. Here, the number of IC pins is 12
The case of 8 pins. Considering the case where there are four DC units, the DC1 unit has (4n + 1) pins,
DC2 is in charge of the (4n + 2) pin, DC3 is in charge of the (4n + 3) pin, and DC4 is in charge of the (4n + 4) pin.

FIG. 1B is a schematic diagram of the connection of pin-DC test unit groups for explaining the measuring operation concept of the present invention. The number of CD units is 4, and the number of pins to be measured is 1 to 12 pins. Here, 1 for DC1 unit
Pins 5 and 9 are set and all are short-circuited. DC2 as well
Pins 2, 6 and 10 are set in the unit and all are short-circuited. Pins 3, 7 and 11 are set in the DC3 unit and all are short-circuited. Pins 4, 8 and 12 are set in the DC4 unit and all are short-circuited.

Next, the measurement order of each unit is shown in FIG. First, start measurement from the DC1 unit, and
Go to 2, 3 and 4. Since each DC unit is independent,
Never measure pins next to each other at the same time. Figure 1
If there are a plurality of DC units as shown in (a), the same measurement procedure is performed. It has all the conventional test functions shown in FIG.

[0015]

As described above, according to the present invention, when a large number of pins such as leaks between pins must be measured, all the pins assigned to the DC unit are short-circuited and the units are sequentially arranged as compared with the case of measuring for each pin. Since the measurement is performed collectively, the test time required for measurement can be shortened and the overall throughput can be increased. Further, since the adjacent pins are not measured at the same time, it can be accurately determined.

[Brief description of drawings]

FIGS. 1A and 1B are diagrams showing the number of DC units, pin assignments of each IC, and pin-DC test unit group connection schematic diagrams, respectively, for explaining one embodiment of the present invention. ..

FIG. 2 is a measurement flow chart when the test of FIG. 1 is performed.

3A to 3C are respectively conventional semiconductor ICs.
3 is a schematic diagram of A to C methods of the test system of FIG.

FIG. 4 is a circuit diagram of an example of a leak test of a semiconductor IC.

Claims (1)

[Claims] 1. In a test system of a semiconductor IC for connecting a plurality of pins to a plurality of DC test units to perform an electric DC characteristic test, the plurality of pins are short-circuited with a predetermined feeling to the DC test unit. Connected pin-
A test system for a semiconductor IC, wherein a plurality of DC test snit groups are provided, and the DC units are sequentially tested.