JPH05199459A - Digital fader device - Google Patents

Abstract

(57) [Summary] [Purpose] Fader is performed without using a multiplier. [Structure] A predetermined input / output characteristic is stored in a memory, an input digital value is made to correspond to an address of this memory, and an output digital value is made to correspond to the content indicated by this address. ) Is easily derived, and not only γ correction but also fade-in / out is performed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital fader device in a device such as a video camera or an electronic camera that fades in / fade out images.

[0002]

2. Description of the Related Art An example of a conventional digital fader device will be described below with reference to FIG. In FIG. 3, n
The bit digital video input signal Si is supplied to the delay device 21 and the subtractor 23. The signal supplied to the delay device 21 is delayed and supplied to the adder 22. Subtractor 2
The video signal supplied to No. 3 is subtracted from the reference value and supplied to the multiplier 24. Subtractor 23 supplied to multiplier 24
The output signal of is multiplied by a coefficient according to the signal supplied from the gate 27 and is supplied to the adder 22. The output signals of the delay device 21 and the multiplier 24 supplied to the adder 22 are added and output as an n-bit digital video output signal So.

The switch 25 is a fade ON supplied.
Controlled by the / OFF signal, the pulse supplied when the fade is ON is supplied to the counter 26. Counter 2
A fade-in / out signal is supplied to 6, and the pulse supplied according to this fade-in / out signal is counted up or down, and is supplied to the multiplier 24 via the gate 27. The counter output is Co (t),
If the video input signal is Si and the video output signal is So (t), for example, in the case of white fade, So (t) = Si + {(2 ⁿ −1) −Si} × Co (t) output characteristics can be realized, and if the image input signal Si is small, it changes rapidly, and if it is large, it changes slowly and the reference value 2 ⁿ −
Fade out to 1. It also fades in by the reverse process. The time required for fade-in / out can be set by the frequency of the pulse supplied to the counter 26. However, in the conventional digital fader device,
There is a problem that the circuit scale becomes large because the multiplier 24 is used.

[0004]

As described above, the conventional device has a problem that the circuit scale becomes large because the multiplier is used. The present invention eliminates the above-mentioned drawbacks of the prior art, and is a Look used for gamma correction.
It is intended to realize a fader function by using an Up Table (hereinafter referred to as LUT) method and reduce the circuit scale.

[0005]

In order to achieve the above object, in the present invention, γ correction of a video signal is performed and γ correction is performed.
There is provided a digital fader device characterized by comprising a look-up table for γ correction for outputting a corrected video signal, and means for rewriting the look-up table into fade-in or fade-out data at predetermined intervals. ..

[0006]

In the structure thus constructed, a predetermined input / output characteristic is stored in the memory, the input digital value is made to correspond to the address of this memory, and the output digital value is made to correspond to the content indicated by this address. By
LUT for easily deriving output characteristics (particularly non-linear characteristics)
Depending on the method, not only γ correction but also fade-in / out can be performed.

[0007]

Embodiments of the present invention will be described in detail below with reference to FIGS. In Figure 1, nbit
The digital video input signal is supplied to the multiplexer 10. The multiplexer 10 is a selector for selecting an address and video data for rewriting the γ correction for fade into the VBLK period in the vertical blanking period (hereinafter referred to as VBLK period) and the video period, respectively, and the logic circuit. The selected signal is supplied to the γ correction LUT (RAM) 11 which is controlled by the output signal of the signal 12. The V system pulse is supplied to the logic circuit 12. The logic circuit 12 operates only when the fader ON signal is supplied, and supplies the supplied V-system pulse to the multiplexer.

The microcomputer 15 is controlled by a fader ON / OFF signal, and controls the address generation circuit 13 and the fader data generation circuit 14 according to the supplied fade-in / out signal. The address generation circuit 13
It is controlled by the microcomputer 15 and supplies an address to the multiplexer 10. The fader data generation circuit 14 is controlled by the microcomputer 15 and supplies the fader data to the γ correction LUT 11. The γ correction LUT 11 outputs a signal obtained by γ-correcting the signal supplied from the multiplexer 10 with the signal supplied from the fader data generation circuit 14. When executing the fader, fader O
The N signal is supplied to the microcomputer 15, and the control signal from the microcomputer 15 multiplexes an address from the address generation circuit 13 and a fader data from the fader data generation circuit for each VBLK period (or for each VBLK period at a constant interval). 10 is supplied to the γ correction LUT 11. After selecting the address with the multiplexer 10 during the VBLK period, the contents of the table of the γ correction LUT 11 are changed to
For example, in the case of white fade-out, it is rewritten as shown in FIG. In the next video period, the new fader data is used in the γ correction LUT 11 to realize the fader. In such a digital camera that performs γ correction using the LUT, the fader can be realized without using a large-scale multiplier. During the fader period and white balance after γ correction, control such as white balance is maintained in the state just before the fader starts,
Canceled after the fader ends.

[0009]

According to the present invention, γ can be obtained without using a multiplier.
A fade function can be realized by using the correction LUT, and the circuit scale can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of a digital fader circuit according to the present invention.

FIG. 2 is a time response characteristic of a fader characteristic of the digital fader circuit according to the present invention.

FIG. 3 is a block diagram of a conventional digital fader circuit.

[Explanation of symbols]

10 ... Multiplexer, 11 ... γ correction LUT, 12 ...
Logic circuit, 13 ... Address generation circuit, 14 ... Fader data generation circuit, 15 ... Microcomputer

Claims (1)

[Claims] 1. A γ-correction look-up table for γ-correcting a video signal and outputting a γ-corrected video signal, and means for rewriting the look-up table into fade-in or fade-out data at predetermined intervals. A digital fader device characterized by being provided.