JPH05199558A - Electronic switchboard - Google Patents

Abstract

PURPOSE:To output the digital codes including such codes that cannot be outputted from a code generator to a circuit network. CONSTITUTION:A code generator 1 outputs a 1st code which is set for initialization of the reading address signal 5 supplied to a code memory 2 after replacing the code with a 2nd code that is not used among the codes which output the necessary bit trains. Meanwhile a code conversion memory 12 converts the 2nd code into the 1st code after the output of the generator 1 is sent to the memory 12 and outputs the codes except the 2nd code to a circuit network 15.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is used as a digital bit string transmitting means of an electronic exchange. In particular, it relates to a digital bit string sending means for converting a specific bit string pattern by a coder.

[0002]

2. Description of the Related Art In a conventional example, data from a digital bit string generator is output as it is without using a coder, or even if a coder is used, only a specific bit string pattern is not converted.

[0003]

In such a conventional example, when a specific bit string pattern is set for initialization of a read address signal, the specific bit string pattern is input to a memory for generating a digital bit string. Since it is used only as a control pattern for returning to the initial value, the specific bit string pattern itself cannot be output as a digital bit string. Also, because only a specific bit string pattern is not converted, when you want to send a specific bit string pattern as data, send another bit string pattern, and only when this other bit string pattern is input by the coder, It is not possible to finally send out a specific bit string pattern by converting the same code. As described above, the conventional example has a drawback that the same code as the specific bit string pattern set for initialization of the read address signal cannot be transmitted.

The present invention eliminates such drawbacks, and an object of the present invention is to provide an electronic exchange having means for outputting a digital code including a code that cannot be output by a code generator to a network.

[0005]

SUMMARY OF THE INVENTION The present invention comprises a code generator for continuously generating a predetermined bit string,
In an electronic exchange equipped with a code converting means including a converting means for converting an inputted digital bit string into another digital bit string, the code generator comprises a memory in which digital bit string data is stored in advance, and a read address in this memory. A means for supplying a signal to read out digital bit string data stored in advance in this memory, and a read address signal to an initial value when it is detected that a predetermined first digital bit string is read out from the memory. And means
The code conversion means is equivalent to a second digital bit string, and means for invalidating the conversion means when a digital bit string which is not equal to a predetermined second digital bit string is inputted and relaying the inputted digital bit string. And a means for relaying the digital bit string converted into the digital bit string equal to the first bit string by the converting means when the digital bit string is input.

Here, the first digital bit string may be a control pattern for returning the read address signal input to the memory to an initial value.

[0007]

The code generator that cannot output the first code set for initialization of the read address signal supplied to the code storage memory is used in the code that outputs the bit string that requires the output of the same value as the first code. The output of the code generator is sent to the digital code conversion memory, the second code is converted to the first code, and the other codes other than the second code are not converted and output to the circuit network. To be done.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of this embodiment. In this embodiment, a code generator 1 for generating a digital bit string, a time division switch 8 for setting a speech path, a central control unit 9 for controlling the entire exchange and a code conversion memory internally connected to a line network 15 to serve as a coder. A trunk device 11 having 12 is provided. That is, in this embodiment, as shown in FIG. 1, a code converter including a code generator 1 for continuously generating a predetermined bit string and a conversion means for converting an input digital bit string into another digital bit string. As a feature of the present invention, the code generator 1 includes a code conversion memory 12 which is a means, and a code storage memory 2 which is a memory in which digital bit string data is stored in advance, and a read address in the memory. A counter 3, which is a means for supplying a signal to read out digital bit string data stored in advance in this memory, and a read address signal when detecting that a predetermined first digital bit string is read out from the memory. A pattern monitoring circuit 4 which is a means for returning to an initial value,
The code conversion means is equivalent to a second digital bit string, and means for invalidating the conversion means when a digital bit string which is not equal to a predetermined second digital bit string is inputted and relaying the inputted digital bit string. And a means for relaying the digital bit string converted into a digital bit string equal to the first bit string by the converting means when the digital bit string is input.

Next, the operation of this embodiment will be described. The code generator 1 sequentially reads a data pattern stored in the code storage memory 2 in accordance with a read address signal 5 supplied from a counter 3 that increments the address value by "1", and generates code data 6. .. The pattern monitoring circuit 4 constantly monitors the code data 6, and when it recognizes the data set for initialization of the read address signal (in this embodiment, it is'FFH '), it outputs the counter reset signal 7 to the counter 3. It is sent to initialize the read address signal 5. By repeating the above operation, the code generator 1 repeatedly transmits the data pattern stored in the code storage memory 2. In addition, the trunk device 11 connected to the line network 15
Has a code conversion memory 12 which adjusts the digital signal sent from the time division switch 8 to a level or a code suitable for the side of the network 15 and outputs the code.

Now, a case where the code compression code shown in FIG. 2 is sent to the line network 15 as an example when the data pattern generation method of the code generator 1 is adopted will be described. The basic data pattern of the example shown in FIG. 2 is "11, 33, FF, 2
2H ”. When this pattern is stored in the code storage memory 2 as it is, since the address signal initialization data is "FFH", the output code compression code is "1".
1,33H ”will be repeated. A code pattern that is not used in the code compression code pattern sequence to be transmitted (here, "FEH" as an example) is
The “FFH” as output data is stored in an area on the code storage memory 2 that requires it (FIG. 3). The central control unit 9 sends to the time division switch 8 a connection instruction between the code generator 1 and the trunk unit 11. The time division switch 8 sets the communication path 10 according to an instruction from the central controller 9. The code generator 1 performs "11,
33, FE, 22H ”basic data pattern is repeatedly read from the code storage memory 2, and the time divisional switch 8
To send to. This data is input to the trunk device 11 via the communication path 10 of the time division switch 8 and further input to the code conversion memory 12 as the address input signal 13. In this embodiment, the code conversion memory 12 stores the data shown in FIG. 4. When the address input signal 13 is "FEH", "FFH" is output and the input is "FH".
Otherwise, the same value as the input data is output.
The data sent from the code generator 1 is finally converted by the code conversion memory 12 and then "11, 33, F
It becomes a code compression code pattern that repeats "F, 22H" and is sent to the line network 15.

[0011]

As described above, according to the present invention, it is possible to transmit a digital bit string as data having the same value as a control digital bit string for initializing a read address signal supplied to a data memory for generating a digital bit string. Since it is possible, there is an effect that the required digital bit string can be transmitted without being restricted by the operation system of the code generator.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a diagram showing the contents of a code compression code pattern related to FIG.

FIG. 3 is a diagram showing the contents of a code storage memory included in FIG. 1.

FIG. 4 is a diagram showing the contents of a code conversion memory included in FIG. 1.

[Explanation of symbols]

 1 code generator 2 code storage memory 3 counter 4 pattern monitoring circuit 8 time division switch 9 central control unit 10 speech path 11 trunk device 12 code conversion memory 15 line network

Claims (2)

[Claims] 1. An electronic exchange comprising a code generator for continuously generating a predetermined bit string, and a code converting means including a converting means for converting an input digital bit string into another digital bit string. The code generator includes a memory in which digital bit string data is stored in advance, a means for supplying a read address signal to this memory to read out digital bit string data stored in this memory in advance, and a predetermined first digital bit string. Means for returning the read address signal to the initial value when it is detected that the read bit signal is read from the memory, and the code conversion means is provided when a digital bit string which is not equal to the predetermined second digital bit string is inputted. Disables the above conversion means And a unit for relaying the digital bit string converted into a digital bit string equal to the first bit string by the converting unit when a digital bit string equal to the second digital bit string is input. An electronic exchange characterized by that. 2. The electronic exchange according to claim 1, wherein the first digital bit string is a control pattern for returning a read address signal input to the memory to an initial value.