JPH0519993B2 - - Google Patents

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a method for manufacturing a diosephin junction element constructed using a superconducting material that operates at extremely low temperatures, and particularly relates to a method for manufacturing a diosephin junction element constructed using a superconducting material that operates at extremely low temperatures. The present invention relates to a method for manufacturing fine diosefin elements.

[Background of the invention]

Regarding the conventional manufacturing method of Nb-based diosephine junction elements, for example, the lower electrode and the upper electrode are made of Nb.
In the Josephson junction, the lower electrode,
A method has been used in which the tunnel barrier layer and the upper electrode are continuously etched, and the parts other than the junction are backfilled with an insulator (M.
Gurvitch et al., IEEE Transactions on Magnetics (IEEE
(Trans. MAG.) MAG-vol. 19, p. 791, 1983). According to this method, a junction can be formed without intervening a pattern forming process, so a high-quality Josephson junction with low leakage current can be obtained. However, in this device manufacturing method, there is a limit to the bonding dimensions and the reproducibility of the dimensions.

[Purpose of the invention]

An object of the present invention is to provide a manufacturing method capable of miniaturizing bonding dimensions and achieving reproducibility of bonding dimensions in a diosefin bonding device using Nb or a superconducting material containing Nb as a constituent element.

[Summary of the invention]

In order to achieve the above object in the present invention,
The following method was used in the pattern forming process after successively forming the lower electrode, tunnel barrier layer, and upper electrode to achieve miniaturization of the junction dimensions. That is, an elongated rectangular resist pattern including a desired bonding portion is formed, and at least the upper electrode film in a portion other than the resist pattern is completely removed by an etching method.
Next, an insulating layer is formed on the etched portion by a method such as anodic oxidation. Next, an elongated rectangular resist pattern including a desired bonding portion is again formed at a position intersecting the first rectangular pattern. Etch the areas not covered by resist. After the etching process, parts other than the resist pattern are backfilled with an insulating material such as SiO. A diosephin junction element is completed by forming a wiring film that connects to the junction.

[Embodiments of the invention]

Hereinafter, one embodiment of the present invention will be described based on the drawings. In FIG. 1, a Nb film 2 having a thickness of 200 nm and serving as a lower electrode was formed on a substrate of a Si wafer 1 by magnetron sputtering. The conditions during formation were an Ar pressure of 1.3 Pa and a deposition rate of 3 nm/s. Next, the wafer was moved to just below the A target in the same vacuum apparatus, and A was formed to a thickness of 4 nm. At this time, the deposition rate of A was 0.3 nm/s.
After forming the A film, 40 Pa of oxygen gas was introduced into the vacuum apparatus, and the film was left to stand at room temperature for several minutes to form the surface oxide film layer 3 of A to serve as a tunnel barrier layer. After vacuum evacuation again, the wafer was moved directly below the Nb target and was sputtered using the magnetron sputtering method.
A Nb film 4 serving as an upper electrode was formed to a thickness of 100 nm.

After forming the three-layer film, the wafer is taken out from the vacuum equipment.
A rectangular resist pattern including the bonding portion was formed (FIG. 2). The upper electrode Nb film 4 other than the resist pattern portion was removed by reactive ion etching using CF ₄ . Furthermore, a 500eV Ar beam is used to form A oxide and A, which will become the tunnel barrier layer.
Layer 3 was etched. Anodic oxidation is performed with the lower electrode Nb film exposed to a thickness of 40 to 50 nm.
A Nb oxide layer 5 was formed.

Next, a resist pattern including a bonding portion and a wiring portion formed by a lower electrode was formed (FIG. 3).
The upper electrode Nb film ₄ was etched by reactive ion etching using CF 4 , the A and A oxide layers 3 were etched by ion etching using Ar beam, and the lower electrode Nb film 4 was etched by reactive ion etching using CF ₄ .
Film 2 was etched. The reason why the A and A oxide layers 3 were etched with an Ar beam is that these A layers cannot be etched by reactive ion etching using CF ₄ gas. This means that the boiling point of AF ₃ is
This is because the temperature is as high as 1040°C, and even if the A reactant is formed by the CF ₄ gas, it remains on the membrane surface.

Next, a rectangular resist pattern including the bonding portion and intersecting with the rectangular pattern was formed (FIG. 4). The upper electrode Nb film 4 was etched at locations other than the resist pattern by reactive ion etching using CF ₄ gas. In this etching process, the upper electrode Nb
The film 4 is etched, the etching rate of the Nb oxide layer 5 is relatively slow, and etching does not proceed at all on the surface of the A oxide layer 3. Therefore, after the etching process of the upper electrode Nb film 4 is completed, the Nb oxide layer 5 formed by anodic oxidation is left as an insulating layer. At the end of the etching process, the end portion of the lower electrode Nb film 2 and the area of the first rectangular pattern that is not covered by the second rectangular resist pattern are coated with Nb or A.
The oxide layer is exposed. In order to completely insulate these exposed parts, a silicon monoxide (SiO) film 6 was formed. The SiO film in unnecessary areas was removed together with the resist film by a lift-off method.

Next, after cleaning the surface of the junction upper electrode film by high frequency discharge in an Ar gas atmosphere, a 300 nm thick Nb film 7 was deposited (FIG. 5).
The Nb film was deposited by the magnetron sputtering method as in the case of the bonding electrode film. Furthermore, after the resist pattern was formed, the portion of the Nb film other than the resist pattern was removed by reactive ion etching using CF ₄ gas, thereby forming a wiring layer 7 connected to the upper electrode.

By going through the above process, the dimensions of the joint part
We were able to obtain a 1.5 μm square Josephson device. Moreover, the critical current distribution width for 80 1.5μm□ Josephson elements connected in series is ±10%.
It was within Regarding the area distribution of the Josephson element, the maximum distribution width was ±5%. These uniformities in area and characteristics mean that the Josephson device produced according to the above method has characteristics sufficient to be used in the computer switching circuit described in the field of application of the invention.

Generally, there are four types of performance required of Josephson devices. In other words, (1) the junction capacitance is small, (2) the characteristics are uniform, (3) the leakage current ratio is small, and (4) the material has durability.

In the present invention, as described in the embodiments, the junction capacitance described in (1) can be reduced by miniaturizing the junction dimensions. Furthermore, by making the dimensions uniform as described above, uniform Josephson device characteristics in (2) can be obtained. In the present invention, both the upper electrode and the lower electrode
Since Nb or Nb-based superconducting film is used, a low leakage current ratio (3) can be obtained. The ratio of leakage current to normal conduction tunnel resistance was 15 or more. Regarding durability (4), the Josephson device of the present invention showed no change in critical current after 100 thermal cycles between room temperature and measured temperature.

〔Effect of the invention〕

As specifically described in the embodiments above, according to the present invention, both the upper electrode and the lower electrode
In a Josephson device that is a Nb or Nb-based superconducting device, it is possible to obtain a Josephson device characteristic that is fine and has excellent dimensional uniformity, and therefore has a high degree of uniformity.

[Brief explanation of the drawing]

Figure 1 is a cross-sectional view of the lower electrode Nb, the A oxide tunnel barrier layer, and the upper electrode Nb formed in the Josephson device manufacturing process;
The figure is a cross-sectional view of the anodic oxide film layer formed after forming a rectangular etching pattern including the joint in Figure 1, and Figure 3 is a cross-sectional view of the etching for the wiring layer in Figure 2. Figure 4 shows that after forming the second rectangular pattern including the joint part,
FIG. 5 is a cross-sectional view when backfilling with SiO is performed, and FIG. 5 is a cross-sectional view when wiring connected to the upper electrode is provided. 1...Si substrate, 2...Nb lower electrode film, 3...
A oxide tunnel barrier layer, 4...Nb upper electrode film, 5...Nb anodic oxide film, 6...SiO insulating film,
7...Nb wiring film.

Claims (1)

[Scope of Claims] 1. A method for manufacturing a Josephson device, characterized by comprising the following steps. (1) Forming a first electrode layer made of Nb or a superconducting material containing Nb as a constituent element on a substrate,
A tunnel barrier layer made of oxide is formed on the first electrode, and a tunnel barrier layer made of an oxide is formed on the tunnel barrier layer.
First step of forming a second electrode layer made of Nb or a superconducting material containing Nb as a constituent element to obtain a three-layer structure (2) A first resist pattern section is formed in the region including the junction of the three-layer structure. A second step (3) of forming a resist pattern and removing the portion other than the first resist pattern portion by etching to expose the first electrode layer; (3) anodizing the exposed first electrode layer;
Third step of forming Nb oxide (4) Forming a second resist pattern section that intersects with the first resist pattern section and including the junction section, and forming a second resist pattern section other than the second resist pattern section. A fourth step (5) in which the second electrode is removed by reactive ion etching using CF ₄ gas to obtain the bonded portion; and a fifth step in which the removed portion is filled back with an insulating film.