JPH0520343U - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0520343U
JPH0520343U JP068019U JP6801991U JPH0520343U JP H0520343 U JPH0520343 U JP H0520343U JP 068019 U JP068019 U JP 068019U JP 6801991 U JP6801991 U JP 6801991U JP H0520343 U JPH0520343 U JP H0520343U
Authority
JP
Japan
Prior art keywords
outer frame
semiconductor device
circuit
circuit board
electronic component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP068019U
Other languages
Japanese (ja)
Inventor
秀行 今中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP068019U priority Critical patent/JPH0520343U/en
Publication of JPH0520343U publication Critical patent/JPH0520343U/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components

Landscapes

  • Casings For Electric Apparatus (AREA)

Abstract

(57)【要約】 【目的】 電子部品の配置の効率化を図り、従来より小
型の半導体装置を提供する。 【構成】 外枠2の底面に電子部品4が搭載された回路
基板1が装着され、外枠2内に封止樹脂3が注入されて
なる半導体装置において、外枠2の内壁面に導体8によ
る回路を形成し、該回路上に電子部品4の一部(電子部
品9)を搭載してなることを特徴とする。
(57) [Summary] [Object] To provide a semiconductor device which is smaller than conventional semiconductor devices by improving the efficiency of arrangement of electronic components. In a semiconductor device in which a circuit board 1 having an electronic component 4 mounted on the bottom surface of an outer frame 2 is mounted and a sealing resin 3 is injected into the outer frame 2, a conductor 8 is provided on an inner wall surface of the outer frame 2. Is formed, and a part of the electronic component 4 (electronic component 9) is mounted on the circuit.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は半導体装置に関し、特に外枠の底面に回路基板が装着され、外枠内に 封止樹脂が注入されてなる半導体装置に関する。 The present invention relates to a semiconductor device, and more particularly to a semiconductor device in which a circuit board is mounted on the bottom surface of an outer frame and a sealing resin is injected into the outer frame.

【0002】[0002]

【従来の技術】[Prior Art]

従来の技術について図3を参照して説明する。 A conventional technique will be described with reference to FIG.

【0003】 図3は従来例による半導体装置の断面図である。図3に示すように、従来の半 導体装置は回路基板1の上に、構成電子部品である4及び入出力端子5を搭載し 、回路基板1の周辺に絶縁性樹脂製の外枠2を接着剤6によって固着し、その中 に封止樹脂3を注入・硬化している。7は半導体素子と所定の回路パターンを接 続するためのワイヤーである。FIG. 3 is a sectional view of a conventional semiconductor device. As shown in FIG. 3, in a conventional semiconductor device, a component electronic component 4 and an input / output terminal 5 are mounted on a circuit board 1, and an outer frame 2 made of an insulating resin is provided around the circuit board 1. The adhesive 6 fixes the sealing resin 3, and the sealing resin 3 is injected and cured therein. Reference numeral 7 is a wire for connecting the semiconductor element and a predetermined circuit pattern.

【0004】 ここで構成に必要な電子部品4あるいは入出力端子5はすべて回路基板1の表 面に搭載されている。Here, all the electronic components 4 or input / output terminals 5 required for the configuration are mounted on the surface of the circuit board 1.

【0005】[0005]

【考案が解決しようとする課題】[Problems to be solved by the device]

しかし、この様にして形成された半導体装置は、部品搭載領域が回路基板上の 1平面だけであり、面積的に限定されるので、半導体装置の小型化に限界があっ た。 However, in the semiconductor device formed in this manner, the component mounting area is limited to one plane on the circuit board, and the area is limited. Therefore, there is a limit to miniaturization of the semiconductor device.

【0006】 そこで本考案の目的は、従来に比べて効率良い部品搭載ができ、小型化を図れ る半導体装置を提供することにある。Therefore, an object of the present invention is to provide a semiconductor device in which parts can be mounted more efficiently than in the past and the size can be reduced.

【0007】[0007]

【課題を解決するための手段】[Means for Solving the Problems]

前記目的を達成するために本考案は、外枠の底面に電子部品が搭載された回路 基板が装着され、前記外枠内に封止樹脂が注入されてなる半導体装置において、 前記外枠の内壁面に回路を形成し、前記回路に前記電子部品の一部を搭載してな ることを特徴とする。 In order to achieve the above object, the present invention provides a semiconductor device in which a circuit board having electronic components mounted on a bottom surface of an outer frame is mounted, and a sealing resin is injected into the outer frame. A circuit is formed on the wall surface, and a part of the electronic component is mounted on the circuit.

【0008】[0008]

【作用】[Action]

外枠の底面に電子部品が搭載された回路基板が装着され、前記外枠内に封止樹 脂が注入されてなる半導体装置において、前記外枠の内壁面に回路を形成し、前 記回路に前記電子部品の一部を搭載するので、従来は底面の回路基板1面のみに 限られていた電子部品搭載領域が外枠内壁にまで広がるので、内部空間を有効に 活用でき、半導体装置を小型化できる。 In a semiconductor device in which a circuit board having electronic components mounted on the bottom surface of the outer frame is mounted and a sealing resin is injected into the outer frame, a circuit is formed on the inner wall surface of the outer frame, and the circuit described above is formed. Since a part of the electronic parts is mounted on the electronic circuit board, the electronic part mounting area, which was conventionally limited to only the bottom surface of the circuit board, extends to the inner wall of the outer frame. Can be miniaturized.

【0009】[0009]

【実施例】【Example】

本考案の一実施例について、図1及び図2を参照して説明する。 An embodiment of the present invention will be described with reference to FIGS.

【0010】 なお、従来例と同一機能部分には同一記号を付している。The same functional parts as those of the conventional example are designated by the same reference numerals.

【0011】 図1は本実施例による半導体装置の断面図、図2は本実施例による半導体装置 の外枠と回路基板との嵌合を示す側断面図である。FIG. 1 is a cross-sectional view of a semiconductor device according to this embodiment, and FIG. 2 is a side cross-sectional view showing a fit between an outer frame and a circuit board of the semiconductor device according to this embodiment.

【0012】 図1及び図2に示すように、外枠2の内壁面に、該内壁面の表面に部品との接 合部が露出するように導体8をインサートし、この導体8上に電子部品9を搭載 する。As shown in FIGS. 1 and 2, a conductor 8 is inserted into the inner wall surface of the outer frame 2 so that a contact portion with a component is exposed on the surface of the inner wall surface. Mount the component 9.

【0013】 ここで、外枠2への回路配線の形成方法としては、例えば外枠2の樹脂材料と して、熱変形温度が200℃以上のポレエチレンテレフタレート,あるいはポリ フェニレンサルファイド等を使用し、この外枠2を射出成型にて作製する際、別 途金属フレームにて形成した回路をインサート成型にて外枠と回路パターンを一 体化してしまうという方法がある。Here, as a method of forming the circuit wiring on the outer frame 2, for example, as the resin material of the outer frame 2, polyethylene terephthalate having a heat distortion temperature of 200 ° C. or higher, polyphenylene sulfide, or the like is used. When manufacturing the outer frame 2 by injection molding, there is a method in which a circuit formed by a metal frame is insert-molded to integrate the outer frame and the circuit pattern.

【0014】 次に、回路基板1上のパターン11上に、電子部品9以外の半導体部品4及び 入出力端子5が搭載される。尚、入出力端子5は回路構成によっては外枠内部側 に取り付けても良い。Next, the semiconductor component 4 other than the electronic component 9 and the input / output terminal 5 are mounted on the pattern 11 on the circuit board 1. The input / output terminal 5 may be attached to the inside of the outer frame depending on the circuit configuration.

【0015】 次に、この回路基板1と外枠2が接着剤6によって固着、一体化され、ろう材 10によって外枠2の内壁面の導体8の回路パターンと、回路基板1上のパター ン11が相互結線され一つの所定の回路ができ上る。最後にこの内部に封止用の 樹脂3を注入・硬化することにより、本実施例の半導体装置が得られる。Next, the circuit board 1 and the outer frame 2 are fixed and integrated by an adhesive 6, and the circuit pattern of the conductor 8 on the inner wall surface of the outer frame 2 and the pattern on the circuit board 1 are fixed by the brazing material 10. 11 are interconnected to form one predetermined circuit. Finally, the resin 3 for encapsulation is injected and cured in the inside to obtain the semiconductor device of this embodiment.

【0016】 以上のようにして得られる本実施例の半導体装置においては、従来、底面の基 板上1面のみに限定されていた部品搭載領域が、外枠内壁面まで可能となるので 、半導体装置の内部空間が有効に活用でき、半導体装置の小型化が可能となる。 尚、外枠2上への回路の形成方法としては、高耐熱熱過塑性樹脂表面への導体 メッキによる方法もある。In the semiconductor device of this embodiment obtained as described above, the component mounting area, which is conventionally limited to only one surface on the base plate on the bottom surface, can be extended to the inner wall surface of the outer frame. The internal space of the device can be effectively utilized, and the semiconductor device can be downsized. As a method of forming the circuit on the outer frame 2, there is also a method of plating a conductor on the surface of the high heat resistant thermoplastic resin.

【0017】[0017]

【考案の効果】[Effect of the device]

以上説明したように本考案によれば、外枠の底面に回路基板が装着され、外枠 内に封止樹脂が注入されてなる半導体装置において、前記外枠内壁面にも部品を 搭載するので、半導体装置の内部空間を有効に活用でき、従来に比べて同一機能 を有し、より小型の半導体装置を実現できる。 As described above, according to the present invention, in the semiconductor device in which the circuit board is mounted on the bottom surface of the outer frame and the sealing resin is injected into the outer frame, the components are also mounted on the inner wall surface of the outer frame. Further, the internal space of the semiconductor device can be effectively utilized, the semiconductor device has the same function as the conventional one, and a smaller semiconductor device can be realized.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の一実施例による半導体装置の断面図で
ある。
FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

【図2】本考案の一実施例による半導体装置の回路基板
と外枠の嵌合を示す側断面図である。
FIG. 2 is a side sectional view showing a fit between a circuit board and an outer frame of a semiconductor device according to an embodiment of the present invention.

【図3】従来例による半導体装置の断面図である。FIG. 3 is a sectional view of a conventional semiconductor device.

【符号の説明】[Explanation of symbols]

1 回路基板 2 外枠 3 封止樹脂 4 電子部品(回路基板上) 8 回路(外枠内壁部の導体露出部) 9 電子部品(外枠内壁部上) DESCRIPTION OF SYMBOLS 1 Circuit board 2 Outer frame 3 Sealing resin 4 Electronic component (on circuit board) 8 Circuit (conductor exposed part of inner wall of outer frame) 9 Electronic component (on inner wall of outer frame)

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 外枠の底面に電子部品が搭載された回路
基板が装着され、前記外枠内に封止樹脂が注入されてな
る半導体装置において、 前記外枠の内壁面に回路を形成し、前記回路に前記電子
部品の一部を搭載してなることを特徴とする半導体装
置。
1. A semiconductor device in which a circuit board having electronic components mounted thereon is mounted on a bottom surface of an outer frame, and a sealing resin is injected into the outer frame, wherein a circuit is formed on an inner wall surface of the outer frame. A semiconductor device comprising a part of the electronic component mounted on the circuit.
JP068019U 1991-08-27 1991-08-27 Semiconductor device Pending JPH0520343U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP068019U JPH0520343U (en) 1991-08-27 1991-08-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP068019U JPH0520343U (en) 1991-08-27 1991-08-27 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0520343U true JPH0520343U (en) 1993-03-12

Family

ID=13361692

Family Applications (1)

Application Number Title Priority Date Filing Date
JP068019U Pending JPH0520343U (en) 1991-08-27 1991-08-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH0520343U (en)

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