JPH05204706A - Microcomputer - Google Patents

Abstract

PURPOSE:To enable real-time trace at high speed without executing register save, register recovery and the subtraction of a program counter by providing a memory reference means in an instruction executing means. CONSTITUTION:In respect to an instruction executing means 1 composed of a memory writing means 1a, memory reading means 1b and PC operating means 1c, a memory reference means 1d is provided as well to generate a memory read cycle without reloading all the contents of a register 2 equipped with the program counter. Therefore, the memory reference means 1d generates the memory read cycle without reloading all the contents of the register 2 provided with the program counter. Thus, in the case of executing real-time trace at a debugger using an ICE, the real-time trace can be executed at high speed by executing a trace processing according to one instruction without executing register save, register recovery and the subtraction of the program counter.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer, and more particularly to a microcomputer capable of performing high-speed real-time trace.

[0002]

2. Description of the Related Art FIG. 5 is a block diagram showing the structure of a conventional microcomputer. In the figure, 1 is a memory writing means 1a, a memory reading means 1b and a program counter (hereinafter referred to as PC) operating means 1c. And instruction execution means 2 consisting of a register connected to the instruction execution means 1, 3 connected to the instruction execution means 1 and the register 2, and a control means for controlling these, 4 is a memory for storing programs, data, etc. is there.

Next, the operation will be described. The data stored in the register 2 is transferred to the memory 4 using the memory writing unit 1a, and the data in the memory 4 is transferred to the register 2 using the memory reading unit 1b. Further, the PC value in the register 2 is rewritten by the PC operating means 1c.

On the other hand, FIG. 3 is a block diagram showing a program execution environment of a microcomputer, and FIG. 3 (a) is a debugger-in-circuit emulator (hereinafter referred to as ICE).
Called. ) Is used to show the environment when debugging is performed, and FIG. 3B shows the environment when no debugging is performed. In the figure, 5 is a microcomputer, 6 is an ICE, and 7
Is a program memory equipped with a program to be debugged and a monitor program. When real-time trace is performed in the program execution environment shown in FIG. 3A, that is, in the microcomputer connected to the debugger, the user program is normally executed in the execution state shown in FIG. 4A. , When referring to the contents of a specific address using the function of the debugger, insert a JMP instruction at the address where the original instruction D exists in the execution status shown in Fig. 4 (b), transfer control to the monitor program, and then trace The processing refers to the memory, and then the instruction D is returned to the address where the execution of the user program is resumed.

FIG. 6 is an example of a flowchart of a program for performing a trace process in the conventional microcomputer shown in FIG. The control is transferred to step 8 by the JMP instruction, and the trace processing is started. To refer to the data of a specific address, the data of that address is once read into the register 2 and the data bus at that time is monitored. Therefore, the registers used in step 9 are saved in the stack, the memory is read in step 10, the register values saved in the stack are restored in step 11, the program counter is subtracted in step 12, and the user Returning to the program.

[0006]

Since the conventional microcomputer is configured as described above, as shown in FIG. 6, register saving, register restoring, and program counter subtraction must be performed during trace processing. No
There is a problem that the speed of the real-time trace becomes slow because the number of steps of the monitor program performed during the real-time trace increases.

The present invention has been made in order to solve the above problems, and provides a microcomputer capable of high-speed real-time trace without register saving, register restoring and program counter subtraction. With the goal.

[0008]

The microcomputer according to the present invention can rewrite all the contents of the register including the program counter in the instruction executing means without rewriting.
A memory reference means for referring to the contents of the memory is provided.

[0009]

In the present invention, since the contents of the memory can be referred to without rewriting all the contents of the register,
The number of steps of the monitor program performed during the real-time trace can be reduced.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a microcomputer according to an embodiment of the present invention.
The same reference numerals as those in FIG. 5 denote the same or corresponding portions, 1d.
Is a memory referencing means connected to the memory 4, and the instruction executing means 1 is a memory writing means 1a, a memory reading means 1b, a PC operating means 1c and the memory referencing means 1d.
It is composed of and. Here, the memory reference means 1d
Generates a memory read cycle without rewriting all the contents of register 2 including the program counter.

FIG. 2 is a flow chart showing a monitor program at the time of real-time trace in the execution environment shown in FIG. 3 (a) using this microcomputer, that is, the execution environment when debugging is performed using ICE. In this microcomputer, as in the conventional example, the JMP
When the control is transferred to the step 8 by the instruction and the trace processing is started, the data of the specific address is referred to by the memory referencing means in the step 10 and the process returns to the user program in the next step 13.

In the microcomputer of this embodiment as described above, in addition to the instruction executing means 1 including the memory writing means 1a, the memory reading means 1b and the PC operating means 1c, all the contents of the registers including the program counter are stored. Since the memory reference unit 1d that generates the memory read cycle without rewriting is provided, the memory reference unit 1d generates the memory read cycle without rewriting all the contents of the register 2 including the program counter, and the ICE is used. When performing a real-time trace with a debugger, the trace process can be performed by one instruction without performing register saving, register restoring, and program counter subtraction, and high-speed real-time trace can be performed.

[0013]

As described above, according to the present invention, since the memory reference means is provided in the instruction execution means, the real-time trace can be performed at high speed without saving the register, restoring the register and decrementing the program counter. There is an effect that can be.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a microcomputer according to an embodiment of the present invention.

FIG. 2 is a flowchart showing a program when a trace process is performed by the microcomputer shown in FIG.

FIG. 3 is a block diagram showing a program execution environment of a microcomputer.

4 is a conceptual diagram showing execution states of a user program and a monitor program in the program execution environment shown in FIG.

FIG. 5 is a block diagram showing a configuration of a conventional microcomputer.

6 is a flowchart showing a program when a trace process is performed by the microcomputer shown in FIG.

[Explanation of symbols]

1 instruction execution means 1a memory writing means 1b memory reading means 1c program counter operating means 1d memory reference means 2 register 3 control means 4 memory 5 microcomputer 6 in-circuit emulator 7 program memory 8, 9, 10, 11, 12, 13 Codes indicating each step of the flowchart

Claims (1)

[Claims] 1. A memory for storing data and a program; a register connected to the memory for transferring data between the memory; and a register connected to the register for transferring the data of the register to the memory. And an instruction executing means having a memory writing means for causing the memory to transfer data in the memory to a register, and a program counter operating means for rewriting the value of the program counter in the register, and the instruction executing means connected to the register and the instruction executing means. A microcomputer having control means for controlling these, wherein memory reference means for referencing the content of the memory without rewriting all the content of the register including the program counter is provided in the instruction executing means. A microcomputer characterized by that.