JPH0520992B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides an inverter device that uses field effect transistors that have a high switching frequency and can provide high output, in order to be used in inverter devices, particularly inverter devices that are expected to have high frequency output and high output. It is related to.

Conventionally, there has been an inverter device of this type as shown in FIG. That is, the drain 2a of the first field effect transistor (hereinafter referred to as "MOSFET") 2, which is a current control element, is connected to the positive terminal of the power supply 1.
is connected to the source 2b of the MOSFET 2.
Connect the drain 3a of MOSFET 3 to the second
The source 3b of MOSFET 3 is connected to the negative terminal of the power supply 1 in sequence, and the first and second
There was one in which a gate drive circuit 4 or 5 was connected to the gates 2c and 3c of MOSFETs 2 and 3, respectively. Note that an output terminal 6 is drawn out from the connection point between both MOSFETs 2 and 3, and the inverter device is connected to a load 7 via the output terminal 6.

FIG. 2 is an operating waveform diagram of the device shown in FIG. 1, in which A, B, and C are shown between the drain 3a and source 3b of the second MOSFET 3 when the load is inductive, resistive, and capacitive, respectively. , and D and E respectively indicate the voltage waveform of the first MOSFET.
2 and the second MOSFET 3 (ON or OFF).

Next, the operation of the conventional device having the configuration shown in FIG. 1 will be explained with reference to FIG. 2.

MOSFETs 2 and 3 are turned ON or OFF by signals from gate drive circuits 4 and 5, respectively. For example, if the first MOSFET2 is
When a signal is applied so that the second MOSFET 3 turns OFF and the second MOSFET 3 turns ON, the output terminal 6 becomes the potential V- of the negative terminal of the power supply 1. Therefore, if the load 7 is connected to the output terminal 6 at this time, Current I ₁ as shown
flows.

First, the influence of a change from such a state when the load 7 is inductive will be described.
When MOSFET3 turns off at time _t1 shown in Figure 2,
Since the current in the load 7 tries to flow in the same direction as before the state change, a current I ₂ as shown in FIG. 1 flows, and the potential of the output terminal 6 becomes V+. In this case, the surge voltage S _L is small (see Fig. 2A). Also,
Even if MOSFET2 turns on at time t2 shown in Figure ₂ ,
Since the potential of the output terminal 6 has already reached the potential V+ of the positive terminal, almost no surge voltage occurs.

Next, the influence of state changes when the load 7 is resistive will be described. MOSFET3 at time _t1
When turned off, the potential of the output terminal 6 becomes a potential V _M between V+ and V-. After this, at time t ₂
When MOSFET 2 turns on, the potential at output terminal 6 rises rapidly. MOSFET2 transitions to the ON state very quickly, so the inductance and stray capacitance caused by the circuit wiring, the MOSFET's capacitance, etc. resonate and generate a surge voltage S _R (see Figure 2B).

The influence of state changes when the load 7 is capacitive will be described. When MOSFET 3 is turned off at time _t1 , the potential of output terminal 6 hardly changes. Thereafter, when MOSFET 2 is turned on at time _t2 , the potential of output terminal 6 rises rapidly. In particular, MOSFET
Since the switching speed is fast, the voltage rise
dv/dt is high, and the surge voltage S _C is even higher than the surge voltage S _R in the resistive case.

In addition, Fig. 2 shows the drain 3a- of MOSFET 3.
Although the voltage waveform between the source 3b is shown, if the on/off state is considered in reverse, it can be seen that the voltage waveform between the drain 2a and the source 2b of the MOSFET 2 is shown.

However, since the conventional inverter device is configured as described above, there is a drawback that the surge voltage increases and if the voltage exceeds the withstand voltage of the MOSFET, the MOSFET is destroyed.

The present invention was made in order to eliminate the drawbacks of the conventional ones as described above, and by connecting a reactor, a diode, and an overvoltage absorption circuit to the current control element, the surge voltage of the current control element can be reduced. The purpose is to provide an efficient inverter device.

In order to achieve this object, the inverter device of the present invention connects in series a parallel body in which two series-connected diodes and a reactor are connected in parallel to each of the current control elements, and The device is characterized in that it includes an overvoltage absorption circuit connected in parallel to the element to a connection point of two diodes forming a parallel body.

An embodiment of the present invention will be described below with reference to FIGS. 3 to 7.

The device shown in FIG. 3 includes reactors 8 or 9 for MOSFETs 2 and 3, respectively, and a pair of diodes 10, 11 or 12, 1 connected in series.
3 and a pair of diodes 10,
11 connection point, other pair of diodes 12, 13
The overvoltage absorbing circuits 18 and 19 each constituted by a resistor 14 or 15 and a capacitor 16 or 17 are connected to the connection points thereof.

FIGS. 4A to 4C are shown in the apparatus shown in FIG. 3.
2 is a diagram corresponding to FIGS. 2A to 2C showing voltage waveforms between the drain 3a and source 3b of the MOSFET 3. FIG. D and E in the figure show the operating states of MOSFETs 2 and 3, respectively.

During the period when MOSFET 2 is OFF and MOSFET 3 is ON (before time t ₅ in FIG. 4), the potential of the output terminal 6 is the potential V- of the negative terminal of the power supply 1,
When the load 7 is connected, the current I ₃ as shown in FIG.
flows. In this respect, it is similar to the conventional device.

Figure 4A shows the case where the load 7 is inductive. If MOSFET 3 is turned off at time _t5 from the above state, the current in the load 7 will flow in the same direction, so the current will change as shown in Figure 3. I ₄ flows. This current I ₄ is shown in Fig. 5, which shows the main part extracted from Fig. 3.
As shown in the figure, it passes through the reverse diode of MOSFET 2 and diodes 10 and 11. Therefore, the fourth
During the period _t5 - _t6 in FIG. A, the potential of the output terminal 6 rises to the potential of the positive terminal V+. Further, as shown in FIG. 5, a current I ₅ flows as the potential of the output terminal 6 increases and passes through the reactor 9, the diode 13, the resistor 15 of the overvoltage absorption circuit 19, and the capacitor 17. Therefore, the drain 3 of MOSFET 3
The voltage divided by the reactor 9, the diode 13, the resistor 15, and the capacitor 17 is applied to the voltage between the source 3b and the source 3b, and during the period t ₅ in FIG.
−The voltage rise at _{t 6} is limited. Therefore,
Surge voltage S _L2 is reduced compared to the conventional case.

Figures 4B and 4C show the case where the load 7 is resistive and capacitive, respectively, and MOSFET 3 is OFF at time _t5 .
After that, when MOSFET2 turns on at time _t6 , the third
As shown in Figure 6, which shows the main parts of the diagram,
Current I ₆ flows through reactor 8 and MOSFET 2,
In order to supply current to the load 7, the potential of the output terminal 6 rises to the potential V+. However, since the current passes through the reactor 8, the increase in current is limited, and the potential at the output terminal 6 increases slowly. Furthermore, as the potential of the output terminal 6 increases, a current _I7 flows as shown in FIG.
Between the drain 3a and source 3b of MOSFET 3, there is a reactor 9, a diode 13, and a resistor 1.
5. The voltage divided by the capacitor 17 is applied, and as shown in FIG. 4B and C, a surge voltage S _R2 ,
S _C2 is reduced compared to conventional equipment. Also,
When MOSFET 2 is turned ON at time t ₆ , the capacitor 16 of the overvoltage absorption circuit 18 connects the closed loop of resistor 14 - diode 10 - reactor 8 - MOSFET 2 - capacitor 16 with current I ₈ as shown in FIG.
flows and discharges, so no excessive current flows through MOSFET2.

Thus, regardless of whether the load 7 is inductive, resistive, or capacitive, the surge voltages S _L2 , S _R2 , and S _C2 are
Even if the switching speed of the MOSFET is fast, the value will not increase because it is limited by the reactor and overvoltage absorption circuit. Also, MOSFET3
When MOSFET 3 is turned off, the voltage rise between the drain 3a and source 3b of MOSFET 3 is limited by the reactor 9 and the overvoltage absorption circuit 19, and when MOSFET 2 is turned on, the rise in drain current of MOSFET 2 is limited by the reactor 8. MOSFET
A few switching losses will be much lower, resulting in better efficiency.

In addition, in the above, drain 3 of MOSFET 3
Although the explanation has been made based on FIG. 4, which is a voltage waveform diagram between source 3a and source 3b, it goes without saying that the same thing as above can be said about MOSFET 2.

FIG. 8 is a diagram showing another embodiment of the present invention in which reactors 8 and 9 are magnetically coupled. When MOSFET2 is turned on during the period t ₆ - _{t 7} shown in Fig. 4,
Current flows to the load 7 through the reactor 8,
When the current increases, a voltage V ₁ is generated in the reactor 8. Since the reactor 9 is magnetically coupled to the reactor 8, a voltage V ₂ is generated in the reactor 9 as shown in FIG. _4F (see FIG. 8),
Lower the voltage between the drain 3a and source 3b of MOSFET3.

This timing is the same as the timing at which the surge voltages S _R2 and S _C2 shown _in FIG. Since a surge voltage is generated during this period, the surge voltage can be made very low as shown in G in the same figure.

In addition, in the period after time t ₈ , MOSFET
When MOSFET 3 turns ON, the current of load 7 flows through reactor 9, as shown in _FIG .
In the same way as when MOSFET 2 is turned on, the surge voltage of MOSFET 2 is lowered during this period as well.

FIG. 9 shows transistor 2 as a current control element.
0 and 21 are shown. As shown in the figure, base drive circuits 24 and 25 are connected to the bases of transistors 20 and 21. A MOSFET has an internal diode that allows current to flow from the source to the drain, but a transistor does not have such a diode. 22 and 23 are required to be connected between the collector emitters of transistors 20 and 21. Of course, inverter devices configured in this way also
It operates in the same way as an inverter device using MOSFETs.

It is also possible to use a static induction transistor (SIT), a gate turn-off thyristor (GTO), etc. as the current control element, and the same effects as in the above embodiment can be expected.

Figure 10 shows the N channel in the device shown in Figure 3.
P channel instead of MOSFET2
This shows an example of the present invention using MOSFET 26, and has the same effects as the above example.

FIG. 11 shows two inverter devices according to the present invention.
This is an example in which a single-phase inverter is constructed using a single-phase inverter.

It goes without saying that by using three or more inverter devices according to the present invention, a three-phase inverter, a multi-phase inverter, etc. can also be constructed. In addition, although the overvoltage absorption circuit in the above explanation was made up of a resistor and a capacitor connected in series, it also includes a varistor 27, a Zener diode 28, a resistor 29, a capacitor 30, etc., as shown in FIGS. 12A to 12D. The same effects as those described above can be expected.

As described above, according to the present invention, a parallel body in which two series-connected diodes and a reactor are connected in parallel is connected in series to each of the current control elements, and a parallel body is connected in series to each of the current control elements. The structure also includes an overvoltage absorption circuit connected to the connection point of the two diodes forming the parallel body, so that surge voltage is absorbed by the reactor regardless of whether the load is inductive, resistive, or capacitive. This has the effect of reducing surge voltage when the current control element switches at high speed, resulting in a highly reliable and efficient inverter device.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing the configuration of a conventional inverter device, FIG. 2 is a time chart explaining the circuit operation of FIG. 1, and FIG. 3 is a circuit diagram showing the configuration of the first embodiment of the present invention. Fig. 4 is a time chart for explaining the circuit operation of Fig. 3, Figs. 5, 6, and 7 are circuit diagrams showing main parts taken out to explain the circuit operation of Fig. 3, and Fig. 8 is a circuit diagram of the present invention. FIG. 9 is a circuit diagram showing the configuration of the second embodiment of the present invention, FIG. 10 is a circuit diagram showing the configuration of the fourth embodiment of the present invention, and FIG. 11 is a circuit diagram showing the configuration of the fourth embodiment of the present invention. 12 is a circuit diagram showing the configuration of a fifth embodiment of the present invention, and FIG. 12 is a diagram showing an example of the configuration of an overvoltage absorption circuit. 1... Power supply, 2, 3, 20, 21... Current control element, 4, 5, 24, 25... Gate drive circuit, 6... Output terminal, 7... Load, 8, 9... Reactor, 10 ~13, 22, 23...diodes, 18, 19...overvoltage absorption circuits, and the same reference numerals in the drawings indicate the same or equivalent parts.

Claims (1)

[Scope of Claims] 1. In an inverter device comprising two current control elements connected in series to a DC power source, controlling opening and closing of each current control element to supply voltage to a load from a connection point of the current control elements. , 2 connected in series
A parallel body in which two diodes and a reactor are connected in parallel is connected in series to each of the current control elements, and a parallel body is connected in parallel with the current control element to the connection point of the two diodes forming the parallel body. An inverter device comprising an overvoltage absorption circuit. 2. The inverter device according to claim 1, wherein the overvoltage absorption circuit comprises a resistor and a capacitor connected in series. 3. The inverter device according to any one of claims 1 to 2, wherein the reactor is magnetically coupled.