JPH05218316A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PURPOSE:To implement a semiconductor device capable of operating at a high speed in which semiconductor devices such as bipolar transistor of field effect transistor are formed on a substrate made of optical transmission insulator at a low cost. CONSTITUTION:A semiconductor device and a manufacture thereof comprise the steps of forming a substrate having a non-porous single crystal silicon layer 42 on a porous silicon substrate 43, forming a substrate 1 made of optical transmission insulator transmitted in at least a visible light region by oxidizing the porous silicon substrate 43, and forming elements using the non-porous single crystal silicon layer 42 as an active layer.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a bipolar transistor and a field effect transistor as main constituent elements, and more particularly to a semiconductor device having a bipolar transistor and a field effect transistor formed on a light transmissive insulator substrate. ..

[0002]

2. Description of the Related Art The formation of a single crystal Si semiconductor layer on an insulator is widely known as a silicon-on-insulator (SOI) technique and has many advantages that cannot be reached by a bulk Si substrate for producing a normal Si integrated circuit. Much research has been done because the devices using the SOI technology have. In other words, by using SOI technology,
1. 1. Easy dielectric isolation and high integration 2. Excellent radiation resistance 3. 3. Stray capacitance is reduced and high speed is possible. 4. The well process can be omitted. Latch-up can be prevented, 6. Advantages such as a fully depleted field effect transistor can be obtained by thinning the film.

In order to realize the many advantages in device characteristics as described above, a method for forming an SOI structure has been researched for several decades. The contents are summarized in the following documents, for example. Special
Issue: "Single-crystal sil
icon on non-single-crysta
l insulators ”; edited by
G. W. Cullen, Journal of Cry
stal Growth, volume 63, no
3, pp 429-590 (1983).

Further, SOS (silicon on sapphire), which is formed by heteroepitaxially forming Si on a single crystal sapphire substrate by CVD (chemical vapor deposition), has been known for a long time, and is the most mature SOI technology. Although it was successful for the time being, a large amount of crystal defects due to the lattice mismatch between the Si layer and the underlying sapphire substrate interface, the mixing of aluminum from the sapphire substrate into the Si layer, and above all, the high cost and large area of the substrate The delay of the application has hindered its widespread application. In recent years, attempts have been made to realize an SOI structure without using a sapphire substrate. This attempt is roughly divided into the following two.

1. After the surface of the Si single crystal substrate is oxidized, a window is opened to partially expose the Si substrate, and the portion is used as a seed for lateral epitaxial growth to form a Si single crystal layer on SiO ₂ . (In this case, a Si layer is deposited on SiO _2. ) The Si single crystal substrate itself is used as an active layer, and SiO ₂ is formed thereunder. (This method does not involve the deposition of a Si layer.) Various semiconductor devices and integrated circuits made of them have been formed on a silicon layer on an insulator formed by these methods.

[0006]

As means for realizing the above 1, as a method for directly laterally epitaxially growing a single crystal layer Si by CVD, amorphous Si is deposited,
Solid-phase lateral epitaxial growth by heat treatment, amorphous or polycrystalline Si layer is focused and irradiated with an energy beam such as an electron beam or laser light, and a single crystal layer is grown on SiO ₂ by melt recrystallization. And a method of scanning the melting region in a strip shape by a rod-shaped heater (Zone melting recrystallization).
zation) is known. Each of these methods has advantages and disadvantages, but their controllability, productivity, uniformity,
There are still many problems in quality, and none have been industrially put to practical use. For example, the CVD method requires sacrificial oxidation to achieve a flat thin film, and the solid phase growth method has poor crystallinity. Further, the beam annealing method has problems in processing time by convergent beam scanning, controllability such as beam overlapping and focus adjustment. Of these, Zone M
Although the eluting recrystallization method is the most mature, and relatively large-scale integrated circuits have been prototyped, a large number of crystal defects such as sub-grain boundaries still remain, leading to the production of minority carrier devices. Not at all. Moreover, since neither method requires a Si substrate, a good quality Si single crystal layer cannot be obtained on a transparent amorphous insulator substrate such as glass.

In the method of the above-mentioned 2 which does not use the Si substrate as seeds for the epitaxial growth, there are the following four kinds of methods.

1. An oxide film is formed on a Si single crystal substrate in which V-shaped grooves are anisotropically etched on the surface, a polycrystalline Si layer is deposited on the oxide film as thick as the Si substrate, and then polished from the back surface of the Si substrate. Thereby forming a Si single crystal region surrounded by the V groove and dielectrically separated on the thick polycrystalline Si layer.
In this method, the crystallinity is good, but the polycrystalline S
There is a problem in terms of controllability and productivity in the step of depositing i in a thickness of several hundreds of microns thick and the step of polishing the single crystal Si substrate from the back surface and leaving only the separated Si active layer.

2. SIMOX: Sepe
relation by ion implemented o
xygen) is a method of forming a SiO ₂ layer by ion implantation of oxygen in a Si single crystal substrate, and is the most mature method at present because it has good compatibility with the Si process. However, in order to form the SiO ₂ layer,
It is necessary to implant oxygen ions at a dose of 10E18 ions / cm ² or more, but the implantation time is long, the productivity cannot be said to be high, and the wafer cost is high. Furthermore, many crystal defects remain, and from an industrial point of view, the quality is not sufficient to produce a minority carrier device.

3. Another S obtained by thermally oxidizing a Si single crystal substrate
i A method for forming an SOI structure by bonding a single crystal substrate or a quartz substrate with heat treatment or using an adhesive. This method
It is necessary to uniformly thin the active layer for the device. That is, it is necessary to polish a Si single crystal substrate having a thickness of several hundreds of microns to the micron order or less.
Therefore, in this method, its productivity, controllability,
There are many problems with uniformity. Further, the cost is high because two substrates are required.

4. A method of forming an SOI structure by dielectric isolation by oxidation of porous Si. This method uses P-type Si
Proton ion implantation of N-type Si layer on the surface of single crystal substrate,
(Imai et al., J. Crystal Growth, vo
63, 547 (1983)) or by island formation by epitaxial growth and patterning, and only the P-type Si substrate is made porous by anodization in a HF solution so as to surround the Si islands from the surface, and then increased. This is a method of dielectrically separating N-type Si islands by rapid oxidation. In this method,
The separated Si region is determined before the device process, and there is a problem in that the degree of freedom in device design may be limited.

Further, on a light-transmissive substrate typified by glass, the deposited thin film Si layer is generally amorphous due to the disorder of the crystal structure, reflecting the disorder of the substrate.
At best, it is only a polycrystalline layer, and high-performance devices cannot be produced. This is because the crystal structure of the substrate is amorphous, and a good quality single crystal layer cannot be obtained by simply depositing a Si layer.

By the way, the light transmissive substrate is important in constructing a contact sensor which is a light receiving element and a projection type liquid crystal image display device. Then, in order to further increase the density, the resolution, and the definition of the pixels (picture elements) of the sensor or the display device, a high-performance driving element is required. In addition, the number of terminals of the switching element for switching the pixel and its drive circuit and peripheral circuit becomes enormous, and the two are separately produced and the subsequent mutual connection has a density that is impossible by mechanical connection. As a result, it is desirable that the semiconductor element and the peripheral drive circuit are formed in the same substrate by the same process, and the mutual connection is performed in a normal integrated circuit. In addition, it should be formed by patterning a conductive thin film, which enables high-density mounting for the first time. Further, from the inevitable industrial demand for higher performance of products to be produced, it is necessary to produce a device provided on a light transmissive substrate by using a single crystal layer having excellent crystallinity.

Therefore, it is difficult to manufacture a driving element having sufficient performance that is required now or in the future due to the crystal structure having many defects in amorphous Si and polycrystalline Si.

However, any of the above methods using a Si single crystal substrate is unsuitable for the purpose of obtaining a good quality single crystal film on a light transmissive substrate.

Further, the thermal oxidation rate of the Si single crystal is about 1 micron per hour (1200 ° C., wet oxidation, under atmospheric pressure), and the entire surface of the Si wafer having a thickness of several hundreds micron is left. It takes hundreds of hours to oxidize. Moreover, when Si is oxidized to SiO ₂ ,
It is known that the volume expansion of 2.2 times is accompanied, and when the Si substrate is oxidized as it is, stress exceeding the elastic limit is applied to the surface residual Si layer, and the Si layer is cracked or warped. There was a problem.

(Object of the Invention) In order to solve the above-mentioned problems, the present invention provides a high quality single crystal semiconductor layer on a light-transmissive insulator substrate which can meet the above-mentioned requirements, with bipolar transistors. An object of the present invention is to provide a semiconductor device having a field effect transistor as a main constituent element.

A further object of the present invention is to provide a semiconductor device which realizes the advantages of conventional SOI devices.

Further, the present invention provides a semiconductor device on a light-transmissive substrate which can be a substitute for expensive SOS and SIMOX even when manufacturing a large-scale integrated circuit having an SOI structure, and which has higher quality. The purpose is to do.

[0020]

As a means for solving the above-mentioned problems, the present invention oxidizes the porous semiconductor layer of a substrate having a non-porous semiconductor single crystal layer on the porous semiconductor substrate. A semiconductor having a light-transmissive insulator at least in a visible light region, a bipolar transistor having the non-porous semiconductor single crystal layer on the light-transmissive insulator substrate as an active region, and an insulated gate field effect transistor A device is provided.

Further, the semiconductor device has a semiconductor device in which the non-porous semiconductor single crystal layer is a non-porous silicon single crystal layer, and the porous semiconductor layer is a porous silicon layer, and the semiconductor device is a bipolar device. A semiconductor device which is a transistor and an insulated gate field effect transistor is included as its means.

That is, the semiconductor device according to the present invention is a semiconductor device having a bipolar transistor and an insulated gate field effect transistor, wherein the bipolar transistor and the insulated gate field effect transistor are formed on a light transmissive insulator substrate. A non-porous silicon single crystal layer is formed as an active layer, and the light-transmissive insulator substrate is a porous silicon layer of a substrate composed of a porous silicon layer on which a non-porous silicon single crystal layer is formed. It is characterized by being oxidized to form a light-transmissive silicon oxide layer.

Further, a method of manufacturing a semiconductor device as means for solving the above-mentioned problems of the present invention comprises a step of making a silicon substrate porous, and a single crystal silicon layer on the silicon substrate made porous. Forming step, a step of oxidizing the porous silicon substrate to form a transparent insulator substrate, and a semiconductor device such as a bipolar transistor and an insulated gate field effect transistor using the single crystal silicon layer as an active layer. And a step of forming.

Further, according to the present invention, the light transmission formed by the step of making the other surface side of the silicon substrate having one surface side N-type and the step of oxidizing the porous silicon substrate. A semiconductor device such as a bipolar transistor and an insulated gate field effect transistor is manufactured in a semiconductor single crystal layer on a conductive insulator substrate.

[0025]

According to the present invention, a porous substrate having a Si single crystal layer which is uniformly flat over a large area and has extremely excellent crystallinity on a porous layer is used, and the Si single crystal layer is formed on the surface of the porous substrate. Is left as an active layer at the time of device formation, and a single-layer Si single-crystal layer with extremely few defects is formed on the light-transmissive insulator substrate by transforming one side to the active layer into SiO ₂ to form a light-transmissive substrate. It is possible to easily obtain a substrate having

According to the present invention, since a device is manufactured by using a single crystal layer having excellent crystallinity on a light transmissive insulator substrate as an active layer, a bipolar transistor in which the capacitance between the substrate and the collector is reduced, and An insulated gate field effect transistor with reduced source and drain stray capacitance can be fabricated, high-speed operation is possible, latch-up phenomenon does not occur, and a circuit with excellent radiation resistance characteristics without soft errors due to α rays is provided. be able to. [Examples of Embodiments] Examples of embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a schematic sectional view of an embodiment of a semiconductor device according to the present invention.

In the figure, the substrate 1 is a light transmissive substrate made of SiO ₂ formed by oxidizing porous Si as described later. An NPN type bipolar transistor 2, an N channel field effect transistor 3 and a P channel field effect transistor 4 are formed on the substrate, and a desired semiconductor device is manufactured by appropriately combining these three. Although the bipolar transistor 2 in FIG. 1 is a planar type, the bipolar transistor of the present invention may have a non-planar shape such as a lateral type.

The steps of manufacturing the transistors 2, 3 and 4 will be described below with reference to FIGS. 2, 3 and 4 from the step of manufacturing the single crystal semiconductor layer on the light transmissive substrate.

FIG. 2 is a process drawing for explaining the method for manufacturing a semiconductor substrate of the present invention, and is shown as a schematic sectional view in each process.

First, as shown in FIG. 2A, P-type Si is used.
Protons are ion-implanted into the surface of the single crystal substrate 41 to form an N-type single crystal layer 42. Alternatively, the intrinsic or low-concentration N-type layer 42 is formed by epitaxial growth by a vapor phase method.

Next, as shown in FIG. 2B, P-type Si
The single crystal substrate 41 is transformed into a porous Si substrate 43 from the back surface by an anodization method using an HF solution.

Compared with the density of single crystal Si of 2.33 g / cm ³ , the porous Si layer 43 has a density of 1.1 to 0.% by changing the density of the HF solution to 50 to 20%.
It can be changed in the range of 6 g / cm ³ .

According to observation with a transmission electron microscope, pores having an average diameter of about several tens of angstroms are formed in this porous Si layer. Its density is higher than that of single crystal Si,
Despite being less than half, the single crystallinity is maintained, and it is also possible to epitaxially grow the single crystal Si layer on top of the porous layer.

However, in the epitaxial growth at 1000 ° C. or more, rearrangement of internal holes occurs, and the accelerated oxidation characteristic as described later is lost.

This porous layer is difficult to be formed in the intrinsic or low-concentration N-type Si layer because of the following reason, and thus the P-type S-type
It is likely to be formed only on the i substrate.

Porous Si has been described by Uhir et al.
It was discovered in the process of research on electropolishing of semiconductors in 1957 (A. Uhril, Bell System. Tech.
J. , Vol 35, p. 333 (1956)).

Unagi and S.
The dissolution reaction of i was studied, and holes were required for the anodic reaction of Si in HF solution, and the reaction was reported to be as follows (T. Unami: J. Electroc-h.
em. Soc. , Vol. 127, p. 476 (198
0)).

Si + 2HF + (2-n) e ⁺ → SiF ₂ + 2H ⁺ + ne− SiF ₂ + 2HF → SiF ₄ + H ₂ SiF ₄ + 2HF → H ₂ SiF ₆ or Si + 4HF + (4-λ) e ⁺ → SiF ₄ + 4H ⁺ + λe ^- SiF ₄ + 2HF → H ₂ SiF ₆ Here, e ⁺ and e ⁻ represent holes and electrons, respectively. Further, n and λ are the numbers of holes required for dissolving one silicon atom, respectively, and porous silicon is formed when the condition of n> 2 or λ> 4 is satisfied.

From the above, P-type silicon having holes is likely to be made porous. In this porosity,
Selectivity has been demonstrated by Nagano et al. And Imai (Nagano, Nakajima, Anno, Onaka, Kajiwara; IEICE Technical Report, vol 78, SSD 79-9549 (197).
9), K. Imai; Solid-State Elec
tronics vol 24, 159 (198
1)). As described above, the P-type silicon in which holes are present is easily made porous, and the P-type silicon can be selectively made porous.

However, it is reported that high-concentration N-type silicon also becomes porous (RP Holmstorm, IJ.
Y. Chi Appl. Phys. Lett. vol.
42, 386 (1983)), it is important to select a substrate that can realize porosity regardless of P and N.

Further, since the porous layer has a large amount of voids formed therein, its density is reduced to less than half. As a result, the surface area is drastically increased compared to the volume, and the oxidation rate thereof is increased 100 times or more as compared with the oxidation rate of a normal single crystal layer (H. Takai, T. Ito, J. . App
l. Phys. vol 60, no 1, p. 222
(1986)). That is, as described above, since the oxidation rate of the Si single crystal substrate at 1200 ° C. is about 1 micron / hour, the oxidation rate of porous Si is about 100 / hour.
It is possible to oxidize the entire wafer having a thickness of several microns or more and a thickness of several hundreds of microns in a practical range. Furthermore, the oxidation time can be further shortened by utilizing the oxidation rate acceleration phenomenon in the oxidation under a high pressure above atmospheric pressure (N. Tsubouchi, H. Miyoshi, A. Nishimoto and H. Abe,
Japan J. Appl. Phys. vol 16,
no 5,855 (1977)).

Next, a Si ₃ N ₄ layer 44 is deposited as an anti-oxidation film on the surface 42 of the intrinsic or low-concentration N-type Si layer, and the P-type porous Si substrate 43 is entirely oxidized as described above. As a result, SiO ₂ is used to form the light transmissive insulator substrate 1. A thin SiO ₂ layer may be inserted as a buffer layer between the intrinsic or low-concentration N-type Si layer surface 42 and the Si ₃ N ₄ layer 44 as an antioxidant film in order to avoid introducing defects due to strain.

Generally, when Si single crystal is oxidized, its volume increases about 2.2 times, but in the case of porous Si, its volume expansion can be suppressed by controlling its density. It is possible to avoid warpage of the substrate and cracks introduced into the surface residual single crystal layer. The volume ratio R of single-crystal Si to porous Si after oxidation can be expressed as follows.

R = 2.2 × (A / 2.33) where A is the density of porous Si. If R = 1, that is, if there is no volume expansion after oxidation, A = 1.06
(G / cm ² ), and by setting the density of the porous layer to 1.06, volume expansion can be suppressed.

FIG. 2C shows a semiconductor substrate obtained by the present invention. That is, by removing the Si ₃ N ₄ layer 44 as an antioxidant film in FIG. 2B,
A single crystal Si layer 42 having a crystallinity equivalent to that of a silicon wafer is flattened and uniformly thinned on the SiO ₂ light-transmitting insulating substrate 1 to have a large area over the entire wafer.

The semiconductor substrate thus obtained can be preferably used from the viewpoint of producing an electronic element on a light transmissive substrate which is insulated and separated.

The above is the intrinsic or
In this method, a low concentration N-type layer is formed, and then only the P-type substrate is selectively made porous by anodization.

A method of epitaxially growing a single crystal layer after making the whole substrate porous is also effective. A method of epitaxially growing a single crystal layer after making all of the substrate porous will be briefly described.

As described above, in the porous Si layer, pores having an average diameter of about several tens of angstroms are formed in the porous Si layer by observation with a transmission electron microscope, and the density thereof is higher than that of single crystal Si. Despite being less than half, single crystallinity is maintained, and single crystal Si is added to the upper part of the porous layer.
It is also possible to grow the layers epitaxially. However, at 1000 ° C. or higher, internal pore rearrangement occurs during epitaxial growth, and the property of accelerated oxidation is lost. Therefore, for the epitaxial growth of the Si layer, the low pressure CVD method,
Molecular beam epitaxial growth, plasma CVD, optical CV
Low temperature growth such as D and bias sputtering is preferred.

First, a Si single crystal substrate is prepared and all of it is made porous. Next, epitaxial growth is performed on the surface of the porous substrate by low temperature growth to form a thin film single crystal layer. Then, a silicon nitride layer of an antioxidant film is deposited on the surface of the epitaxial layer and then oxidized to transform the entire porous substrate into silicon oxide. Finally, the anti-oxidation film on the surface is removed to obtain a single crystal layer on the light transmissive insulator substrate.

Next, the single crystal thin layer on the surface of the light transmitting substrate is separated into islands by the partial oxidation method or etching.

Next, a method of forming a bipolar transistor on the single crystal thin layer will be described with reference to FIG. NP
N-type impurity ions are implanted into a single crystal silicon island (5 in FIG. 1) to form an N transistor (2 in FIG. 1) to form a collector region. Further, when a PNP transistor is to be formed, P-type impurity ions are implanted into the single crystal silicon island to form a collector region.

Next, as shown in FIG. 3A, an oxide film 8 is formed on the surface by dry oxidation, wet oxidation by pyrogenicity, or the like. Then, the oxide film 8 is partially removed by using photolithography or the like, and an impurity different from that in the collector region is diffused in a part of the collector region 15 by using an ion implantation method, a thermal diffusion method, or the like. The base region 16 is formed. Next, ion implantation is performed on the emitter region 9 and the collector contact region 10 using a mask pattern formed of a photoresist, and an impurity having the same type as that of the collector region 15 is highly doped.

Next, as shown in FIG. 3B, the interlayer insulating layer 11 is deposited by using the CVD method, the bias sputtering method or the like. Further, after forming contact holes by photolithography and etching, the electrodes 12, 13, 14 of the base region 16, the emitter region 9, and the collector contact region 10 are made of Al, Al-Si, W,
The bipolar transistor of the present invention can be obtained by forming it from a metal such as Mo, W silicide, Ti, Ti silicide, or a silicide.

Next, a method for forming a field effect transistor will be described with reference to FIG. P-type impurity ions are formed on the single crystal silicon island (6 in FIG. 1) to form the N-channel transistor (3 in FIG. 1) and the single crystal silicon island (4 in FIG. 1) to form the P-channel transistor (4 in FIG. 1). N-type impurity ions are independently implanted into 7) of 1).

Next, as shown in FIG. 4A, a gate insulating film (19, 20 in FIG. 4) is formed on each single crystal silicon layer (17, 18 in FIG. 4), and further polycrystalline silicon is formed. The gate electrodes (21 and 22 in FIG. 4) are patterned and formed.

Polycrystalline silicon gate electrodes (21, 22)
Using as a mask, the source and drain regions are formed by ion-implanting impurities in a self-aligned manner. For N-channel transistors, N-type impurity ions are implanted to form a source (23 in FIG. 4) and a drain region (2 in FIG. 4).
4), P-type impurity ions are implanted into the P-channel transistor to form a source (25 in FIG. 4) and a drain region (26 in FIG. 4).

Next, after covering the whole with a passivation film (31) as shown in FIG. 4B, the source and drain electrodes (27, 28, 29, 30 in FIG. 4) are deposited and patterned by a metal thin film. Formed to complete the device.

An integrated circuit is manufactured by connecting the above-mentioned bipolar transistor and field effect transistor to each other in a circuit configuration as shown in FIG. 5, for example, by thin film metal wiring.

[0061]

EXAMPLES The present invention will be described below with reference to specific examples.

Example 1 An N-type S was formed on a P-type (100) Si substrate having a thickness of 200 μm by a CVD method.
The i epitaxial layer was grown to 1 micron. The deposition conditions are as follows.

Reaction gas flow rate: SiH ₂ Cl ₂ 1000 SCCM H ₂ 230 l / min. PH ₃ (50 ppm) 72 SCCM Temperature: 1080 ° C. Pressure: 80 Torr Time: 2 min. This substrate was anodized in a 50% HF solution. The current density at this time was 100 mA / cm ² . The rate of porosity at this time is 8.4 μm / mi.
n. And a P-type (10
0) The entire Si substrate became porous in 24 minutes. As described above, in this anodization, only the P-type (100) Si substrate was made porous, and the N-type Si epitaxial layer remained unchanged.

Next, 0.1 μm of Si ₃ N ₄ was deposited on the surface of this epitaxial layer by the low pressure CVD method to form an antioxidant film. Si ₃ N simultaneously formed on the back surface
₄ was removed by reactive ion etching.

After that, the P type (100) made porous
Only the Si substrate was oxidized. As described above, the thermal oxidation rate of a normal Si single crystal is about 1 micron / hour (1200
(° C, wet oxidation, under atmospheric pressure), but the oxidation rate of the porous layer is about 100 times higher. That is, 20
Porous P-type with a thickness of 0 micron (10
0) The Si substrate was oxidized in 2 hours.

After removing the Si ₃ N ₄ layer, a transparent S
A single crystal Si layer having a thickness of 1 μm could be formed on the iO ₂ substrate.

As a result of cross-sectional observation with a transmission electron microscope, S
No new crystal defect was introduced into the i layer, and it was confirmed that good crystallinity was maintained.

NPN bipolar transistors, N-channel and P-channel field effect transistors were formed on the above-mentioned single crystal silicon thin film and connected to each other to prepare an integrated circuit. Since a known integrated circuit manufacturing technique is used for the method of manufacturing each transistor, description thereof will be omitted, and only the method of forming a substantial single crystal semiconductor layer will be described. The same applies to the following examples.

(Embodiment 2) An N-type S is formed on a P-type (100) Si substrate having a thickness of 200 μm by a CVD method.
The i epitaxial layer was grown to 0.5 micron. The deposition conditions are as follows.

Reaction gas flow rate: SiH ₂ Cl ₂ 1000 SCCM H ₂ 230 1 / min. PH ₃ (50 ppm) 72 SCCM Temperature: 1080 ° C. Pressure: 80 Torr Time: 1 min. This substrate was anodized in a 50% HF solution. The current density at this time was 100 mA / cm ² . The porosification rate at this time was 8.4 μm / min. And P-type (100) Si with a thickness of 200 microns
The entire substrate became porous in 24 minutes. As described above, in this anodization, only the P-type (100) Si substrate was made porous, and the N-type Si epitaxial layer remained unchanged.

Next, 0.1 μm of Si ₃ N ₄ was deposited on the surface of this epitaxial layer by the low pressure CVD method to form an antioxidant film. Si ₃ N simultaneously formed on the back surface
₄ was removed by reactive ion etching.

After that, the P-type (100) S made porous
Only the i substrate was oxidized. The thermal oxidation rate of a normal Si single crystal is about 1 micron / hour, but (1200 ° C., wet oxidation, under atmospheric pressure), the oxidation rate of the porous layer is 100 times higher than that. Furthermore, in order to shorten the oxidation time, oxidation was performed under high pressure. When wet oxidation was performed at 1200 ° C. under a pressure of 6.57 kg / cm ² , a 5 times higher oxidation rate was obtained, and a P-type (100) Si substrate having a thickness of 200 μm was 24 Oxidation was complete in minutes.

After removing the Si ₃ N ₄ layer, a transparent S
A single crystal Si layer having a thickness of 1 μm could be formed on the iO ₂ substrate. As a result of cross-sectional observation with a transmission electron microscope,
It was confirmed that new crystal defects were not introduced into the Si layer and good crystallinity was maintained.

Example 3 A P-type (100) single crystal Si substrate having a thickness of 200 μm was anodized in a 50% HF solution. The current density at this time is 10
It was 0 mA / cm ² . The porosification rate at this time is
8.4 μm / min. The entire P-type (100) Si substrate having a thickness of 200 μm was made porous in 24 minutes.

On the P-type (100) porous Si substrate, a Si epitaxial layer was grown at a low temperature of 2 μm by the low pressure CVD method. The deposition conditions are as follows.

Reaction gas: SiH ₄ : 500 sccm Temperature: 850 ° C. Pressure: 30 Torr Growth rate: 0.1 μm / min. After the surface of this epitaxial layer was oxidized to a thickness of 500 nm, 0.1 μm of Si ₃ N ₄ was deposited by a low pressure CVD method to form an antioxidant film. S formed on the back surface at the same time
The i ₃ N ₄ film was removed by reactive ion etching.

After that, only the P-type (100) Si substrate which was made porous was oxidized. The porous P-type (100) Si substrate having a thickness of 200 μm was oxidized in 2 hours by performing wet oxidation at 1200 ° C. under atmospheric pressure.

After removing the Si ₃ N ₄ layer, a transparent S
A single crystal Si layer having a thickness of 1 μm could be formed on the iO ₂ substrate. As a result of cross-sectional observation with a transmission electron microscope,
It was confirmed that new crystal defects were not introduced into the Si layer and good crystallinity was maintained.

Example 4 A P-type (100) single crystal Si substrate having a thickness of 200 μm was anodized in a 50% HF solution. The current density at this time is 10
It was 0 mA / cm ² . The porosification rate at this time is
8.4 μm / min. The entire P-type (100) Si substrate having a thickness of 200 μm was made porous in 24 minutes.

On the P-type (100) porous Si substrate, a Si epitaxial layer was grown at a low temperature of 0.5 μm by the plasma CVD method. The deposition conditions are as follows.

Gas: SiH ₄ High frequency power: 100 W Temperature: 800 ° C. Pressure: 1 × 10 ⁻² Torr Growth rate: 2.5 nm / sec After the surface of this epitaxial layer was oxidized by 50 nm, Si ₃ N was formed by a low pressure CVD method. ₄ is deposited to 0.1 μm,
An antioxidant film was formed. At the same time, Si ₃ formed on the back surface
The N ₄ film was removed by reactive ion etching.

After that, only the P-type (100) Si substrate was oxidized (1200 ° C., wet oxidation, atmospheric pressure). Porous P-type (100) S with a thickness of 200 microns
The i-substrate was oxidized in 2 hours. After removing the Si ₃ N ₄ layer, a single crystal Si layer having a thickness of 1 μm could be formed on the transparent SiO ₂ substrate. As a result of cross-sectional observation with a transmission electron microscope, it was confirmed that new crystal defects were not introduced into the Si layer and good crystallinity was maintained.

Example 5 A P-type (100) single crystal Si substrate having a thickness of 200 μm was anodized in a 50% HF solution. The current density at this time is 10
It was 0 mA / cm ² . The porosification rate at this time is
8.4 μm / min. The entire P-type (100) Si substrate having a thickness of 200 μm was made porous in 24 minutes.

MB on the P-type (100) porous Si substrate
The Si epitaxial layer was grown at a low temperature of 0.5 micron by the E method. The deposition conditions are as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec S was formed on the surface of this epitaxial layer by the low pressure CVD method.
i ₃ N ₄ was deposited to a thickness of 0.1 μm to form an antioxidant film. At the same time, the Si ₃ N ₄ film formed on the back surface was removed by reactive ion etching.

After that, only the P-type (100) Si substrate was oxidized. In order to shorten the oxidation time, oxidation was performed under high pressure (wet oxidation at 1200 ° C. under a pressure of 6.57 kg / cm ² ). The porous P-type (100) Si substrate having a thickness of 200 μm was completely oxidized in 24 minutes.

After removing the Si ₃ N ₄ layer, a transparent S
A single crystal Si layer having a thickness of 1 μm could be formed on the iO ₂ substrate. As a result of cross-sectional observation with a transmission electron microscope,
It was confirmed that new crystal defects were not introduced into the Si layer and good crystallinity was maintained.

Example 6 A P-type (100) single crystal Si substrate having a thickness of 200 μm was anodized in a 50% HF solution. The current density at this time is 10
It was 0 mA / cm ² . The porosification rate at this time is
8.4 μm / min. The entire P-type (100) Si substrate having a thickness of 200 μm was made porous in 24 minutes.

On the P-type (100) porous Si substrate, a Si epitaxial layer was grown at a low temperature of 0.5 μm by the plasma CVD method. The deposition conditions are as follows.

Gas: SiH ₄ High frequency power: 100 W Temperature: 800 ° C. Pressure: 1 × 10 ^-2 Torr Growth rate: 2.5 nm / sec After the surface of this epitaxial layer was oxidized by 50 nm, Si ₃ N was formed by a low pressure CVD method. ₄ is deposited to 0.1 μm,
An antioxidant film was formed. At the same time, Si ₃ formed on the back surface
N ₄ was removed by reactive ion etching.

After that, only the P-type (100) Si substrate was oxidized. In order to shorten the oxidation time, oxidation was performed under high pressure (wet oxidation at 1200 ° C. under a pressure of 6.57 kg / cm ² ). The porous P-type (100) Si substrate having a thickness of 200 μm was completely oxidized in 24 minutes.

After removing the Si ₃ N ₄ layer, a transparent S
A single crystal Si layer having a thickness of 1 μm could be formed on the iO ₂ substrate. As a result of cross-sectional observation with a transmission electron microscope,
It was confirmed that new crystal defects were not introduced into the Si layer and good crystallinity was maintained.

Example 7 An N-type Si layer having a thickness of 1 μm was formed on the surface of a P-type (100) Si substrate having a thickness of 200 μm by ion implantation of protons. The H ⁺ injection amount was 5 × 10 ¹⁵ (ions / cm ² ). This substrate was anodized in a 50% HF solution.
The current density at this time was 100 mA / cm ² . The porosification rate at this time was 8.4 μm / min. And
The entire P-type (100) Si substrate with a thickness of 200 microns was made porous in 24 minutes. As described above, in this anodization, only the P-type (100) Si substrate was made porous and the N-type Si layer remained unchanged.

After oxidizing the surface of this N-type Si layer by 50 nm, 0.1 μ of Si ₃ N ₄ was applied to the surface by a low pressure CVD method.
Then, an antioxidant film was formed. At the same time, the Si ₃ N ₄ film formed on the back surface was removed by reactive ion etching.

After that, only the P-type (100) Si substrate was oxidized (1200 ° C., wet oxidation, under atmospheric pressure). 200
Porous P-type (100) with micron thickness
The Si substrate was oxidized in 2 hours.

After removing the Si ₃ N ₄ layer, a transparent S
A single crystal Si layer having a thickness of 1 μm could be formed on the iO ₂ substrate. As a result of cross-sectional observation with a transmission electron microscope,
It was confirmed that new crystal defects were not introduced into the Si layer and good crystallinity was maintained.

[0097]

As described above in detail, in the semiconductor device according to the present invention, the element is formed on the high quality single crystal layer formed on the transparent substrate obtained by oxidizing the porous substrate. An integrated circuit composed of semiconductor devices such as high performance bipolar transistors and field effect transistors can be manufactured.

Therefore, the capacitance between the substrate and the collector is reduced on the light-transmissive substrate, and the bipolar transistor without soft error due to α-rays and the like, and the field effect transistor with less stray capacitance and latch-up phenomenon can be manufactured. By appropriately combining these, it becomes possible to provide an integrated circuit capable of high-speed operation at a low price.
Further, according to the present invention, originally, a good quality single crystal Si substrate is used as a starting material, and the single crystal layer is left only on the surface, and the S
Since the i substrate is transformed into transparent SiO ₂ , it has become easy to form a single crystal layer having excellent crystallinity on a light transmissive substrate which has been difficult in the past. Further, since no glass substrate or the like is used, there is no concern about new contamination of impurities.

Further, as described in detail in the embodiments, it becomes possible to perform a large number of processes in a short time, which is a great improvement in productivity and economic efficiency.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view for explaining a substrate manufacturing process of the semiconductor device shown in FIG.

FIG. 3 is a schematic cross-sectional view for explaining a step of forming a bipolar transistor of the semiconductor device shown in FIG.

FIG. 4 is a schematic cross-sectional view for explaining a step of forming a field effect transistor of the semiconductor device shown in FIG.

FIG. 5 is a circuit diagram of a semiconductor device according to an example of the present invention.

[Explanation of symbols]

1 Light Transmissive Insulator Silicon Oxide Substrate 2 NPN Bipolar Transistor 3 N-Channel Field Effect Transistor 4 P-Channel Field Effect Transistor 5 Island Single Crystal Layer 6 Island Single Crystal Layer 7 Island Single Crystal Layer 8 Oxide Film 9 Emitter Region 10 collector contact region 11 interlayer insulating layer 12 base electrode 13 emitter electrode 14 collector electrode 15 collector region 16 base region 17 island-shaped single crystal layer 18 island-shaped single crystal layer 19 gate oxide film 20 gate oxide film 21 gate electrode 22 gate electrode 23 Source region 24 Drain region 25 Source region 26 Drain region 27 Source electrode 28 Drain electrode 29 Source electrode 30 Drain electrode 31 Passivation film 41 Si single crystal substrate 42 Si single crystal substrate 43 Porous Si substrate 44 Si ₃ N _Four Antioxidant film

Claims (5)

[Claims] 1. A substrate having a non-porous semiconductor single crystal layer on a porous semiconductor layer, wherein the porous semiconductor layer is oxidized to form a light transmissive insulator at least in a visible light region, and the light transmissive substrate. A semiconductor device comprising a bipolar transistor and an insulated gate field effect transistor, each of which has the non-porous semiconductor single crystal layer on a conductive insulator substrate as an active region. 2. The semiconductor device according to claim 1, wherein the non-porous semiconductor single crystal layer is a non-porous silicon single crystal layer, and the porous semiconductor layer is a porous silicon layer. 3. A step of forming a substrate having a non-porous silicon single crystal layer on a porous silicon substrate; oxidizing the porous silicon substrate to transmit light in at least a visible light region; A method of manufacturing a semiconductor device, comprising: a step of forming an insulator substrate; and a step of forming an element using the non-porous silicon single crystal layer as an active layer. 4. The method for manufacturing a semiconductor device according to claim 3, wherein the non-porous silicon single crystal layer is formed on the porous silicon substrate by epitaxial growth. 5. The step of forming a substrate having a non-porous silicon single crystal layer on the porous silicon substrate comprises anodizing a substrate having an N-type silicon single crystal layer formed on a P-type silicon substrate, The method for manufacturing a semiconductor device according to claim 3, wherein the step is a step of making the P-type silicon substrate porous.