JPH0522372B2 - - Google Patents
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- Publication number
- JPH0522372B2 JPH0522372B2 JP56053655A JP5365581A JPH0522372B2 JP H0522372 B2 JPH0522372 B2 JP H0522372B2 JP 56053655 A JP56053655 A JP 56053655A JP 5365581 A JP5365581 A JP 5365581A JP H0522372 B2 JPH0522372 B2 JP H0522372B2
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- Prior art keywords
- capacitance
- semiconductor porcelain
- mol
- weight
- grain
- Prior art date
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- Inorganic Insulating Materials (AREA)
Description
この発明は粒界絶縁形半導体磁器コンデンサ用
の組成物に関するものである。
従来、小型で大容量のコンデンサとしては、堰
層容量形半導体磁器コンデンサ、表面絶縁層形半
導体磁器コンデンサ、あるいは粒界絶縁形半導体
磁器コンデンサがある。
このうち、堰層容量形半導体磁器コンデンサは
400〜500nF/cm2の静電容量値を示すが、tanδは
4〜5%と大きく、絶縁抵抗(IR)も1MΩの値
しか得られていない。また表面絶縁層形半導体磁
器コンデンサは、tanδ、静電容量温度特性、静電
容量変化率、歪率などの特性に良好なものが得ら
れない。さらに粒界絶縁形半導体磁器コンデンサ
は表面絶縁層形半導体磁器にくらべてほとんどの
点ですぐれた電気特性を示すが、静電容量はせい
ぜい300nF/cm2である。
したがつて、この発明は静電容量が400〜
500nF/cm2と大きな値を示す粒界絶縁形半導体磁
器コンデンサが得られる磁器組成物を得ることを
目的とする。
また、この発明は組成比のズレに対しても安定
した特性を示す粒界絶縁形半導体磁器組成物を提
供することを目的とする。
すなわち、この発明の要旨とするところは、
(Ba1-xSrx)(Ti1-yZry)O3(0.9≦2x+3y≦2.3,
0.4≧x,0.6≧y)または(Ba1-xSrx)(Ti1-y
Zry)O3(0.9≦2x+3y≦2.3,0.4≧x,0.6≧y)
を主体としてその他にチタン酸塩、ジルコン酸塩
を含む主成分に対し、La、Yなどの希土類元素、
Nb、Ta、Wなどの半導体化剤を含有し、かつ最
大結晶粒径が100〜250μmである半導体磁器であ
つて、その半導体磁器の結晶粒界が金属酸化物に
より絶縁体化されてなる粒界絶縁形半導体磁器組
成物である。
上記したうち、(Ba1-xSrx)(Ti1-yZry)O3にお
いて、x、yは0.9≦2x+3y≦2.3,0.4≧x,0.6
≧yの関係にあることが良好な特性を得るために
必要である。これは2x+3yが0.9未満になると静
電容量が低下し、一方2x+3yが2.3を越えると静
電容量が低下するからである。またxが0.4を越
えると大きな粒径の結晶粒子が得られにくくな
る。さらにyが0.6を越えると静電容量が低下す
るからである。
第1図はxとyの量的な相関関係を示したもの
であり、多角形で囲まれた領域が発明範囲内を示
す。
また、(Ba1-xSrx)(Ti1-ySry)O3に、その他
の、たとえばCaTiO3などのチタン酸塩、CaZrO3
などのジルコン酸塩のうち少なくとも1種を含有
させる場合、含有させる量は10モル%以下が適当
である。これは10モル%を超えると、その含有効
果である焼結性の向上や、電気特性の再現性が期
待できないことによる。
さらに、半導体化剤の含有範囲としては、0.1
〜1.0モル%が好ましい。この範囲を外れると通
常中性または還元性雰囲気中で焼成しても10〜
10-1Ω・cm程度の値を有する半導体磁器が得られ
なくなる。
さらにまた、半導体磁器にはSiO2,Al2O3,
TiO2のうち少なくとも1種を含有させるとこも
許されるが、その含有効果としては焼成温度を低
下させることができ、絶縁破壊も高めることがで
きる。このうちSiO2の含有範囲としては0.05〜
0.5モル%が好ましい。これはSiO2が0.05モル%
未満ではまだ焼成温度が高く、その添加効果が現
われないからであり、0.5モル%を超えると誘電
率の低下が見られる。またAl2O3の含有範囲とし
ては0.02〜0.2モル%が好ましい。これは0.02モル
%未満では絶縁破壊を高める効果が得られず、
0.2モル%を超えると誘電率の低下が見られる。
さらにTiO2の含有範囲としては0.05モル%以
下が好ましい。これは0.05モル%を超えると、大
きな粒径の結晶が得られにくく、十分な静電容量
が得られないことによる。
半導体磁器の結晶粒界を絶縁体化するものとし
て、たとえばPb、Bi、Cu、B、Muなどの金属、
酸化物などの化合物があり、結晶粒界には熱処理
により拡散させる方法が採られる。このほか、結
晶粒界を絶縁体化処理するには、蒸着法、スパツ
タリング法などの乾式メツキにより半導体磁器表
面に付与したのち熱処理する方法、あるいは化合
物のペーストを塗布し熱処理する方法などがあ
る。
この半導体磁器組成物は、原料を所定比率に混
合し、一定の形に成型したのち中性または還元性
雰囲気中で焼成されるが、得られた半導体磁器の
結晶粒径、得に最大結晶粒径が100〜250μmの範
囲にあるものが電気特性に好ましい結果をもたら
す。もし最大結晶粒径が100μm未満であれば、
静電容量、静電容量温度特性、静電容量変化率が
低下することになる。また250μmを越えると電
気特性が劣化するとともに、大きさ静電容量を得
るための薄膜化に障害となるからである。
また、半導体磁器にMnを0.02〜0.5モル%の範
囲で含有させることによつて、絶縁抵抗(IR)
を向上させることができる。
なお、半導体磁器には特性に悪影響を与えない
程度に不可避的な不純物が含まれることが許容さ
れるが、たとえば、ZnO、Bi2O3、CuOなどを含
有させると、焼結性、再現性などに効果をもたら
す。含有させる範囲は明確に限定できないが、特
性改善のため微量含有させればよい。
以下、この発明を実施例に従つて詳細に説明す
る。
実施例
第1表の組成比の半導体磁器が得られるよう
に、BaCO3、SrCO3、TiO2、CaTiO3、BaZrO3
などの主材料、Y2O3、La2O5、WO3、Nb2O5、
Er2O3などの半導体化剤、SiO2、Al2O3、TiO2な
どの鉱化剤を秤量、混合し、1100℃で2時間仮焼
した。
次いで、酢酸ビニル系樹脂を10重量%加えて湿
式粉砕し、30メツシユの篩で整粒したのち、成型
圧力750Kg/cm2で直径10mmφ、肉厚0.5mmの円板に
成型した。
成型円板を自然雰囲気中にて1150℃で熱処理
し、さらに窒素98容量%、水素2容量%からなる
還元性雰囲気中にて1400℃で2〜4時間焼成し、
半導体磁器を得た。
得られた半導体磁器の結晶粒界を絶縁体化する
ため、あらかじめ用意した金属酸化物のペースト
を塗布方法により半導体磁器表面に付与し、空気
中1150℃で2時間熱処理を行い、結晶粒界を絶縁
体化した。
金属酸化物のペーストの種類としては次のよう
なものを用い、各試料に付与する金属酸化物のペ
ーストは記号A、B、Cで第1表に示した。
A:Pb3O4 40重量%、Bi2O3 10重量%、樹脂ワ
ニス 50重量%
B:Bi2O3 42重量%、CuO 4重量%、MnCO3
4重量%、樹脂ワニス 50重量%
C:Pb3O4 45重量%、H2BO2 5重量%、樹脂ワ
ニス 50重量%
さらに、粒界絶縁形半導体磁器の両面に銀ペー
ストを印刷、塗布し、800℃で30分間焼付けてコ
ンデンサを作成した。
得られたコンデンサについて電気特性を測定
し、その結果を第2表に示した。第1表、第2表
中※印を付したものはこの発明範囲外のものであ
り、それ以外は発明範囲内のものである。
This invention relates to a composition for a grain-boundary insulated semiconductor ceramic capacitor. Conventionally, small-sized, large-capacity capacitors include barrier layer capacitance type semiconductor ceramic capacitors, surface insulation layer type semiconductor ceramic capacitors, and grain boundary insulation type semiconductor ceramic capacitors. Among these, weir layer capacitance type semiconductor ceramic capacitors are
Although it shows a capacitance value of 400 to 500 nF/cm 2 , tan δ is as large as 4 to 5%, and the insulation resistance (IR) is only 1 MΩ. Furthermore, surface insulating layer type semiconductor ceramic capacitors do not have good characteristics such as tan δ, capacitance temperature characteristics, capacitance change rate, and distortion rate. Furthermore, grain boundary insulated semiconductor ceramic capacitors exhibit superior electrical properties in most respects compared to surface insulated layer type semiconductor ceramic capacitors, but their capacitance is at most 300 nF/cm 2 . Therefore, this invention has a capacitance of 400~
The purpose of the present invention is to obtain a ceramic composition capable of producing a grain boundary insulated semiconductor ceramic capacitor exhibiting a large value of 500 nF/cm 2 . Another object of the present invention is to provide a grain-boundary insulated semiconductor ceramic composition that exhibits stable characteristics even when the composition ratio varies. In other words, the gist of this invention is:
(Ba 1-x Sr x ) (Ti 1-y Zr y ) O 3 (0.9≦2x+3y≦2.3,
0.4≧x, 0.6≧y) or (Ba 1-x Sr x ) (Ti 1-y
Zr y ) O 3 (0.9≦2x+3y≦2.3, 0.4≧x, 0.6≧y)
The main components include titanate and zirconate, as well as rare earth elements such as La and Y,
Semiconductor porcelain containing a semiconducting agent such as Nb, Ta, W, etc. and having a maximum crystal grain size of 100 to 250 μm, the crystal grain boundaries of the semiconductor porcelain being made into an insulator by a metal oxide. It is a field insulated semiconductor ceramic composition. Among the above, in (Ba 1-x Sr x ) (Ti 1-y Zr y ) O 3 , x and y are 0.9≦2x+3y≦2.3, 0.4≧x, 0.6
It is necessary to have a relationship of ≧y in order to obtain good characteristics. This is because when 2x+3y becomes less than 0.9, the capacitance decreases, while when 2x+3y exceeds 2.3, the capacitance decreases. Moreover, when x exceeds 0.4, it becomes difficult to obtain crystal grains with a large grain size. Furthermore, if y exceeds 0.6, the capacitance decreases. FIG. 1 shows the quantitative correlation between x and y, and the area surrounded by polygons indicates the area within the scope of the invention. In addition, (Ba 1-x Sr x ) (Ti 1-y Sr y )O 3 can be combined with other titanates such as CaTiO 3 , CaZrO 3
When at least one kind of zirconate such as is contained, the amount to be contained is suitably 10 mol% or less. This is because if the content exceeds 10 mol%, the effects of its inclusion, such as improvement in sinterability and reproducibility of electrical properties, cannot be expected. Furthermore, the content range of the semiconducting agent is 0.1
~1.0 mol% is preferred. Outside this range, even if fired in a neutral or reducing atmosphere, the
Semiconductor porcelain having a value of about 10 -1 Ω·cm cannot be obtained. Furthermore, semiconductor porcelain contains SiO 2 , Al 2 O 3 ,
Although it is permissible to include at least one type of TiO 2 , the effect of its inclusion is that the firing temperature can be lowered and dielectric breakdown can also be increased. Among these, the content range of SiO 2 is 0.05~
0.5 mol% is preferred. This is 0.05 mol% SiO2
If it is less than 0.5 mol %, the firing temperature will still be high and the effect of its addition will not be apparent, and if it exceeds 0.5 mol %, a decrease in the dielectric constant will be observed. Moreover, the content range of Al 2 O 3 is preferably 0.02 to 0.2 mol %. This means that if it is less than 0.02 mol%, the effect of increasing dielectric breakdown cannot be obtained.
If it exceeds 0.2 mol%, a decrease in dielectric constant is observed. Further, the content range of TiO 2 is preferably 0.05 mol% or less. This is because if the content exceeds 0.05 mol %, it is difficult to obtain crystals with a large particle size and sufficient capacitance cannot be obtained. For example, metals such as Pb, Bi, Cu, B, Mu,
There are compounds such as oxides, and a method of diffusing them at grain boundaries by heat treatment is adopted. Other methods of insulating grain boundaries include applying it to the surface of semiconductor porcelain by dry plating such as vapor deposition or sputtering, and then heat-treating it, or applying a compound paste and heat-treating it. This semiconductor porcelain composition is produced by mixing raw materials in a predetermined ratio, molding them into a certain shape, and then firing them in a neutral or reducing atmosphere. A diameter in the range of 100 to 250 μm brings about favorable electrical properties. If the maximum grain size is less than 100 μm,
The capacitance, capacitance temperature characteristics, and capacitance change rate will decrease. Moreover, if the thickness exceeds 250 μm, the electrical characteristics deteriorate and it becomes an obstacle to thinning the film to obtain a large capacitance. In addition, by incorporating Mn in the range of 0.02 to 0.5 mol% into semiconductor porcelain, insulation resistance (IR) can be improved.
can be improved. Semiconductor porcelain is allowed to contain unavoidable impurities to the extent that it does not adversely affect its properties, but for example, if it contains ZnO, Bi 2 O 3 , CuO, etc., it may affect sinterability and reproducibility. etc. has an effect. Although the range in which it is contained cannot be clearly defined, it may be contained in a small amount in order to improve properties. Hereinafter, this invention will be explained in detail according to examples. Example BaCO 3 , SrCO 3 , TiO 2 , CaTiO 3 , BaZrO 3 was used to obtain semiconductor porcelain having the composition ratio shown in Table 1.
Main materials such as Y 2 O 3 , La 2 O 5 , WO 3 , Nb 2 O 5 ,
Semiconducting agents such as Er 2 O 3 and mineralizing agents such as SiO 2 , Al 2 O 3 and TiO 2 were weighed and mixed, and calcined at 1100° C. for 2 hours. Next, 10% by weight of vinyl acetate resin was added, wet-pulverized, sieved through a 30-mesh sieve, and then molded into a disc with a diameter of 10 mmφ and a wall thickness of 0.5 mm at a molding pressure of 750 kg/cm 2 . The molded disk was heat treated at 1150°C in a natural atmosphere, and then fired at 1400°C for 2 to 4 hours in a reducing atmosphere consisting of 98% nitrogen and 2% hydrogen by volume.
A semiconductor porcelain was obtained. In order to make the grain boundaries of the obtained semiconductor porcelain an insulator, a metal oxide paste prepared in advance was applied to the surface of the semiconductor porcelain by a coating method, and heat treatment was performed in air at 1150°C for 2 hours to transform the grain boundaries. Made into an insulator. The following types of metal oxide pastes were used, and the metal oxide pastes applied to each sample are shown in Table 1 with symbols A, B, and C. A: Pb 3 O 4 40% by weight, Bi 2 O 3 10% by weight, resin varnish 50% by weight B: Bi 2 O 3 42% by weight, CuO 4% by weight, MnCO 3
4% by weight, resin varnish 50% by weight C: Pb 3 O 4 45% by weight, H 2 BO 2 5% by weight, resin varnish 50% by weight Furthermore, silver paste was printed and applied on both sides of the grain boundary insulated semiconductor porcelain. , the capacitor was created by baking at 800℃ for 30 minutes. The electrical characteristics of the obtained capacitor were measured and the results are shown in Table 2. Items marked with * in Tables 1 and 2 are outside the scope of this invention, and the others are within the scope of the invention.
【表】【table】
【表】【table】
【表】
第1表中の電気特性は次に示す条件で測定した
値である。
静電容量(Cs)、誘電体損失(tanδ):+20℃、
周波数1KHz、電圧0.2Vrms以下で測定した値。
絶縁抵抗(IR):+20℃において、試料の厚み単
位mm当り、直流電圧10Vを印加した30秒後の値
である。
静電容量温度特性(△TC):+20℃を基準とし
て、−25℃〜+85℃温度範囲における最大容量
変化率を示した値。
静電容量変化率(DCB):+20℃において、直流
電圧0.2Vを印加したときの静電容量に体して、
直流電圧10Vを印加したときの静電容量の変化
を百分率で表わした値。
歪率:+20℃、周波数1KHz、印加電圧1Vにおけ
る全高周波歪率を示した値。
周波数特性(E.S.R.):1MHz付近の値。
上記した実施例から明らかなように、この発明
にかかる粒界絶縁形半導体磁器組成物を用いてコ
ンデンサを構成することによつて、Cs、△TC、
tanδ、DCB、歪率、E.S.R.の各特性とも実用上
十分な値のものが得られている。また従来の組成
物によるモル比のズレの許容度は1/1000程度であ
つたが、この発明によれば5/1000以上の許容度と
なり、調合組成のズレに対しても安定な特性が得
られるという効果を有する。[Table] The electrical properties in Table 1 are values measured under the following conditions. Capacitance (Cs), dielectric loss (tanδ): +20℃,
Values measured at a frequency of 1KHz and a voltage of 0.2Vrms or less. Insulation resistance (IR): Value at +20°C, 30 seconds after applying a DC voltage of 10 V per mm of sample thickness. Capacitance temperature characteristic (△TC): Value indicating the maximum capacitance change rate in the temperature range of -25°C to +85°C, with +20°C as the standard. Capacitance change rate (DCB): Based on the capacitance when a DC voltage of 0.2V is applied at +20℃,
The value expressed as a percentage of the change in capacitance when a DC voltage of 10V is applied. Distortion rate: Value showing the total high frequency distortion rate at +20℃, frequency 1KHz, and applied voltage 1V. Frequency characteristics (ESR): Value around 1MHz. As is clear from the above examples, by constructing a capacitor using the grain boundary insulated semiconductor ceramic composition according to the present invention, Cs, △TC,
Practically sufficient values of tanδ, DCB, distortion rate, and ESR were obtained. Furthermore, while the tolerance for deviations in molar ratio with conventional compositions was about 1/1000, this invention has a tolerance of more than 5/1000, and stable characteristics can be achieved even with deviations in the formulation composition. It has the effect of being
第1図はX(Sr量)とY(Zr量)の相関関係を
示す図である。
FIG. 1 is a diagram showing the correlation between X (Sr amount) and Y (Zr amount).
Claims (1)
2.3,0.4≧x,0.6≧y)、または(Ba1-xSrx)
(Ti1-yZry)O3(0.9≦2x+3y≦2.3,0.4≧x,0.6
≧y)を主体としてその他にチタン酸塩、ジルコ
ン酸塩を含む主成分に対し、La、Yなどの希土
類元素、Nb、Ta、Wなどの半導体化剤を含有
し、かつ最大結晶粒径が100〜250μmである半導
体磁器であつて、その半導体磁器の結晶粒界が金
属酸化物により絶縁体化されてなる粒界絶縁形半
導体磁器組成物。1 (Ba 1-x Sr x ) (Ti 1-y Zr y ) O 3 (0.9≦2x+3y≦
2.3, 0.4≧x, 0.6≧y) or (Ba 1-x Sr x )
(Ti 1-y Zr y ) O 3 (0.9≦2x+3y≦2.3, 0.4≧x, 0.6
≧y) and other main ingredients including titanate and zirconate, contains rare earth elements such as La and Y, and semiconducting agents such as Nb, Ta, and W, and has a maximum crystal grain size. A grain boundary insulated semiconductor porcelain composition comprising semiconductor porcelain having a diameter of 100 to 250 μm, wherein the grain boundaries of the semiconductor porcelain are made into an insulator with a metal oxide.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5365581A JPS57167618A (en) | 1981-04-08 | 1981-04-08 | Grain boundary insulating type semiconductor porcelain composition |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5365581A JPS57167618A (en) | 1981-04-08 | 1981-04-08 | Grain boundary insulating type semiconductor porcelain composition |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS57167618A JPS57167618A (en) | 1982-10-15 |
| JPH0522372B2 true JPH0522372B2 (en) | 1993-03-29 |
Family
ID=12948877
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5365581A Granted JPS57167618A (en) | 1981-04-08 | 1981-04-08 | Grain boundary insulating type semiconductor porcelain composition |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57167618A (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2634896C2 (en) * | 1976-08-03 | 1985-08-14 | Siemens AG, 1000 Berlin und 8000 München | Capacitor dielectric with internal barrier layers and process for its manufacture |
| DE2659672B2 (en) * | 1976-12-30 | 1980-12-04 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Capacitor dielectric with internal barrier layers and process for its manufacture |
-
1981
- 1981-04-08 JP JP5365581A patent/JPS57167618A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS57167618A (en) | 1982-10-15 |
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