JPH05224710A - Operating mode setting method for programmable controller - Google Patents

Abstract

(57) [Summary] (Correction) [Purpose] The operation mode change time is changed in proportion to the scan processing time. A program for reading the instruction mode of the operation mode changeover switch 60A is provided in the system program for executing the scan process, and the CPU 10 instructs the operation mode changeover switch 60A every time the CPU 10 repeatedly executes the scan process. Read the mode and switch the operation mode to the instruction mode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an operation mode setting method for a programmable controller for automatically controlling electronic equipment by executing a sequence program.

[0002]

2. Description of the Related Art A typical circuit configuration example of a conventional programmable controller is shown in FIG.

In FIG. 3, a central processing unit (CP
U) 10 performs the following control processing according to the system program in the system program memory 20.

(1) Operation control of circuit connected to bus (2) Operation control of device 60B to be controlled according to sequence program stored in user program (3) Operation mode instructed by operation mode changeover switch 60A , An operation mode for executing the above item (2),
Setting process of system operation mode such as stop mode for stopping operation mode The bit arithmetic processor (BP) shares the CPU 10 and performs sequence arithmetic. User program memory 40
A sequence program created by the user for controlling the device 60B is stored in the.

The data memory 50 stores control signals transmitted to and received from the device 60B. A control signal indicating an operating state (generally called a contact signal) is received from the device 60B, a control signal for instructing an operation is determined by a sequence operation based on the control signal, and the control signal is transmitted to the device 60B.

The input / output interface (I / O) 60 is connected to the operation mode changeover switch 60A and the device 60B to be controlled, and transfers information between the CPU 10 and these devices.

The work memory 70 stores data relating to system control executed by the CPU 10. In the work memory 70, there is provided a mode information storage area for storing mode information indicating the currently set mode state.

The CPU 10 identifies the instruction content of the operation mode changeover switch 60A by the interrupt processing of a fixed cycle.
Next, the CPU 10 writes the mode information indicating the identified mode content in the mode information storage area in the work memory 70.

If the interrupt processing of such a constant cycle is not performed, the CPU 10 according to the system program,
These processes are repeatedly executed in the order of system-related processing → setting mode determination processing → determined mode execution processing → contact signal input / output processing with respect to the device 60B to be controlled. A series of these processes is called a scan process, and a system-related process and a setting mode determination process performed prior to the determined mode execution process are called a scan valley process.

When the operating mode is instructed by the operating mode changeover switch 60A, the operating mode set and stored in the work memory 70 is C when the setting mode determining process is executed.
It is read by the PU 10 and the content is identified. As a result,
While the operation mode is stored in the work memory 70, the operation mode, that is, the arithmetic processing of the sequence program is executed.

When the user instructs the stop mode by the operation mode changeover switch 60A, the CPU 10 sets and stores the stop mode in the work memory 70 by the interrupt process at that time, and then restarts the scan process. When the setting mode determination process is executed, the CPU 10 detects that the stop mode is instructed and executes the stop mode.

Since the user's operation mode instruction timing is not constant, the CPU 10 reads the instruction content of the operation mode changeover switch 60A in a certain constant cycle. For this reason, an interrupt signal is input to the CPU 10 at a constant cycle by a timer (not shown) or the like, and the CPU 10 interrupts the scanning process that is currently being performed and performs the reading process of the operation mode changeover switch 60A.

[0013]

However, when the programmable controller required for high speed control or the sequence program created by the user is short, the execution cycle of the scan process may be much shorter than the desired time required for mode change. Occurs. In this case, even though the time required to change the mode is almost constant, the operation mode is changed after a large number of scans, so the user feels that the responsiveness of the programmable controller has deteriorated. there were.

Therefore, in view of the above points, an object of the present invention is to provide a programmable controller operation mode setting method capable of speeding up a change response to an operation mode instruction when a scan cycle is short. Especially.

[0015]

In order to achieve such an object, the present invention reads an operation mode instructed by an operation mode changeover switch in synchronization with a scanning process, and based on the read instruction mode, It is characterized in that the operation mode currently set in the programmable controller is switched.

[0016]

According to the present invention, the operation mode instructed by the operation mode changeover switch is read in synchronism with the scan processing instead of the conventional instruction timing by the interrupt, so that the operation mode is changed in proportion to the cycle of the scan processing. The response time required for changes. Therefore, as the scan processing time becomes shorter, the operation mode change response time also becomes shorter.

[0017]

Embodiments of the present invention will now be described in detail with reference to the drawings.

Since the programmable controller in this embodiment can have the same configuration as that of the conventional one shown in FIG. 3, the explanation of the circuit will be omitted, and the difference between this embodiment and the conventional one will be explained.

The present embodiment differs from the conventional example in that the operation mode is set by the system program shown in FIGS. 1 and 2 (stored in the system program memory 20 of FIG. 3).

The system program of FIG. 1 shows the processing procedure of the scan processing.

In FIG. 1, the CPU 10 (see FIG. 3)
However, the difference from the conventional example is that the operation mode setting process is executed in the valley of the scan process in synchronization with the scan process.

That is, the CPU 10 shifts to the switch reading process of FIG. 2 in step S1, and performs the first reading of the instruction mode from the driving operation mode changeover switch 60A (step S101 of FIG. 2). Next, the CPU 10 compares the setting mode (for example, operation mode) of the mode information storage area in the work memory 70 with the mode (for example, stop mode) read in step S101.

When it is determined that the two modes do not match,
The CPU 10 determines that the mode instruction has been changed, and temporarily sets and stores the read mode in the mode information storage area (steps S102 → S106 in FIG. 2).

Next, the CPU 10 sets the counter in the CPU 10 to "0" and returns to the control procedure of FIG. 1 (step S107 of FIG. 2 → step S2 of FIG. 1). This counter is for counting the number of consecutive coincidences between the reading mode and the setting mode. When the number of coincidences reaches a predetermined number (three times for explanation), the operation change request flag (installed in the work memory 70) is turned on, and the mode change is permitted. At the present stage, the operation change request flag remains off.

In step S2 of FIG. 2, the CPU 10 checks whether the operation change request mode flag is on or off, and when it confirms that the mode change is not permitted, the CPU 10 advances the execution procedure to step S3 to execute another scan valley process. It is executed (step S4 in FIG. 1).

Thereafter, the CPU 10 executes the operation mode discrimination processing (step S5 in FIG. 1). More specifically, the stored information in the mode information storage area in the work memory 70 (currently the information indicating the operation mode) is compared with the information indicating the various modes, and the mode processing in which the both information match is executed. In the case of the present embodiment, since the setting of the operation mode is determined, the execution procedure of the CPU 10 proceeds to step S6A, the operation processing mode is executed, and then the input / output processing (described in the conventional example) is executed. (Step S6A of FIG. 1
→ S7).

When the one-time scanning process is completed in this way and the second-time scanning process is started from step S1 in FIG. 1, the execution procedure of the CPU 10 shifts to step S101 in FIG. 2 again. Operation mode switch 60
The second reading is performed for the A instruction mode.

Next, the CPU 10 compares the previous read mode (stop mode) temporarily stored in the work memory 70 with the current read mode (stop mode) (step S102 in FIG. 2). Since a coincidence determination is obtained in this comparison, the CPU 10 currently sets the count value of the counter to “0”.
Counting up from "1" to "1" (step S in FIG. 2)
103).

When it is confirmed in step S104 that the counted-up count value has not reached the predetermined number "3", the CPU 10 returns the execution procedure to step S2 in FIG. Perform processing.
When the scanning process is repeated in this manner and the count value of the counter reaches "3", the CPU 10 determines in step S104 of FIG. 2 that the operation mode changeover switch 60A is instructed to change the mode, not chattering. Then, the operation change request flag is changed from the current OFF state to the ON state (step S105 in FIG. 2). Further, the count value of the counter is reset to "0" (step S in FIG. 2).
107).

In step S2 of the control procedure of FIG.
Upon detecting that the operation change flag is turned on and confirming that the operation mode change is permitted, the CPU 10 overwrites the mode (stop mode) temporarily stored in the normal work area in the work memory 70 in the mode information storage area. The setting mode is changed by storing (step S3 in FIG. 1).

The changed setting mode (stop mode) is identified in step S5, and the stop mode is executed in step S6B.

On the other hand, when the instruction content of the operation mode changeover switch 60A changes due to chattering or the like, the count value of the counter is reset each time the instruction content changes (steps S101 → S106 → S107 in FIG. 2). Therefore, the count value of the counter does not reach the predetermined value, the operation change request flag is not turned on, and the mode information currently set in the mode information storage area is not changed.

In this embodiment, the operation mode changeover switch 60 is synchronized with the scanning process by executing the switch reading process of FIG. 2 in the scanning process of FIG.
Since the instruction content of A is read, the shorter the scan processing time, the shorter the response time until the mode change processing.

In addition to this embodiment, the following examples can be given.

1) In the present embodiment, since the programmable controller having a short scan process is targeted, the count end value of the counter is fixed, but the response time until the mode change process and the chattering removal performance are related. The count end value of the counter may be variably set. If the response time is desired to be shortened, the count end value of the counter may be set small, and if the chattering removal performance is desired to be improved, the count end value of the counter may be set large. As the variable setting method, a manual instruction method or an automatic instruction method can be used.

In the case of manual instruction, when the power is turned on, the above-mentioned counting end value is manually input from the programming device to the programmable controller, and the CP of the programmable controller is set.
The initial setting value of the counter is determined by U10.

In the case of the automatic instruction, the scan time (steps S1 to S in FIG. 1) is set in the initialization process when the power is turned on.
The execution time of 7) is measured by the timer, and the CPU 10 sets the count end value of the timer in correspondence with the result of the timer measurement.

[0038]

As described above, since the mode change response time changes in proportion to the scan time, the user does not feel uncomfortable. Further, since the interrupt processing as in the conventional case is not performed, the scan processing is not interrupted and it is possible to contribute to improving the reliability of device control.

[Brief description of drawings]

FIG. 1 is a flowchart showing a processing procedure of an embodiment of the present invention.

FIG. 2 is a flowchart showing a processing procedure for reading an instruction content of an operation mode changeover switch 60A.

FIG. 3 is a block diagram showing a circuit configuration of a programmable controller.

[Explanation of symbols]

 10 CPU 20 System program memory 60 I / O 60A Operation mode selector switch

Claims (1)

[Claims] 1. An operation mode instructed by an operation mode changeover switch is read in synchronization with a scan process, and an operation mode currently set in a programmable controller is changed over based on the read instruction mode. Programmable controller operation mode setting method.