JPH05235016A - Heterojunction semiconductor device and manufacture thereof - Google Patents

Abstract

(57) [Summary] [Object] To provide a heterojunction semiconductor device capable of obtaining a thin base 4 necessary for a high-speed bipolar transistor and a manufacturing method thereof. A 3C-SiC collector 12 and an emitter seed (seed) 13 are formed using the first opening 28a on the surface of the silicon substrate 2 as a seed. The opening 29 is formed by etching, and the silicon nitride film 14 is formed from the opening 29. The silicon nitride film 14 on the emitter seed 13 is removed,
An emitter seed 13 is grown to form a 3C-SiC emitter 3. The emitter 3 is covered with a silicon oxide layer and etching is performed to form a third opening 30. The silicon nitride film 14 is completely removed by hot phosphoric acid to expose the second opening 29. The second opening 29 is used as a seed to grow the P-type Si base 4. [Effect] Once a dummy film for forming the base 4 is formed,
The emitter 3 is formed of SiC on the dummy film, the dummy film is removed, and the base 4 is formed of Si in the removed portion, so that the base 4 is formed as a post process by a high temperature process.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to manufacturing a heterojunction semiconductor device, and more particularly to preventing diffusion of a base layer.

[0002]

2. Description of the Related Art In recent years, a semiconductor device utilizing a heterojunction has been receiving attention. This uses a material with a larger forbidden band width (energy band) than the base for the emitter. An energy band structure diagram of the heterojunction bipolar transistor is shown in FIG. In the figure, Ec, Ev,
Ef indicates the lower end of the conduction band, the upper end of the valence band, and the Fermi level, respectively. The black circles represent electrons and the white circles represent holes. As is clear from the figure, since the forbidden band width of the emitter region is larger than that of the base, it is difficult to inject holes into the emitter. As a result, the base current is lowered and the emitter injection efficiency is improved. As a result, a high-speed, high-gain transistor can be obtained.

A conventional method of manufacturing the heterojunction bipolar transistor 1 will be described with reference to FIG. First, a photoresist 6a is applied to the surface of the N type silicon substrate 2 and patterned to form an opening 8a. P on the entire surface of the opening 8a and the photoresist 6a.
Boron ions, which are impurities in the mold, are implanted. This allows
A P-type base 4 is formed (A in the figure).

Next, after removing the photoresist 6a, N-type SiC (silicon carbide) 66 is epitaxially grown on the entire surface (FIG. 9B). Photoresist 6b is applied and patterned, and SiC (silicon carbide) 66 is etched. As a result, N is formed on the surface of the P-type base 4.
An emitter 3 of type SiC is formed (FIG. 7C). In this way, by forming the emitter 3 with SiC, a heterojunction can be formed between the base 4 and the emitter 3.

Again, a photoresist 6c is applied to the surfaces of the silicon substrate 2 and the emitter 3 and patterned to form an opening 8c. Boron ions are implanted into the opening 8c and the entire surface of the photoresist 6c. As a result, a P ⁺ type external base 5 having a higher concentration than the base 4 is formed (D in the same figure).

After removing the photoresist 6c, a silicon oxide film 14 is formed by low pressure chemical vapor deposition (LPCVD) (FIG. 8E). After that, a photoresist is applied and patterned, and the silicon oxide film 14 is etched. Then, a contact hole 8d is formed to form electrodes for the emitter 3 and the base 4 (FIG. F). In the formed contact hole 8d, polysilicon 10a, 10c for forming electrodes is formed. The base electrodes 13a and 13c and the emitter electrode 13b are formed of aluminum. The collector electrode 12 is formed of platinum on the back surface of the silicon substrate 2, and the heterojunction bipolar transistor 1 is completed (FIG. 7G).

[0007]

However, the method of manufacturing the heterojunction bipolar transistor 1 as described above has the following problems. When the emitter 3 is formed, the base layer is largely diffused by the high temperature process, and the thin base 4 necessary for the high speed bipolar transistor is formed.
Couldn't get

The present invention solves the problems described above, and a thin base 4 required for a high speed bipolar transistor.
It is an object of the present invention to provide a heterojunction semiconductor device capable of obtaining the above and a manufacturing method thereof.

[0009]

According to a first aspect of the present invention, there is provided a method of manufacturing a heterojunction semiconductor device, wherein the first conductivity type has a forbidden band width wider than or equal to the material of the semiconductor substrate from the surface of the semiconductor substrate. A first step of growing a single crystal region,
A second step of forming a dummy film on the first region; a third of a first conductivity type having a wider band gap than the material of the semiconductor substrate and made of a single crystal on the dummy film. A third step of forming a region, a fourth step of removing the dummy film, and a part of the semiconductor substrate having the same band gap as that of the semiconductor substrate and made of a single crystal in the part where the dummy film is removed. A fifth step of forming a second region of the two conductivity type is provided.

According to a second aspect of the present invention, there is provided a method of manufacturing a heterojunction semiconductor device, which comprises forming an insulating film on a semiconductor substrate and removing a part of the insulating film by etching to form a first substrate surface exposed portion. The first region of the first conductivity type having a band gap wider than or equal to the material of the semiconductor substrate, and the third region seed portion having a band gap wider than or equal to the material of the semiconductor substrate. The second step of forming a substrate surface exposed portion on the substrate surface by single crystal growth of the first substrate surface exposed portion, while forming a second substrate surface exposed portion on the substrate surface, from the second substrate surface exposed portion, A third step of forming a dummy film covering the third region seed portion and the first region, a fourth step of removing a part of the dummy film to expose the third region seed portion, the third region seed Single crystal growth And a fifth step of forming a third region of the first conductivity type having a band gap wider than that of the material of the semiconductor substrate to cover a part of the dummy film, and a means for preventing the dummy film from affecting the insulating film. Completely removing the second substrate surface exposed portion by a sixth step, the second substrate surface exposed portion exposed in the sixth step is subjected to single crystal growth, the semiconductor substrate material and the forbidden band. It is characterized by comprising a seventh step of forming a second region of the second conductivity type having the same width in the portion where the dummy film is removed.

In the method of manufacturing a heterojunction semiconductor device according to a third aspect of the present invention, the first and third regions of the first conductivity type are made of SiC, and the second region of the second conductivity type is Si. It is characterized by being formed by.

A heterojunction semiconductor device according to a fourth aspect of the present invention is a semiconductor substrate, a first region of a first conductivity type having a single crystal grown from a surface of the semiconductor substrate and having a band gap wider than that of the material of the semiconductor substrate, and a material of the semiconductor substrate. The second band of the second conductivity type having the same forbidden band width and growing a single crystal from the surface of the semiconductor substrate and covering a part of the first region is wider than the material of the semiconductor substrate. The present invention is characterized in that a third region of the first conductivity type is provided while growing a single crystal and covering a part of the second region.

[0013]

According to another aspect of the present invention, there is provided a heterojunction semiconductor device or a method for manufacturing the same, wherein the forbidden band width is wider than or equal to the material of the semiconductor substrate from the surface of the semiconductor substrate. Growing a single crystal of a first region of a certain first conductivity type and forming a dummy film on the first region;
A third region of the first conductivity type having a forbidden band width wider than that of the material of the semiconductor substrate and composed of a single crystal is formed on the dummy film, and the dummy film is removed. The second region of the second conductivity type having the same forbidden band width and made of a single crystal is formed in a portion where the dummy film is removed.

As described above, since the second region can be formed after the third region is formed, for example, 3C is formed in the third region.
Even if it is formed at a high temperature using -SiC, the second
It is possible to prevent the region from being exposed to the high temperature at the time of forming the third region.

When the first region is formed so that the band gap is wider than the material of the semiconductor substrate, not only between the second region and the third region but also between the first region and the second region. It can be a heterojunction.

[0016]

An embodiment of the present invention will be described with reference to the drawings. First, a silicon oxide film 6, which is an insulating film, is grown to a thickness of approximately 7,000 angstroms on the surface of an N-type silicon substrate 2 (not shown). In this embodiment, low pressure chemical vapor deposition (LPCVD) is used and the substrate temperature is 800 ° C. with SiH ₄ and N ₂ O.
It was formed by thermal decomposition with. Pattern the photoresist using a mask (not shown). Anisotropic etching is performed using hydrofluoric acid to form first openings 28a and 28b, which are exposed portions of the first substrate surface, while leaving the dummy film opening insulating portion 16 as shown in FIG. 1A.

Next, as shown in FIG. 3B, the first opening
The collector 12 which is the first region of the first conductivity type is formed on the surface of the silicon substrate 2 using 28a as a seed. An emitter seed (seed) 13, which is a third region seed portion having the same characteristics, is also formed in the second opening 28b. In this embodiment,
Si ₂ H ₆ , C ₂ H ₂ , and HCl using chemical vapor deposition (CVD)
Further with H ₂ was supplied as a carrier gas, the substrate temperature 1350 ° C.
Then, the N-type cubic 3C-SiC collector 12 and the emitter seed 13 are formed.

As described above, when the collector 12 and the emitter seed 13 are both made of the same SiC, both can be formed at once. Thereby, the manufacturing process can be simplified.

Next, the photoresist is patterned using a mask, and etching is performed using hydrofluoric acid.
As shown in FIG. 6C, the dummy film opening insulating portion 16 is removed. Thereby, the second opening which is the exposed portion of the second substrate surface
Forming 29.

Next, a silicon nitride layer is formed on the entire surface to a thickness of about 5000 Å (not shown). In the present embodiment, it is formed by using chemical vapor deposition (CVD), supplying SiH ₄ and NH ₃ , and growing at a substrate temperature of 350 ° C.

After that, the silicon oxide film 6 is flattened by a spin-on-glass method (SOG) until it is exposed, and then etched back to form a silicon nitride film as a dummy film.
14 is formed (Fig. D).

Next, the silicon nitride film 14 on the emitter seed 13 is removed by etching. In this example, the photoresist was patterned using a mask, and etching was performed using CF ₄ using the chemical dry etching method (CDE). Then, until the step of covering a part of the silicon nitride film 14, the seed 13 for the emitter is grown as a seed to form the emitter 3 which is the third region of the first conductivity type (E in the figure). In this example, chemical vapor deposition (CVD) is used to supply Si ₂ H ₆ , C ₂ H ₂ , and HCl, and H ₂ as a carrier gas to grow at a substrate temperature of 1350 ° C. A cubic 3C-SiC emitter 3 was formed.

Next, a silicon oxide layer is formed on the entire surface to a thickness of about 4000 angstroms. In this example, the film was formed by using chemical vapor deposition (CVD), supplying SiH ₄ and N ₂ O, and growing at a substrate temperature of 450 ° C. Then, the photoresist is patterned using a mask, and etching is performed using hydrofluoric acid to form a third opening 30 as shown in FIG.

Next, the silicon nitride film is formed by hot phosphoric acid.
Remove 14 completely. As a result, the second opening 29, which is the exposed portion of the surface of the second substrate, is exposed again (G in the figure). The hot phosphoric acid does not affect the silicon oxide film 6. After that, the second opening 29 is grown as a seed to form the base 4 which is the second region of the second conductivity type (FIG. 11H). In this example, chemical vapor deposition (CVD) was used to supply SiH ₄ for epitaxial growth at a substrate temperature of 1000 ° C. and to dope B ₂ H ₆ . This allows
A P-type Si (silicon) base 4 was formed.

Next, a silicon oxide layer is formed on the entire surface (FIG. 1I). In this example, chemical vapor deposition (CV
D) was used, SiH ₄ and N ₂ O were supplied, and the substrate was grown at 450 ° C. to grow.

Next, contact holes are formed to form electrodes for the emitter 3 and the base 4, and a base electrode 13a and an emitter electrode 13b are formed of aluminum. The collector electrode 22 is formed of platinum on the back surface of the silicon substrate 2 to complete the heterojunction bipolar transistor 21 (J in the same figure).

Thus, in this embodiment, the collector
12 is formed of SiC, a dummy film for forming the base 4 is once formed, the emitter 3 is formed of SiC on the dummy film, the dummy film is removed, and the removed portion is formed of Si with the base 4
Is formed. As a result, the base 4 can be prevented from diffusing due to the high temperature process, and a thin base layer required for a high speed bipolar transistor can be obtained. Further, not only between the base 4 and the emitter 3 but also between the base 4 and the collector 12 can be a heterojunction (double heterojunction) easily. By thus obtaining the double heterojunction, even when the base collector junction is biased in the forward direction by performing the saturated operation, it becomes difficult to accumulate holes in the collector in the saturated state, and the operation speed decreases. Can be prevented.

Further, conventionally, single crystal SiC was formed,
It was thought that it was impossible to form single crystal Si from the upper surface of the single crystal SiC by epicapital growth due to the difference in lattice constant. Therefore, it has been considered that single crystal Si cannot be formed on single crystal SiC. However, it becomes easy to form single crystal Si on single crystal SiC by the manufacturing method according to the present invention.

As described above, since the collector 12, the base 4, and the emitter 3 can be formed of a single crystal, a highly reliable region can be obtained and the transistor characteristics can be improved.

Since the collector 12 and the emitter 3 are made of the same SiC, the collector 12 and the emitter 3 can be used in reverse, and the I ² L circuit and the like can be easily formed.

In this embodiment, the collector 12 is made of SiC, but the collector 12 may be made of Si. In this case, the manufacturing method is, for example, as follows. As shown in FIG. 2A, after forming the silicon oxide film 6 on the surface of the silicon substrate 2, etching is performed to open only the first opening 28b. Next, as shown in FIG. 3B, a seed (seed) 13 for the N-type cubic 3C-SiC emitter of the first conductivity type is formed using the first opening 28b as a seed.
To form. As a condition, the collector 12 is 3C-SiC.
It is similar to the case of forming in.

Then, the photoresist is patterned using a mask, and etching is performed using hydrofluoric acid.
As shown in FIG. 6C, the first opening 28a is formed while leaving the dummy film opening insulating portion 16. The collector 12 is formed on the surface of the silicon substrate 2 using the first opening 28a as a seed. As conditions, SiH ₂ Cl ₂ and H ₂ and PH ₃ as a dopant may be supplied, and epitaxial growth may be performed at 1100 ° C.

At this time, since polysilicon grows in a portion other than the portion on the first opening 28a, the photoresist is patterned on the upper portion of the collector 12 by using a mask and the collector 12 is formed.
The portion other than the upper portion may be removed by etching by a chemical dry etching method or the like.

After that, the photoresist is patterned using a mask and etching is performed to remove the dummy film opening insulating portion 16 as shown in FIG. As a result, the second opening 29, which is the exposed portion of the second substrate surface, is formed. After that, it is manufactured in the same manner as the steps of FIG. 1D and subsequent steps.

Further, in this embodiment, the first opening 28
As shown in FIG. 1A, a and 28b are formed apart from each other with the dummy film opening insulating portion 16 interposed therebetween, but are formed with the first opening portions 28a and 28b stuck together without the dummy film opening insulating portion 16 interposed therebetween. May be.

Although the silicon nitride film 14 is used as the dummy film in this embodiment, amorphous silicon may be used as the dummy film. In this case, chemical vapor deposition (CVD) may be used as conditions, and SiH ₄ may be supplied and the substrate may be grown at a temperature of 400 ° C. Then, to remove the amorphous silicon that is the dummy film, etching with HCl gas may be performed.

Since 3C-SiC is a non-doped film and is N-type, in the present embodiment, an npn transistor has been described, but it may be used for a pnp transistor. In this case, doping using TMA (trimethylaluminum) may be performed.

The present invention can also be applied to an IC. In this case, as shown in FIG. 3A, the collector 12 may be formed large, a part of the silicon oxide film 6 may be opened, and the collector electrode 22 may be provided on the upper surface of the silicon oxide film 6.

Further, as shown in FIG. 3B, as in the case of a normal bipolar IC, a buried layer is formed in the silicon substrate 2.
33 may be formed, a part of the silicon oxide film 6 may be opened, and the collector electrode 22 may be provided on the upper surface of the silicon oxide film 6.

In this embodiment, the emitter 3 is made of SiC, but any material may be used as long as the emitter 3 and the base 4 can be heterojunctioned.

Although 3C-SiC is used as SiC in this embodiment, other SiC may be used, such as 4H-SiC, 6H-SiC, and 15R-SiC.

[0042]

In the heterojunction semiconductor device or the method for manufacturing the same according to claim 1, claim 2, claim 3, or claim 4, the forbidden band width is wider than the material of the semiconductor substrate from the surface of the semiconductor substrate, or A first region of the same first conductivity type is single-crystal grown, a dummy film is formed on the first region, and the forbidden band width is wider than that of the material of the semiconductor substrate. A third region of one conductivity type is formed on the dummy film, the dummy film is removed, and the forbidden band width is the same as the material of the semiconductor substrate. The second region is formed in a portion where the dummy film is removed.

As described above, since the second region can be formed after the third region is formed, for example, 3C is formed in the third region.
Even if it is formed at a high temperature using -SiC, the second
It is possible to prevent the region from being exposed to the high temperature at the time of forming the third region.

As a result, the second region can be prevented from diffusing due to the high temperature process, and the thin base layer necessary for the high speed bipolar transistor can be obtained.

When the first region is formed so that the band gap is wider than the material of the semiconductor substrate, not only between the second region and the third region but also between the first region and the second region. It can be a heterojunction. Also, the first region and the third
Since the regions are made of the same SiC, the third region seed portion and the first region can be formed at once. Thereby, the process can be further simplified.

When the first region is formed so as to have a wider band gap than the material of the semiconductor substrate, the first region and the third region are formed of the material having the same band gap. The 1st and 3rd areas can be used in reverse,
The I ² L circuit and the like can be easily formed.

[Brief description of drawings]

FIG. 1 is a diagram showing a manufacturing process of a heterojunction bipolar transistor 21.

FIG. 2 is a diagram showing part of a process of manufacturing a heterojunction bipolar transistor in which the collector 12 is made of Si.

FIG. 3 is a diagram showing a structure when the present invention is used as an IC.

FIG. 4 is an energy band structure diagram of a heterojunction bipolar transistor 1.

FIG. 5 is a diagram showing a manufacturing process of a conventional heterojunction bipolar transistor 1.

[Explanation of symbols]

 2 ... Silicon substrate 3 ... Emitter 4 ... Base 12 ... Collector 13 ... Third region seed portion 14 ... Silicon nitride film

Claims (4)

[Claims] 1. A first-conductivity-type first semiconductor device having a band gap wider than or equal to that of the material of the semiconductor substrate from the surface of the semiconductor substrate.
A first step of growing a region into a single crystal; a second step of forming a dummy film on the first region; and a single crystal having a forbidden band width wider than the material of the semiconductor substrate on the dummy film. A third step of forming a third region of the first conductivity type configured by, a fourth step of removing the dummy film, and a material and a forbidden band width of the semiconductor substrate in a portion where the dummy film is removed. A fifth step of forming the second region of the second conductivity type which is the same and which is composed of a single crystal, and a manufacturing method of the heterojunction semiconductor device. 2. A first step of forming an insulating film on a semiconductor substrate and removing a part of the insulating film by etching to form an exposed portion of a first substrate surface, a forbidden band width depending on a material of the semiconductor substrate. A first region of the first conductivity type having a large or the same width, and a third region seed portion having a band gap wider than or the same as the material of the semiconductor substrate, and growing the exposed portion of the first substrate as a single crystal. A second step of forming on the substrate surface by forming a second substrate surface exposed portion on the substrate surface, and covering the third area seed portion and the first area from the second substrate surface exposed portion. A third step of forming a dummy film; a fourth step of removing a part of the dummy film to expose the third region seed portion; and a single crystal growth of the third region seed portion to form a semiconductor substrate of a semiconductor substrate. Wider forbidden band than material A fifth step of forming a third region of one conductivity type and covering a part of the dummy film, the dummy film is completely removed by a means that does not affect the insulating film, and the exposed portion of the second substrate surface is exposed. 6th
The second conductive type second region having the same forbidden band width as that of the material of the semiconductor substrate is formed by single crystal growth of the exposed portion of the second substrate surface exposed in the sixth step. And a seventh step of forming in a portion from which the heterojunction semiconductor device is removed. 3. The method of manufacturing a heterojunction semiconductor device according to claim 2, wherein the first conductivity type first region and the third region are made of SiC, and the second conductivity type second region is made of Si. A method for manufacturing a heterojunction semiconductor device, comprising: 4. A semiconductor substrate, a first region of a first conductivity type, which has a single crystal grown from a semiconductor substrate surface and has a forbidden band width wider than a material of the semiconductor substrate, and a semiconductor device having a band gap same as that of the semiconductor substrate material. The second region of the second conductivity type that grows from the surface of the substrate and covers a part of the first region. The band gap is wider than the material of the semiconductor substrate. A third region of the first conductivity type that covers a part of the heterojunction semiconductor device.