JPH05243733A - Manufacture of multilayer printed wiring board - Google Patents
Manufacture of multilayer printed wiring boardInfo
- Publication number
- JPH05243733A JPH05243733A JP4270792A JP4270792A JPH05243733A JP H05243733 A JPH05243733 A JP H05243733A JP 4270792 A JP4270792 A JP 4270792A JP 4270792 A JP4270792 A JP 4270792A JP H05243733 A JPH05243733 A JP H05243733A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- hole
- resist layer
- insulating resin
- wiring circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 239000010410 layer Substances 0.000 claims abstract description 97
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 26
- 239000011347 resin Substances 0.000 claims abstract description 22
- 229920005989 resin Polymers 0.000 claims abstract description 22
- 229910052802 copper Inorganic materials 0.000 claims abstract description 19
- 239000010949 copper Substances 0.000 claims abstract description 19
- 239000002344 surface layer Substances 0.000 claims abstract description 5
- 238000007747 plating Methods 0.000 claims description 33
- 239000004020 conductor Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 3
- 239000011248 coating agent Substances 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 24
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 238000007772 electroless plating Methods 0.000 abstract description 3
- 238000007761 roller coating Methods 0.000 abstract description 3
- 239000000758 substrate Substances 0.000 abstract description 2
- 239000011889 copper foil Substances 0.000 description 7
- 239000004840 adhesive resin Substances 0.000 description 4
- 229920006223 adhesive resin Polymers 0.000 description 4
- 238000005498 polishing Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 238000000465 moulding Methods 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000003082 abrasive agent Substances 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は多層印刷配線板の製造方
法に関し、特に表面銅箔部と内層印刷配線回路を半貫通
スルーホールにより接続する多層印刷配線板の製造方法
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board, and more particularly to a method for manufacturing a multilayer printed wiring board in which a surface copper foil portion and an inner layer printed wiring circuit are connected by semi-through holes.
【0002】[0002]
【従来の技術】一般に、スルーホールを有する内層用印
刷配線板の製造には、図5(a)〜図6(c)に示す様
な方法が多く用いられている。この方法では、まず、図
5(a)のごとく、公知の方法で得られたスルーホール
を有する内層用印刷配線板11をガラスクロスに熱硬化
性接着樹脂を含浸させた接着樹脂板(以下、プリプレグ
と記す)13との接着強度を向上させるために配線回路
表面を酸化により粗化を行い、プリプレグ13を組合せ
加熱加圧成形する。2. Description of the Related Art Generally, a method shown in FIGS. 5A to 6C is often used for manufacturing an inner layer printed wiring board having through holes. In this method, first, as shown in FIG. 5A, an inner layer printed wiring board 11 having through holes obtained by a known method is used as an adhesive resin plate obtained by impregnating glass cloth with a thermosetting adhesive resin (hereinafter, referred to as In order to improve the adhesion strength with the prepreg 13), the surface of the wiring circuit is roughened by oxidation, and the prepreg 13 is combined and heat-pressed.
【0003】次に、図5(b)のごとく、スルーホール
から表面銅箔部12に溶出した接着樹脂14を研磨材1
5により研磨整面する。Next, as shown in FIG. 5 (b), the adhesive resin 14 eluted from the through hole to the surface copper foil portion 12 is applied to the abrasive 1
The surface is polished and polished by 5.
【0004】次に、図6(a)のごとく、全層貫通孔1
6aを穿孔する。Next, as shown in FIG. 6A, all-layer through-holes 1
Drill 6a.
【0005】次に、図6(b)のごとく、全層貫通孔1
6a内及び、表層銅箔部12表面に銅めっき層17を形
成し、全層貫通スルーホールを形成する。Next, as shown in FIG. 6 (b), all-layer through-holes 1
A copper plating layer 17 is formed in 6a and on the surface of the surface copper foil portion 12 to form a through-hole for all layers.
【0006】次に、図6(c)のごとく、公知の方法で
表面に配線回路を形成する製造方法であった。Next, as shown in FIG. 6 (c), there is a manufacturing method in which a wiring circuit is formed on the surface by a known method.
【0007】[0007]
【発明が解決しようとする課題】しかし、近年微細径ス
ルーホールを用いた配線回路が急速に増加しているが、
従来の製造方法では、内層用印刷配線板間の接続はスル
ーホールを有する内層用印刷配線板を用いて多層成形に
より製造していたため、板厚の薄い内層板に対する穴あ
けドリルの微細化により、穴あけ精度の低下やドリルコ
ストの増大,めっき工程での取扱性の低下や微細スルー
ホールによる表層配線回路の配線面積が低下するといっ
た問題点の他に、下記のような問題点があった。However, in recent years, the number of wiring circuits using fine through holes has increased rapidly.
In the conventional manufacturing method, the connections between the printed wiring boards for inner layers were made by multi-layer molding using the printed wiring boards for inner layers having through holes, so by making the drilling holes for thin inner layer boards smaller, In addition to problems such as a decrease in accuracy, an increase in drill cost, a decrease in handleability in the plating process, and a decrease in the wiring area of the surface wiring circuit due to the fine through holes, there are the following problems.
【0008】1.内層用印刷配線板の接続を全層貫通ス
ルーホールのみで行うため、高密度配線回路ができな
い。1. Since the printed wiring board for the inner layer is connected only through the through holes of all layers, a high-density wiring circuit cannot be formed.
【0009】2.高密度多層印刷配線板にするために
は、スルーホールを有する内層用印刷配線板を複数要す
るため、内層用印刷配線板の製造に多大な工数を要す
る。2. In order to make a high-density multilayer printed wiring board, a plurality of inner layer printed wiring boards having through holes are required, and thus a large number of man-hours are required to manufacture the inner layer printed wiring board.
【0010】3.スルーホールを有する内層用印刷配線
板は、板厚が薄いため穴あけ,めっき,回路形成等の工
程中での取り扱い不良が発生し易いため製造歩留が悪
い。3. The inner layer printed wiring board having a through hole has a thin plate thickness, so that a handling error is likely to occur during a process such as drilling, plating, circuit formation, etc., resulting in a poor manufacturing yield.
【0011】4.加熱加圧成形した後表層銅箔と次層の
内層配線回路を接続するスルーホールから成形用樹脂が
溶出するため、表層銅箔上の表面研磨が必要となり、外
層回路形成時に研磨傷等による影響を受け製造歩留が悪
い。4. After molding under heat and pressure, the molding resin elutes from the through holes that connect the surface copper foil and the inner layer wiring circuit of the next layer, so surface polishing on the surface copper foil is necessary, and the effects of polishing scratches etc. when forming the outer layer circuit Manufacturing yield is poor.
【0012】本発明の目的は、高密度配線回路の形成が
可能で、製造歩留が高く、工数が節減できる多層印刷配
線板の製造方法を提供することにある。An object of the present invention is to provide a method for manufacturing a multilayer printed wiring board, which enables formation of high-density wiring circuits, has a high manufacturing yield, and saves man-hours.
【0013】[0013]
【課題を解決するための手段】本発明の多層印刷配線板
の製造方法は、表層配線回路とスルーホールを有する銅
張積層基板の表層面に感光性絶縁樹脂層を熱圧着と塗布
とのうちのいずれか一方の方法により形成する工程と、
所定の該感光性絶縁樹脂層を露光し不要の該感光性絶縁
樹脂層を現像して除去する工程と、前記銅張積層板の表
層面にめっきレジスト層を形成する工程と、所定の該め
っきレジスト層を露光し不要の該めっきレジスト層を現
像して除去する工程と、該めっきレジスト層除去部に無
電解銅めっきと導電性ペースト塗布とのうちのいずれか
一方の方法により導体層を形成して配線回路を形成し前
記めっきレジスト層を除去する工程と、露出した前記感
光性絶縁樹脂層上に前記配線回路を埋設する二層目の感
光性絶縁樹脂を形成する工程と、該二層目の感光性絶縁
樹脂層表面から前記配線回路と前記表層配線回路を連結
する半貫通孔を穿孔する工程と、最外層にめっきレジス
ト層を形成して露光し前記半貫通孔を含む不要の該めっ
きレジスト層を現像して除去する工程と、該めっきレジ
スト層除去部に導体層を形成し半貫通スルーホールと最
外層回路を形成して残存する前記めっきレジスト層を除
去する工程とを含む。A method for manufacturing a multilayer printed wiring board according to the present invention comprises a thermo-compression bonding and a coating of a photosensitive insulating resin layer on the surface of a copper clad laminate having a surface wiring circuit and through holes. A step of forming by one of the methods,
Exposing a predetermined photosensitive insulating resin layer to develop and removing the unnecessary photosensitive insulating resin layer; forming a plating resist layer on the surface layer surface of the copper clad laminate; A conductor layer is formed by exposing the resist layer to light and developing the unnecessary plating resist layer to remove it, and at the plating resist layer removing portion by any one of electroless copper plating and conductive paste application. To form a wiring circuit and remove the plating resist layer, and to form a second layer of photosensitive insulating resin for embedding the wiring circuit on the exposed photosensitive insulating resin layer; A step of boring a semi-through hole connecting the wiring circuit and the surface wiring circuit from the surface of the photosensitive insulating resin layer of the eye, and forming a plating resist layer on the outermost layer and exposing the unnecessary semi-through hole Present plating resist layer Including and removing it, and removing the plating resist layer and the conductor layer is formed on the plating resist layer removal portion remaining to form a semi-through holes and the outermost layer circuit.
【0014】[0014]
【実施例】以下に、本発明の実施例について図面を参照
して説明する。Embodiments of the present invention will be described below with reference to the drawings.
【0015】図1(a)〜図3(d)は本発明の一実施
例を説明する工程順に示した断面図である。1 (a) to 3 (d) are cross-sectional views showing a process sequence for explaining an embodiment of the present invention.
【0016】まず、図1(a)のごとく、材料である銅
張積層基板を形成する。First, as shown in FIG. 1A, a copper clad laminated substrate, which is a material, is formed.
【0017】次に、図1(b)のごとく、公知の方法で
貫通孔2aを穿孔する。Next, as shown in FIG. 1B, the through hole 2a is formed by a known method.
【0018】次に、図1(c)のごとく、公知の方法で
銅めっき層3とスルーホール2を形成する。Next, as shown in FIG. 1C, a copper plating layer 3 and a through hole 2 are formed by a known method.
【0019】次に、図1(d)のごとく、公知の方法で
配線回路4を形成する。Next, as shown in FIG. 1D, the wiring circuit 4 is formed by a known method.
【0020】次に、図1(e)のごとく、銅張積層基板
1の表層面にローラコート法で感光性絶縁樹脂層5を全
面塗布する。Next, as shown in FIG. 1E, the photosensitive insulating resin layer 5 is applied to the entire surface of the copper clad laminate 1 by the roller coating method.
【0021】次に、図1(f)のごとく、公知の方法で
感光性絶縁樹脂層5を露光現像する。Next, as shown in FIG. 1F, the photosensitive insulating resin layer 5 is exposed and developed by a known method.
【0022】次に、図1(g)のごとく、銅張積層基板
1の表層面に所定のめっきレジスト層6を形成する。Next, as shown in FIG. 1G, a predetermined plating resist layer 6 is formed on the surface layer surface of the copper clad laminate 1.
【0023】次に、図2(a)のごとく、所定の配線回
路部分を露光現像する。Next, as shown in FIG. 2A, a predetermined wiring circuit portion is exposed and developed.
【0024】次に、図2(b)のごとく、無電解めっき
法にて所定の配線回路4を形成する。Next, as shown in FIG. 2B, a predetermined wiring circuit 4 is formed by electroless plating.
【0025】次に、図2(c)のごとく、不要のめっき
レジスト層6を除去する。Next, as shown in FIG. 2C, the unnecessary plating resist layer 6 is removed.
【0026】次に、図2(d)のごとく、図1(e)の
工程と同じ樹脂層5を形成する。Next, as shown in FIG. 2D, the same resin layer 5 as in the step of FIG. 1E is formed.
【0027】次に、図2(e)のごとく、所定の位置に
半貫通孔7aを穿孔する。Next, as shown in FIG. 2 (e), a semi-through hole 7a is formed at a predetermined position.
【0028】次に、図3(a)のごとく、めっきレジス
ト層6を形成する。Next, as shown in FIG. 3A, the plating resist layer 6 is formed.
【0029】次に、図3(b)のごとく、めっきレジス
ト層6を露光現像する。Next, as shown in FIG. 3B, the plating resist layer 6 is exposed and developed.
【0030】次に、図3(c)のごとく、無電解めっき
により半貫通スルーホール7と最外層回路8を形成す
る。Next, as shown in FIG. 3C, the semi-through through hole 7 and the outermost layer circuit 8 are formed by electroless plating.
【0031】次に、図3(d)のごとく、不要のめっき
レジスト層6を除去し、半貫通スルーホール7を含む最
外層回路8を有する多層印刷配線板を得る。Next, as shown in FIG. 3D, the unnecessary plating resist layer 6 is removed to obtain a multilayer printed wiring board having the outermost layer circuit 8 including the semi-through hole 7.
【0032】尚、材料として両面銅張積層基板のほかに
多層銅張積層基板も使用できる。更に、感光性絶縁樹脂
材料としては、エポキシ樹脂,フェノール樹脂,ポリイ
ミド樹脂等が使用できる。また、感光性絶縁樹脂層5の
膜厚は、0.1〜0.4mmが適当であり、塗布方法と
してもローラコート法の他に、スプレー塗布法,ディッ
プ法,カーテンコータ法も使用できる。さらに、無電解
銅めっき層3においては、めっき厚18〜70μmが適
当であり、無電解銅めっきの他に銅ペーストを印刷する
ことでも代用可能である。In addition to the double-sided copper-clad laminated board, a multilayer copper-clad laminated board can be used as the material. Further, as the photosensitive insulating resin material, epoxy resin, phenol resin, polyimide resin or the like can be used. Further, the film thickness of the photosensitive insulating resin layer 5 is suitably 0.1 to 0.4 mm, and as a coating method, a spray coating method, a dipping method, a curtain coater method can be used in addition to the roller coating method. Further, in the electroless copper plating layer 3, a plating thickness of 18 to 70 μm is suitable, and a copper paste may be printed instead of the electroless copper plating.
【0033】また、半貫通スールーホール7の径につい
ては、0.1〜0.5mmで適当であり、最外層回路8
から多層印刷配線板の配線回路4までを穿孔し、全層の
配線回路間を接続させることが必要である。The diameter of the semi-through hole 7 is preferably 0.1 to 0.5 mm, and the outermost layer circuit 8 is suitable.
It is necessary to punch holes from the wiring circuit 4 to the wiring circuit 4 of the multilayer printed wiring board to connect the wiring circuits of all layers.
【0034】図4は本発明の一実施例による多層印刷配
線板に部品を実装した断面図である。FIG. 4 is a cross-sectional view of components mounted on a multilayer printed wiring board according to an embodiment of the present invention.
【0035】この様に製造した多層印刷配線板は、図4
のごとく、現在汎用となっている表面実装部品9の多層
銅張積層板のスルーホール2を活用することにより半田
付け部品10をも搭載した部品として使用可能である。The multilayer printed wiring board manufactured in this way is shown in FIG.
As described above, by utilizing the through hole 2 of the multi-layered copper clad laminate of the surface mount component 9 which is now widely used, the soldering component 10 can also be used as a component.
【0036】[0036]
【発明の効果】以上から明らかなように本発明によれ
ば、以下のような効果があり、より信頼性の高い高密度
多層印刷配線板の製造が可能となる。As is apparent from the above, according to the present invention, the following effects can be obtained, and a highly reliable high-density multilayer printed wiring board can be manufactured.
【0037】1.内層用印刷配線板間の接続を半貫通ス
ルーホール及び貫通スルーホールで行うため、高密度配
線回路が形成可能となる。1. Since the connection between the printed wiring boards for inner layers is performed by the semi-through holes and the through holes, a high-density wiring circuit can be formed.
【0038】2. スルーホールを有する内層用印刷配
線板を必要としないため、多層印刷配線板の製造の省工
数化が図れる。2. Since the inner layer printed wiring board having the through holes is not required, the number of manufacturing steps of the multilayer printed wiring board can be reduced.
【0039】3.スルーホールを有する内層用印刷配線
板を必要としないため、内層穴あけめっき工程が不要と
なり、工程中での取扱,取付不良が低減し、高い製造歩
留が得られる。3. Since the printed wiring board for the inner layer having the through holes is not required, the inner layer perforation plating step is unnecessary, the handling and mounting defects in the step are reduced, and the high manufacturing yield can be obtained.
【0040】4.スルーホールを有する内層用印刷配線
板を必要としないため、外層銅箔上の表面研磨が不要と
なり研磨傷等が減少し、高い製品品質が得られる。4. Since the printed wiring board for the inner layer having the through holes is not required, the surface polishing on the outer layer copper foil is not necessary, the polishing scratches are reduced, and high product quality can be obtained.
【図1】本発明の一実施例を説明する工程順に示した断
面図である。1A to 1D are cross-sectional views showing a process sequence for explaining an embodiment of the present invention.
【図2】本発明の一実施例を説明する工程順に示した断
面図である。2A to 2D are cross-sectional views showing a process sequence for explaining an embodiment of the present invention.
【図3】本発明の一実施例を説明する工程順に示した断
面図である。3A to 3C are cross-sectional views showing a process sequence for explaining an embodiment of the present invention.
【図4】本発明の一実施例による多層印刷配線板に部品
を実装した断面図である。FIG. 4 is a cross-sectional view of components mounted on a multilayer printed wiring board according to an embodiment of the present invention.
【図5】従来の多層印刷配線板の製造方法の一例を説明
する工程順に示した断面図である。FIG. 5 is a cross-sectional view showing the order of steps for explaining an example of a conventional method for manufacturing a multilayer printed wiring board.
【図6】従来の多層印刷配線板の製造方法の一例を説明
する工程順に示した断面図である。FIG. 6 is a cross-sectional view showing the order of steps for explaining an example of a conventional method for manufacturing a multilayer printed wiring board.
1 銅張積層基板 2 スルーホール 2a 貫通孔 3,17 銅めっき層 4 配線回路 5 感光性絶縁樹脂層 6 めっきレジスト層 7 半貫通スルーホール 7a 半貫通孔 8 最外層回路 9 表面実装部品 10 半田付部品 11 内層用印刷配線板 12 表面銅箔部 13 プリプレグ 14 溶出した接着樹脂 15 研磨剤 16 全層貫通スルーホール 16a 全層貫通孔 1 Copper Clad Laminated Board 2 Through Hole 2a Through Hole 3,17 Copper Plating Layer 4 Wiring Circuit 5 Photosensitive Insulating Resin Layer 6 Plating Resist Layer 7 Half Through Through Hole 7a Half Through Hole 8 Outermost Layer Circuit 9 Surface Mount Component 10 Soldering Components 11 Printed wiring board for inner layer 12 Surface copper foil portion 13 Prepreg 14 Eluted adhesive resin 15 Abrasive agent 16 All-layer through-hole 16a All-layer through-hole
Claims (1)
張積層基板の表層面に感光性絶縁樹脂層を熱圧着と塗布
とのうちのいずれか一方の方法により形成する工程と、
所定の該感光性絶縁樹脂層を露光し不要の該感光性絶縁
樹脂層を現像して除去する工程と、前記銅張積層板の表
層面にめっきレジスト層を形成する工程と、所定の該め
っきレジスト層を露光し不要の該めっきレジスト層を現
像して除去する工程と、該めっきレジスト層除去部に無
電解銅めっきと導電性ペースト塗布とのうちのいずれか
一方の方法により導体層を形成して配線回路を形成し前
記めっきレジスト層を除去する工程と、露出した前記感
光性絶縁樹脂層上に前記配線回路を埋設する二層目の感
光性絶縁樹脂を形成する工程と、該二層目の感光性絶縁
樹脂層表面から前記配線回路と前記表層配線回路を連結
する半貫通孔を穿孔する工程と、最外層にめっきレジス
ト層を形成して露光し前記半貫通孔を含む不要の該めっ
きレジスト層を現像して除去する工程と、該めっきレジ
スト層除去部に導体層を形成し半貫通スルーホールと最
外層回路を形成して残存する前記めっきレジスト層を除
去する工程とを含むことを特徴とする多層印刷配線板の
製造方法。1. A step of forming a photosensitive insulating resin layer on the surface of a copper clad laminate having a surface wiring circuit and through holes by either one of thermocompression bonding and coating.
Exposing a predetermined photosensitive insulating resin layer to develop and removing the unnecessary photosensitive insulating resin layer; forming a plating resist layer on the surface layer surface of the copper clad laminate; A conductor layer is formed by exposing the resist layer to light and developing the unnecessary plating resist layer to remove it, and at the plating resist layer removing portion by any one of electroless copper plating and conductive paste application. To form a wiring circuit and remove the plating resist layer, and to form a second layer of photosensitive insulating resin for embedding the wiring circuit on the exposed photosensitive insulating resin layer; A step of boring a semi-through hole connecting the wiring circuit and the surface wiring circuit from the surface of the photosensitive insulating resin layer of the eye, and forming a plating resist layer on the outermost layer and exposing the unnecessary semi-through hole Present plating resist layer And a step of removing the remaining plating resist layer by forming a conductor layer in the plating resist layer removing portion to form a semi-through hole and an outermost layer circuit. Manufacturing method of printed wiring board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4270792A JPH05243733A (en) | 1992-02-28 | 1992-02-28 | Manufacture of multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4270792A JPH05243733A (en) | 1992-02-28 | 1992-02-28 | Manufacture of multilayer printed wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05243733A true JPH05243733A (en) | 1993-09-21 |
Family
ID=12643545
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4270792A Withdrawn JPH05243733A (en) | 1992-02-28 | 1992-02-28 | Manufacture of multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05243733A (en) |
-
1992
- 1992-02-28 JP JP4270792A patent/JPH05243733A/en not_active Withdrawn
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990518 |