JPH05266486A - Playback device - Google Patents

Abstract

(57) [Summary] [Object] An object of the present invention is to reduce quantization errors when reproducing a signal from a recording medium 1 and to stably reproduce information. According to the present invention, a signal corresponding to information on a recording medium 1 is detected by a photodetector 8, and a switching level of a change in signal level is determined by a multilevel level determining section 53 based on this detection signal. In accordance with the determination, a multilevel signal level is determined from the detection signal of the photodetector 8, one reference value among a plurality of reference values is output according to the determination result, and the output reference is output. The detection signals from the photodetector 8 are compared by a value, the signal is quantized according to the comparison result, and the detection signal of the photodetector 8 is converted into a binarized signal sequence according to the quantization result. It was done like this.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a reproducing apparatus such as an optical disk apparatus for reproducing information recorded on an optical disk.

[0002]

2. Description of the Related Art Conventionally, when reproducing information recorded on an optical disk as a recording medium, a reference level for quantizing a signal obtained from the optical disk or a magnitude of a gain of a reproduced signal obtained from the optical disk is It is fixed.

Therefore, when dust or scratches are present on the substrate surface of the optical disk, or when the recording film of the optical disk has uneven sensitivity and sufficient recording is not performed under the same recording conditions, a signal is reproduced from the optical disk. When the signal level decreases.

Therefore, since the reference level for quantizing and the gain of the reproduced signal are fixed, there is a problem that quantization error occurs during signal reproduction and an information reproduction error occurs. Therefore, the present invention can reduce quantization errors at the time of signal reproduction and can stably reproduce information.

[0005]

Conventionally, since the reference level for quantizing and the gain of the reproduced signal are fixed, quantization error occurs during signal reproduction, resulting in information reproduction error. There's a problem.

The present invention has been made in view of the above points, and it is an object of the present invention to provide a reproducing apparatus capable of reducing quantization errors when reproducing a signal from a recording medium and stably reproducing information. And

[0007]

The reproducing apparatus of the present invention comprises:
Detecting means for detecting a signal corresponding to the information on the recording medium, first judging means for judging a switching eye of a change in the signal level based on the detection signal from the detecting means, and matching with the judgment by the first judging means. Second determination means for determining a multi-valued signal level from the detection signal of the detection means, reference value generation means for generating a plurality of reference values, and the reference value according to the determination result by the second determination means. Output means for outputting one reference value generated from the generation means, processing means for comparing the detection signal from the detection means with the reference value from the output means, and quantizing the signal according to the comparison result, And a conversion means for converting the detection signal of the detection means into a binarized signal sequence according to the quantization result from the processing means.

[0008]

According to the present invention, in the above structure, the detecting means detects the signal corresponding to the information on the recording medium, and the first judging means judges the switching point of the change of the signal level by the detecting signal. Then, in accordance with this determination, the multi-valued signal level is determined by the second determination means from the detection signal of the detection means, and a plurality of reference values are generated by the reference value generation means,
One reference value generated from the reference value generating means is output from the output means in accordance with the determination result of the determining means, and the detection signal from the detecting means is compared with the reference value from the output means. The signal is quantized according to the comparison result, and the detection signal of the detecting means is converted into a binary signal sequence according to the quantization result.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a disk device. The recording medium 1 is rotated by a motor 2 at a constant speed, for example. This motor 2 has a motor control circuit 1
Controlled by 8.

The optical head 3 records and reproduces information on and from the recording medium 1. This optical head 3
Is the drive coil 1 that constitutes the movable part of the linear motor 31.
The drive coil 13 is connected to the linear motor control circuit 17.

Although the recording medium 1 uses a recording film for forming pits by punching,
A recording film using a phase change or a multilayer recording film may be used, or a magneto-optical disk or the like may be used as a recording medium. In the above case, the configurations of the optical head and the like are similarly changed.

A linear motor position detector 26 is connected to the linear motor control circuit 17, and the linear motor position detector 26 detects the position of the position by detecting the optical scale 25 provided on the optical head 3. It is designed to output a signal.

A permanent magnet (not shown) is provided on the fixed portion of the linear motor 31, and the drive coil 13 is provided.
Is excited by the linear motor control circuit 17, the optical head 3 is moved in the radial direction of the recording medium 1.

An objective lens 6 is held on the optical head 3 by a wire or a leaf spring (not shown). The objective lens 6 is moved by a drive coil 5 in the focusing direction (optical axis direction of the lens) and driven. The coil 4 allows movement in the tracking direction (direction orthogonal to the optical axis of the lens).

The laser light generated by the semiconductor laser oscillator 9 driven by the laser control circuit 14 is
The recording medium 1 is irradiated through the collimator lens 11a, the half prism 11b, and the objective lens 6, and the reflected light from this recording medium 1 is the objective lens 6 and the half prism 1.
The light is guided to the photodetector 8 via the lens 1b, the condenser lens 10a, and the cylindrical lens 10b. The photodetector 8
Is composed of four divided photodetection cells 8a, 8b, 8c and 8d.

The output signal of the photodetector cell 8a of the photodetector 8 is supplied to one end of the adders 30a and 30c through the amplifier 12a, and the output signal of the photodetector cell 8b is supplied to the amplifier 1.
2b is supplied to one end of the adders 30b and 30d,
The output signal of the photodetection cell 8c is supplied to the other ends of the adders 30b and 30c via the amplifier 12c, and the photodetection cell 8d
Of the output signal of the adder 30a, 3a through the amplifier 12d.
It is supplied to the other end of 0d.

The output signal of the adder 30a is supplied to the inverting input terminal of the differential amplifier OP1, and this differential amplifier OP1 is supplied.
The output signal of the adder 30b is supplied to the non-inverting input terminal of. As a result, the differential amplifier OP1 supplies the track difference signal to the tracking control circuit 16 according to the difference between the adders 30a and 30b. The tracking control circuit 16 creates a track drive signal according to the track difference signal supplied from OP1.

The track drive signal output from the tracking control circuit 16 is supplied to the drive coil 4 in the tracking direction. Further, the track difference signal used in the tracking control circuit 16 is supplied to the linear motor control circuit 17.

The output signal of the adder 30c is supplied to the inverting input terminal of the differential amplifier OP2, and the output signal of the adder 30d is supplied to the non-inverting input terminal of the differential amplifier OP2. As a result, the differential amplifier OP2 supplies a signal regarding the focus point to the focusing control circuit 15 according to the difference between the adders 30c and 30d. The output signal of the focusing control circuit 15 is supplied to the focusing drive coil 5 and is controlled so that the laser light is always in perfect focus on the recording medium 1.

Each photodetecting cell 8a of the photodetector 8 in the state where focusing and tracking are performed as described above,
The sum signals of the outputs of 8d, that is, the output signals from the adders 30a and 30b reflect the change in the reflectance from the pits (recording information) formed on the track. This signal is supplied to the signal processing circuit 19, and this signal processing circuit 1
At 9, recorded information and address information (track number, sector number, etc.) are reproduced.

A recording signal generating circuit 44 is provided in the preceding stage of the laser control circuit 14. The recording signal generation circuit 44 includes a modulation circuit 40 for converting (modulating) the recording signal by a 2-7 code conversion method, and a 2-
7 code is a multi-valued signal level and has a modulation circuit 41 for changing the interval of changeover of the signal level change. Further, the signal processing circuit 19 provides the reproduction signal with the signal level and the signal level. 2-7 depending on the changeover interval
It has a demodulation circuit 42 for converting into a code and a demodulation circuit 43 for inversely converting (demodulating) the 2-7 code from the demodulation circuit 42 to obtain a reproduction signal.

The reproduction signal (reproduction information) reproduced by the signal processing circuit 19 is output to the recording medium control device 46 as an external device through the interface circuit 45.

As described above, the signal processing circuit 19 and the recording signal generating circuit 44 include the modulation circuit 40 and the demodulation circuit 43 for the 1-7 code and the 2-7 code, but this is not always necessary. , Through interface circuit 70 2
The value signal sequence can be directly modulated or demodulated into a multilevel signal.

Further, in this disk device, a focusing control circuit 15, a tracking control circuit 16,
A D / A converter 22 used for exchanging information between the linear motor control circuit 17 and the CPU 23 is provided.

Further, the tracking control circuit 16 is
The objective lens 6 is moved in accordance with the track jump signal supplied from the CPU 23 via the D / A converter 22, and the beam light is moved by one track.

The above laser control circuit 14, focusing control circuit 15, tracking control circuit 16, linear motor control circuit 17, motor control circuit 18, signal processing circuit 1
9. The recording signal generating circuit 44 and the like are controlled by the CPU 23 via the bus line 20, and the CPU 23 is adapted to perform a predetermined operation by a program stored in the memory 24.

The demodulation circuit 42 of the present invention is a multi-valued signal (that is, an adder 3) from the recording medium 1 as shown in FIG.
2a of the reproduced signal obtained from the outputs from 0a and 30b)
It returns to the binarized signal sequence, and as shown in FIG. 3, the signal waveform converter 51 and the signal level switching timing detector 5
2, a multi-level level determination unit 53, and a signal synthesis unit 54. The signal waveform conversion section 51 corrects the signal waveform of the supplied reproduction signal so that signal detection and signal processing can be easily performed. It removes a noise component having a frequency higher than necessary or, conversely, amplifies only a frequency component including a signal component.

The signal level switching timing detection section 5
2 detects the switching timing of the signal level of the reproduction signal. The multilevel level determination unit 53 determines the multilevel level of the reproduction signal corrected by the signal waveform conversion unit 51 in accordance with the detection of the switching timing from the signal level switching timing detection unit 52. Is. The signal synthesizing unit 54 synthesizes the binarized signal sequence in accordance with the determination result of the multilevel level determining unit 53.

Further, the modulation circuit 41 for the demodulation circuit 42 has information that the binary signal sequence has in the signal level or the amount of change in the signal level and information in the interval between the changeovers of the signal level. And a signal is created in accordance with each information, and as shown in FIG. 4, it is composed of a modulated signal creation unit 61, a signal level switching timing creation unit 62, and a multilevel level value determination unit 63. There is.

The modulated signal creating section 61 divides the information contained in the binarized signal sequence into information to be given to the signal level or the signal level change amount and information to be given to the interval between the changeovers of the signal level change. is there. The signal level switching timing creation unit 62 creates the signal level switching timing based on the modulation signal from the modulation signal creation unit 61. The multilevel level value determination unit 63 determines a signal level designating voltage as a multilevel level value based on the modulation signal from the modulation signal generation unit 61 and the switching timing from the signal level switching timing generation unit 62. Is. The laser control circuit 14 is operated by the laser drive signal corresponding to the multi-valued level value from the multi-valued level value determining unit 63.

A modulation method for converting the binarized signal sequence into a multilevel signal by the modulation circuit 42 will be described with reference to FIG. The maximum possible recording density when a 2-7 code signal is recorded on the recording medium 1 is an interval of "2" (1.5T interval).
On the other hand, the wind margin is often relatively wide due to restrictions imposed by how closely the pit pitch interval can be physically recorded on the recording medium 1. Therefore, it is a feature of the embodiment shown in FIG. 2 that the minimum pit pitch relative to the reference period T is widened by utilizing multi-valued recording.
In the case of a 2-7 code signal before modulation into a multilevel signal, if the number of "0" s that follow is n (2≤n≤7), then n≤4; the amount of change in the quantized signal level.
1 level change amount Switching interval of signal level change n + 3 When n ≧ 5; Quantized signal level change amount
The signal is converted (modulated) into a multilevel signal so that the switching interval between the signal level changes of two levels is n.

That is, in the 2-7 code signal, where the interval of "0" is wide, the interval is left as it is, and when the interval of "0" is narrow, the interval of "0" is widened by using the multilevel signal. Further, the number of levels L at this time is set to three values (L = 3) in the embodiment shown in FIG.

For the 2-7 code signal as shown in FIG. 2A, the number of "0" s is checked as shown in FIG. 2B, and the quantized signal level changes according to the above rule. The switching interval between the amount and the signal level change is set ((c) in FIG. 2).
In the embodiment of FIG. 2, the amount of change in signal level is used for information.

Therefore, the signal level value after the change is shown in FIG.
It corresponds to the value of the first digit when expressed by the L-adic system (the ternary system in FIG. 2) when the cumulative value when the change amounts are sequentially added as shown in (d) of FIG. As a result, the reproduced signal (obtained by the outputs of the adders 30a and 30b) when the information is recorded on the recording medium 1 is as shown in (e) of FIG.

An example of the structure of the modulation circuit 41 for realizing the above-described modulation method will be described with reference to FIG. The modulated signal creating unit 61 includes a RAM 110, an addressing counter 111, shift registers 112 and 122, and a counter 1.
13, 114, inverters 115, 119 and 121, and gate circuits 116, 117, 118 and 120.

The signal level switching timing creation unit 6
2 includes a shift register 122, a gate circuit 123, and a flip-flop circuit 124. The multilevel level value determination unit 63 includes the adders 125, 2
It is composed of a ROM 126 for conversion from hex to ternary and a D / A converter 127.

The point of the modulation circuit 41 having such a configuration is that the multilevel level value determining unit 63 uses the adder 125 to convert the signal information into the signal level change amount, and the modulation signal creating unit 61 shifts the shift register 112. There are two points in which the timing of the signal is changed by stopping the reference clock when transferring the signal.

First, the data of the binary signal string (2-7 code) is stored in the RAM 110. The data is sequentially taken out using the shift registers 112 and 122. 2-7
“1” of the code signal sequence is Q of the shift register 122
When it comes to H, it is judged whether or not there is a "1" in the subsequent 5 bits, and if there is, it is "01" (the signal level change amount is 1 and the embodiment of FIG. Then, the signal level addition amount is set to “1” and is input to the adder 125 via the flip-flop circuit 124. Further, when there is no “1” in 5 bits, “10” (the signal level addition amount is 2 ) Is input to the adder 125.

In the adder 125, the state before addition is input to the terminals B1 and B2. The value after the addition is stored in the L-adic number (ternary in the case of FIG. 5) in the ROM corresponding to the level number L.
D / A converter 127 after conversion via 126
Is used to set the recording power.

When "1" in the signal sequence of 2-7 code comes to QH of the shift register 122, if there is no "1" in the subsequent 5 bits, the timing of the signal level switching eye is as it is. Used. On the other hand, when the next "1" comes in the subsequent 5 bits, the data transfer from the RAM 110 is stopped for 3 clocks to widen the interval until the next "1" comes.

The counter 114 normally has QA = QB = “0”.
Has stopped. Envelope terminal EN is "0"
Then, counting is started, and the counting is continued until the state of QA = QB = “0” again.

Next, a configuration example of the demodulation circuit 42 shown in FIG. 3 will be described with reference to FIG. The signal level switching timing detection section 52 is composed of a timing detection amplifier 130 and an absolute value circuit 131. The multilevel level determination unit 53 includes analog switches 132, 13
5, reference signal generator 133, level addition value detection circuit 13
4, a sample hold circuit 136, a mono multivibrator 137, and a shift register 138. The signal synthesizer 54 includes the quantizer 13
9, ROM 140, inverter 141, gate circuit 14
2, 143, 144, timing adjustment counter 14
5, shift register 146, and RAM 147.

The major points of the demodulation circuit 42 having such a configuration are that the amount of change in the reproduced signal after quantization is D, the number of levels is L, and the signal information value due to the signal level change (at the signal level change position during modulation). When the level added value) is Ad, the value of Ad is obtained by utilizing the relationship that the value of Ad = “L + D” is the value of the first digit when displayed in L-adic number. The shift of the shift register is temporarily stopped in accordance with the obtained Ad value to match the signal timing. There is a place to say.

First, the function of the signal level switching timing detector 52 will be described. Signal waveform converter 5
The signal passing 1 is input to the inverting terminal side 130a of the timing detection amplifier 130, and the signal whose response is slightly delayed is input to the non-inverting terminal 130b. The relationship between the two signal waveforms is as shown in FIG. This Figure 7
As can be seen from (a), the difference between the two values becomes large at the signal level switching point.

If this difference exceeds a certain range, the diode D1 or D2 attached to the timing detection amplifier 130 is short-circuited, and the timing detection amplifier 130 is in a short circuit state.
The gain of suddenly increases. As a result, the output of the timing detection amplifier 130 has a pulse-like shape.

Further, by passing the signal through the absolute value circuit 131, a waveform as shown in FIG. 7B can be obtained. Using this signal, the mono-multivibrator 137 creates a pulse corresponding to one clock of the reference clock. This pulse passes through the shift registers 138 and 146 to RAM1.
Recorded at 47.

Meanwhile, this pulse is transmitted to the shift register 1
When passing through QB of 38, the signal level switching amount is detected by the level addition value detection circuit 134 at the timing of FIG.
8C, the sample-hold circuit 136 performs sample-holding of the signal before switching for comparison at the next signal level switching at the timing of (c) in FIG. It should be noted that FIG. 8A shows the signal waveform immediately after passing through the signal waveform converter 51, and the size of the hatched arrow represents the level change amount due to the signal level switching.

As is apparent from FIG. 2, when the signal level amount increases, the increase amount directly represents the signal information value (level addition value at the signal level change position during modulation) Ad due to the signal level change. When the signal level amount is decreasing, "3-reduction amount" represents the signal information value Ad. If this relationship is generalized, there is a relationship of Ad = L + D (however, the value of the first digit of the L-adic number) with respect to the level number L and the reproduction signal change amount D. This calculation is performed by the level addition value detection circuit 134.
It's done analogically.

Further, the value of the number L of levels is used as the reference signal generator 1.
I am making 33. The output of the quantization circuit 139 is a binary number, which is stored in the ROM 140 as L (3 in FIG. 6).
Converted to the value in the first digit of the base number. When the output is "1", the timing adjustment counter 145 stops the shift of the shift register 146 by 3 clocks of the reference clock and restores the binary 2-7 code signal. A specific circuit configuration of the quantization circuit 139 shown in FIG. 6 will be described with reference to FIG.

That is, the quantizing circuit 139 has an upper end level detecting section 153 composed of a peak detecting circuit 151 and a low pass filter 152, a lower end level detecting section 156 composed of a bottom detecting circuit 154 and a low pass filter 155, and a resistor. The reference levels from the reference level setting circuit 157 and the reference level setting circuit 157 are obtained by dividing the value of the level width from the upper end level to the lower end level obtained by the division at a predetermined ratio to obtain the reference level for quantizing the multilevel signal. A large number of comparators (not shown) are arranged on the basis of the level value, the values of the signals from the sample and hold circuit 136 are compared, and a quantized signal is created by a combination of gate circuits (not shown) with respect to the comparison results. Signal comparison / quantization unit 158.

As a result, the sample hold circuit 136
For the binary signal from, the peak detection circuit 151 and the low-pass filter 152 detect the upper end level of the signal, and the bottom detection circuit 154 and the low-pass filter 155 detect the lower end level of the signal. Is output to the reference level setting circuit 157. The reference level setting circuit 157 creates a plurality of reference levels to be used for quantization of a multilevel signal by dividing the value of the level width from the upper end level to the lower end level by a predetermined ratio, and creates the plurality of created reference levels. The level is output to the signal comparison / quantization unit 158. The signal comparison / quantization unit 158 compares the level of the binary signal from the sample hold circuit 136 with each reference level from the signal comparison / quantization unit 158, and outputs a quantized signal according to the comparison result. ..

For example, two reference levels a and b (a>
b) is created, and the levels of the binary signals are compared by these reference levels a and b, and if the level of the binary signal is higher than the reference level a, it is determined to be the “0” level and the binary level is determined. When the signal level is between the reference levels a and b, it is determined to be the "1" level, and when the binary signal level is lower than the reference level b, it is determined to be the "2" level.

As described above, even if the reproduction signal level from the recording medium is locally reduced due to dust or scratches on the substrate surface of the recording medium or local reduction in recording film sensitivity, Since the reference level for quantizing the signal also changes along with the value, it is possible to quantize stably, and it is possible to secure a very high signal reading rate.

[0054]

As described in detail above, according to the present invention,
It is possible to provide a reproducing apparatus that can reduce quantization errors when reproducing a signal from a recording medium and can stably reproduce information.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration of a disk device according to an embodiment of the present invention.

FIG. 2 is a diagram for explaining a modulation method from a binarized signal sequence of the modulation circuit in FIG. 1 to a multilevel signal.

FIG. 3 is a block diagram showing a circuit configuration of a demodulation circuit shown in FIG.

FIG. 4 is a block diagram showing a circuit configuration of the modulation circuit of FIG.

5 is a circuit diagram showing a specific configuration example of the modulation circuit of FIG.

6 is a circuit diagram showing a specific configuration example of the demodulation circuit in FIG.

7 is a diagram for explaining a detection principle of a signal level switching timing detection unit of the demodulation circuit of FIG.

FIG. 8 is a diagram for explaining the detection principle of a multilevel level determination unit of the demodulation circuit of FIG.

9 is a block diagram showing a circuit configuration of the quantization circuit of FIG.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Recording medium, 9 ... Semiconductor laser oscillator, 19 ... Signal processing circuit, 40, 41 ... Modulation circuit, 42, 43 ... Demodulation circuit, 44 ... Recording signal creation circuit, 51 ... Signal waveform conversion part,
52 ... Signal level switching timing detection unit, 53 ... Multi-level level determination unit, 54 ... Signal synthesis unit, 61 ... Modulation signal creation unit, 62 ... Timing creation unit, 63 ... Multi-level level value determination unit, 136 ... Sample hold Circuits, 139 ... Quantization circuit, 151 ... Peak detection circuit, 152, 155 ... Low pass filter, 153 ... Upper level detection unit, 154 ... Bottom detection circuit, 156 ... Lower level detection unit, 157 ... Reference level setting circuit, 158 ... Signal comparison / quantization unit.

Claims (1)

[Claims] 1. A detecting means for detecting a signal corresponding to information on a recording medium, a first judging means for judging a switching eye of a change in a signal level based on a detection signal from the detecting means, and a first judging means. Second determining means for determining a multi-valued signal level from the detection signal of the detecting means, reference value generating means for generating a plurality of reference values, and the second determining means. The output means for outputting one reference value generated from the reference value generating means in accordance with the determination result according to, the detection signal from the detection means and the reference value from the output means are compared. And a conversion means for converting the detection signal of the detection means into a binarized signal sequence according to the quantization result from the processing means. apparatus.