JPH0527986B2 - - Google Patents
Info
- Publication number
- JPH0527986B2 JPH0527986B2 JP60046668A JP4666885A JPH0527986B2 JP H0527986 B2 JPH0527986 B2 JP H0527986B2 JP 60046668 A JP60046668 A JP 60046668A JP 4666885 A JP4666885 A JP 4666885A JP H0527986 B2 JPH0527986 B2 JP H0527986B2
- Authority
- JP
- Japan
- Prior art keywords
- bed
- lead
- chip
- resin
- center
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/40—Leadframes
- H10W70/421—Shapes or dispositions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
- H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
[発明の技術分野]
本発明は、樹脂封止型半導体装置に使用するリ
ードフレームに関するもので、特に半導体チツプ
装着ベツドのアイランド形状の改善に係るもので
ある。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a lead frame used in a resin-sealed semiconductor device, and particularly relates to an improvement in the island shape of a semiconductor chip mounting bed.
[発明の技術的背景]
半導体装置用リードフレームは一枚の金属板を
プレス又はエツチングして作られる。リードフレ
ームは、半導体チツプを装着するためのベツド
と、チツプの電極を外部回路に導く複数のリード
と、ベツド及びリードを製造工程中所定の位置に
保持するための連結バーとを単位フレームとし、
この単位フレームを多数並べて搬送フレームで連
結した帯状の金属板である。トランジスタやIC
の組立は自動機械化した生産方式がとられ、リー
ドフレームはこれに適した部材として一般に広く
用いられている。[Technical Background of the Invention] Lead frames for semiconductor devices are made by pressing or etching a single metal plate. A lead frame is a unit frame consisting of a bed for mounting a semiconductor chip, a plurality of leads for guiding electrodes of the chip to an external circuit, and a connecting bar for holding the bed and leads in a predetermined position during the manufacturing process,
It is a band-shaped metal plate made by arranging a large number of unit frames and connecting them with a transport frame. transistors and ICs
An automatic mechanized production method is used for assembly, and lead frames are generally widely used as a suitable member for this purpose.
従来の樹脂封止型半導体装置に使用されるリー
ドフレームの単位フレームを例とし以下図面にも
とづいて説明する。第3図及び第4図は従来の樹
脂封止型トランジスタの平面図であつて、図面を
見易くするため樹脂外囲器の上側の樹脂を除去
し、組立てられた半導体チツプ及びリード等を露
出させた状態の平面図である。第5図は第4図の
トランジスタに使用される単位リードフレームの
平面図である。1の半導体チツプ(トランジスタ
チツプ)は2のチツプ装着ベツド(アイランド)
にロー材等により装着固定される。3はリードで
チツプの電極を外部回路に導出するためのもので
ある。この例でリード3はチツプ装着ベツド2か
ら突出するリード3aとベツド2から分離配置さ
れるリード3bとから構成されている。品種によ
つてはチツプ装着ベツドより突出するリードを設
けていないものもある。4は半導体チツプ1とリ
ード3bとを電気接続するAu又はAl等のボンデ
イングワイヤである。リード3bの端部の幅が広
くなつているのは主としてワイヤボンデイング作
業を容易にするためである。一点鎖線7はチツプ
装着ベツド2から突出するリード3aの軸の中心
線を延長した中心直線7である。第3図の例では
この中心直線7に対しほぼ対称の位置にチツプ装
着ベツドを設け半導体チツプを装着している。第
4図の例では中心直線7の一方の側に位置をずら
して装着している。半導体チツプ1をチツプ装着
ベツド2に装着し、ボンデイングワイヤ4をボン
デイングした後トランスフアモールド法等により
エポキシ等の樹脂により封止される。5はこの封
止用成形樹脂(樹脂外囲器)である。またリード
3は樹脂封止された部分を内部リード(インナー
リード)、樹脂封止されず外側に露出する部分を
外部リード(アウターリード)と呼ぶ。第5図に
おいて8はダムバーで樹脂封止工程で樹脂の流出
を防止すると共にリードを互いに連結する。また
9は搬送フレーム、10は搬送孔で組立工程中リ
ードフレームを移動し所定の位置決めをする機能
を持つている。ダムバー及び搬送フレームは製造
過程でのみ必要なもので樹脂封止後切除される。
なおリードフレームの材料は銅又は銅合金或いは
鉄、ニツケルコバルト合金が一じ般に使用され
る。 A unit frame of a lead frame used in a conventional resin-sealed semiconductor device will be described below with reference to the drawings. FIGS. 3 and 4 are plan views of conventional resin-sealed transistors. In order to make the drawings easier to see, the upper resin of the resin envelope has been removed to expose the assembled semiconductor chip, leads, etc. FIG. FIG. 5 is a plan view of a unit lead frame used in the transistor of FIG. 4. Semiconductor chip 1 (transistor chip) is attached to chip mounting bed (island) 2.
It is attached and fixed with brazing material etc. 3 is a lead for leading out the electrodes of the chip to an external circuit. In this example, the lead 3 is composed of a lead 3a projecting from the chip mounting bed 2 and a lead 3b separated from the bed 2. Some varieties do not have leads that protrude beyond the tip mounting bed. 4 is a bonding wire made of Au, Al, etc., which electrically connects the semiconductor chip 1 and the leads 3b. The reason why the ends of the leads 3b are wide is mainly to facilitate wire bonding work. The one-dot chain line 7 is a center straight line 7 extending from the center line of the axis of the lead 3a projecting from the chip mounting bed 2. In the example shown in FIG. 3, a chip mounting bed is provided at a substantially symmetrical position with respect to the center line 7, and a semiconductor chip is mounted thereon. In the example shown in FIG. 4, the mounting is shifted to one side of the center straight line 7. A semiconductor chip 1 is mounted on a chip mounting bed 2, bonded with bonding wires 4, and then sealed with a resin such as epoxy by a transfer molding method or the like. 5 is this molded resin for sealing (resin envelope). Further, the resin-sealed portion of the lead 3 is called an internal lead (inner lead), and the portion that is not sealed with resin and is exposed to the outside is called an external lead (outer lead). In FIG. 5, a dam bar 8 prevents resin from flowing out during the resin sealing process and connects the leads to each other. Further, reference numeral 9 denotes a conveyance frame, and 10 denotes a conveyance hole, which has the function of moving the lead frame and positioning it at a predetermined position during the assembly process. The dam bar and transport frame are necessary only during the manufacturing process and are removed after resin sealing.
Copper, copper alloy, iron, or nickel-cobalt alloy is generally used as the material for the lead frame.
[背景技術の問題点]
一般に半導体装置は回路基板等に外部リードに
よつて取り付けられる。この取り付けは、装置の
外部リードを基板等のピン穴に挿入或いはプリン
ト配線上の所定の位置に外部リードを合わせた後
半田付等により装着される。従つて半導体装置の
外部リードは樹脂封止後、取り付け易い形状に成
形加工する必要がある。第2図は、第3図及び第
4図に示すような形状の半導体装置の外部リード
の成形加工後の一例を示す斜視視図である。[Problems with Background Art] Generally, semiconductor devices are attached to a circuit board or the like using external leads. This attachment is carried out by inserting the external leads of the device into pin holes of the board or the like, or by soldering the external leads to a predetermined position on the printed wiring, or the like. Therefore, after the external leads of the semiconductor device are sealed with resin, it is necessary to mold them into a shape that is easy to attach. FIG. 2 is a perspective view showing an example of an external lead of a semiconductor device having the shape shown in FIGS. 3 and 4 after being formed.
他方半導体装置は樹脂封止後の取り扱い中にリ
ード間隔やリードの直線度がくずれる場合があ
る。特に小形の装置で外部リードの機械的強度が
弱い場合には正常の形状からのズレがしばしば発
生する。この場合においては装置を取り付ける直
前、例えばピンセツト等によりズレを直すため成
形が行われる。 On the other hand, during handling of semiconductor devices after resin sealing, lead spacing and lead straightness may deteriorate. Particularly in small devices where the mechanical strength of the external leads is weak, deviations from the normal shape often occur. In this case, immediately before installing the device, molding is performed to correct the misalignment using, for example, tweezers.
以上のように半導体装置は樹脂封止後その外部
リードを成形加工する必要がある。この成形加工
作業において外部リードはその軸方向に引張り応
力を受けることになる。外部リードがチツプ装置
ベツドから突出するリード3aの場合には、リー
ドと同体のベツドに装着固定されているチツプに
も当然応力が加わりその応力が一定の限界を越え
るとチツプを破壊することになる。外形の小さい
数mm程度の半導体装置においては特に成形加工中
のチツプクラツクは無視できない問題である。 As described above, it is necessary to mold the external leads of a semiconductor device after resin sealing. During this molding operation, the external lead is subjected to tensile stress in its axial direction. In the case where the external lead is the lead 3a that protrudes from the chip device bed, stress is naturally applied to the chip that is attached and fixed to the same bed as the lead, and if that stress exceeds a certain limit, the chip will be destroyed. . Chip cracks during molding are a problem that cannot be ignored, especially in semiconductor devices with small external dimensions of several millimeters.
[発明の目的]
本発明の目的は、樹脂封止された半導体装置の
樹脂成形後外部リードを成形加工する工程におい
て、外部リードを介してチツプ装着ベツドに加え
られる外力を極力軽減する形状の半導体装置用リ
ードフレームを提供することである。[Object of the Invention] An object of the present invention is to provide a semiconductor having a shape that reduces as much as possible the external force applied to the chip mounting bed through the external leads in the process of molding the external leads after resin molding of a resin-sealed semiconductor device. An object of the present invention is to provide a lead frame for a device.
[発明の概要]
本発明は、半導体チツプを装着するチツプ装着
ベツドと、該ベツドから突出するリードとを有す
る半導体装置用リードフレームにおいて、チツプ
装着ベツドの中心の位置が該ベツドから突出する
リード軸の中心直線の一方の側に偏在すると共に
該ベツドが前記中心直線の他方の側に突出する張
出し梁部(以下、突起部ともいう)を有し、中心
直線から該張出し梁部の端までの距離が中心直線
から該ベツドの端までの距離の1/3〜1の範囲
にあり、半導体チツプが該ベツドの中心付近の中
央部に装着されることを特徴とする半導体装置用
リードフレームである。[Summary of the Invention] The present invention provides a lead frame for a semiconductor device having a chip mounting bed for mounting a semiconductor chip and a lead protruding from the bed, in which the lead shaft protrudes from the bed at the center of the chip mounting bed. The bed has an overhanging beam portion (hereinafter also referred to as a protrusion) that is unevenly distributed on one side of the central straight line, and the bed projects to the other side of the central straight line, and the distance from the central straight line to the end of the overhanging beam portion is A lead frame for a semiconductor device characterized in that the distance is in the range of 1/3 to 1 of the distance from the center straight line to the edge of the bed, and a semiconductor chip is mounted in a central portion near the center of the bed. .
本発明によるるリードフレームは、半導体チツ
プ装着ベツド(アイランド)の形状を改善したも
のである。即ちベツドと同体のリード軸の中心直
線を挾んで一方の側にベツドを、他方の側に突起
部を設けたものである。またこの突起部は、前記
中心直線に対してベツドと反対方向で、ベツド上
部の樹脂外囲器面に平行に、ベツドと同等又はそ
れに近い大きさ、すなわち中心直線からの突出距
離の1/3〜1の突出距離で突出した形状を有す
る。このように装着ベツドを突起部付きのベツド
形状とすると、外部リード成形加工時、リードに
引張り力が加わつてもその応力の一部は突起部が
負担し、又せん断応力も突起部で一部打消され、
チツプ装着ベツドに加わる外力が従来に比し著し
く軽減される。 The lead frame according to the present invention has an improved shape of the semiconductor chip mounting bed (island). That is, the bed is provided on one side of the center straight line of the lead shaft, which is the same body as the bed, and the protrusion is provided on the other side. In addition, this protrusion is arranged in a direction opposite to the bed with respect to the center line, parallel to the surface of the resin envelope at the top of the bed, and has a size equal to or close to that of the bed, that is, 1/3 of the protruding distance from the center line. It has a protruding shape with a protrusion distance of ~1. If the mounting bed is shaped as a bed with protrusions in this way, even if tensile force is applied to the leads during external lead molding, part of the stress will be borne by the protrusions, and some of the shear stress will also be borne by the protrusions. canceled,
The external force applied to the tip mounting bed is significantly reduced compared to the conventional method.
[発明の実施例]
この発明は主として従来の経験と試行にもとづ
き一部推論を加えて行われた。第3図の従来の半
導体装置の場合は、リード3aに引張り力が加わ
るとリードの軸の中心直線7上即ち引張り力の作
用線上にチツプ装着ベツド2は設けられているの
で、ベツドの中央部に他部分に比し強い応力が作
用する。また第4図においては、チツプ装着ベツ
ド2がリード3aの中心直線7の右側(図面上)
に片寄つて設けられているので、ベツドは直接の
引張り力は受けないが曲げモーメントによるせん
断力が作用する。この為いずれの場合においても
装着ベツドに固定された半導体ペレツトは強い応
力を受け破壊しやすくなるものと推論された。こ
れを解決する為装着ベツドの位置を引張り外力の
作用線上より片寄つた位置とし且つ曲げモーメン
トによるせん断力を相殺する為リード軸の中心直
線に対しベツドと反対側に突起部を設けることと
した。[Embodiments of the Invention] This invention was made mainly based on conventional experience and trials, with some inferences added. In the case of the conventional semiconductor device shown in FIG. 3, when a tensile force is applied to the lead 3a, the chip mounting bed 2 is located on the center straight line 7 of the axis of the lead, that is, on the line of action of the tensile force. A stronger stress acts on the area than on other parts. In addition, in FIG. 4, the tip mounting bed 2 is on the right side of the center straight line 7 of the lead 3a (on the drawing).
Since the bed is biased toward the base, the bed is not subjected to direct tensile force, but is subjected to shear force due to bending moment. For this reason, it was inferred that in either case, the semiconductor pellets fixed to the mounting bed would be subject to strong stress and would be susceptible to destruction. To solve this problem, we decided to position the mounting bed off to the line of action of the tensile external force and provide a protrusion on the opposite side of the bed with respect to the center line of the lead shaft in order to offset the shear force caused by the bending moment.
第1図はベツドに突起部を設けた本発明のリー
ドフレームの1つの実施例を示すもので、図面は
このリードフレームを使用した半導体装置の平面
図であり、図面を見易くする為半導体チツプ1、
チツプ装着ベツド2等の上側の樹脂を除いて図示
したものである。なお図面において同一符号は第
3図等と同一部分を表わす。チツプ装着ベツド2
の中心11の位置はベツド2から突出するリード
3aの軸の中心直線7の一方の側(この図面では
右側)に偏在しており、その中心11付近のベツ
ド中央部部に、必ずしも中心11とチツプの中心
が一致するとは限らないが、半導体チツプ1が装
着される。又チツプ装着ベツド2は中心直線7の
他方の側(この図面では左側)に突出する突起部
6を有している。 FIG. 1 shows one embodiment of the lead frame of the present invention in which a protrusion is provided on the bed, and the drawing is a plan view of a semiconductor device using this lead frame. ,
The resin on the upper side of the chip mounting bed 2 and the like is not shown in the figure. In the drawings, the same reference numerals represent the same parts as in FIG. 3, etc. Chip mounting bed 2
The position of the center 11 of the lead 3a protruding from the bed 2 is unevenly distributed on one side (right side in this drawing) of the center line 7 of the axis of the lead 3a, and the center 11 is not necessarily located in the central part of the bed near the center 11. The semiconductor chip 1 is mounted, although the centers of the chips do not necessarily coincide. The chip mounting bed 2 also has a protrusion 6 that projects on the other side of the center straight line 7 (on the left side in this drawing).
第1図に示す形状のリードフレームを外囲器の
小さい樹脂封止型の製品に適用した実施例につい
て説明する。樹脂外囲器の外形寸法は幅1.5mm、
横3mm、高さ1.1mmのものを用いた。組み立てて
樹脂封止した後の上記装置(外部リードの成形を
していない)の外部リードの先端部分をテスト基
板等の所定の位置に半田付を行い固定する。次に
第2図に示すような形状に外部リードを成形加工
する。外部リードの成形加工の前後で装置の特性
を調べ、特性変化及びチツプの破壊の有無を調べ
た。その結果不良発生は皆無であつた。このこと
により突起部は外部リードに印加される引張り力
のかなりの部分を負担し、引張り応力を止める役
目をすることが確認された。 An example in which a lead frame having the shape shown in FIG. 1 is applied to a resin-sealed product with a small envelope will be described. The outer dimensions of the resin envelope are 1.5 mm wide.
A piece with a width of 3 mm and a height of 1.1 mm was used. After being assembled and resin-sealed, the tips of the external leads of the above device (no external lead molding) are soldered and fixed to a predetermined position on a test board or the like. Next, external leads are molded into the shape shown in FIG. The characteristics of the device were examined before and after the external lead was molded, and changes in characteristics and chip breakage were investigated. As a result, there were no defects. This confirms that the protrusion bears a significant portion of the tensile force applied to the external lead and serves to stop the tensile stress.
[発明の効果]
従来のリードフレームを用いた樹脂封止型半導
体装置では、リード成形を行うことによりチツプ
の破壊及び特性不良となるものが5〜30%も発生
していた。本発明によるリードフレームを用いる
ことによりリード成形による不良発生を皆無にす
るこができた。[Effects of the Invention] In resin-sealed semiconductor devices using conventional lead frames, 5 to 30% of chips were destroyed and had poor characteristics due to lead molding. By using the lead frame according to the present invention, it was possible to completely eliminate defects caused by lead molding.
第1図は本発明のリードフレームを使用した半
導体装置の平面図、第2図は第1図、第3図及び
第4図の半導体装置の外部リードを成形加工した
状態を表わす斜視図、第3図及び第4図は従来の
半導体装置の平面図、第5図は従来のリードフレ
ームの平面図である。
1…半導体チツプ、2…チツプ装着ベツド(ア
イランド)、3…リード、3a…チツプ装着ベツ
ドから突出するリード、5…樹脂外囲器、6…突
起部、7…リード軸の中心直線、11…チツプ装
着ベツドの中心。
FIG. 1 is a plan view of a semiconductor device using the lead frame of the present invention, FIG. 2 is a perspective view showing the external leads of the semiconductor devices shown in FIGS. 1, 3, and 4 after being formed. 3 and 4 are plan views of a conventional semiconductor device, and FIG. 5 is a plan view of a conventional lead frame. DESCRIPTION OF SYMBOLS 1... Semiconductor chip, 2... Chip mounting bed (island), 3... Lead, 3a... Lead protruding from the chip mounting bed, 5... Resin envelope, 6... Projection, 7... Center straight line of lead axis, 11... The center of the tip mounting bed.
Claims (1)
と、該ベツドから突出するリードとを有する半導
体装置用リードフレームにおいて、チツプ装着ベ
ツドの中心の位置が該ベツドから突出するリード
軸の中心直線の一方の側に偏在すると共に該ベツ
ドが前記中心直線の他方の側に突出する張出し梁
部を有し、中心直線から該張出し梁部の端までの
距離が中心直線から該ベツドの端までの距離の
1/3〜1の範囲にあり、半導体チツプが該ベツ
ドの中心付近の中央部に装着されることを特徴と
する半導体装置用リードフレーム。1. In a lead frame for a semiconductor device having a chip mounting bed for mounting a semiconductor chip and leads protruding from the bed, the center position of the chip mounting bed is on one side of the center line of the lead shaft protruding from the bed. The bed has an overhanging beam that is unevenly distributed and projects to the other side of the center line, and the distance from the center line to the end of the overhang beam is 1/3 of the distance from the center line to the end of the bed. 1. A lead frame for a semiconductor device, characterized in that the semiconductor chip is mounted in a central portion near the center of the bed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60046668A JPS61206247A (en) | 1985-03-11 | 1985-03-11 | Lead frame for semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60046668A JPS61206247A (en) | 1985-03-11 | 1985-03-11 | Lead frame for semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61206247A JPS61206247A (en) | 1986-09-12 |
| JPH0527986B2 true JPH0527986B2 (en) | 1993-04-22 |
Family
ID=12753732
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60046668A Granted JPS61206247A (en) | 1985-03-11 | 1985-03-11 | Lead frame for semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61206247A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012015202A (en) * | 2010-06-29 | 2012-01-19 | On Semiconductor Trading Ltd | Semiconductor device, and method of manufacturing the same |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS555586A (en) * | 1978-06-29 | 1980-01-16 | Mitsubishi Electric Corp | Demodulation circuit for digital signal |
| JPS5555586A (en) * | 1978-10-19 | 1980-04-23 | Matsushita Electric Ind Co Ltd | Luminous part |
| JPS57155757A (en) * | 1981-03-23 | 1982-09-25 | Hitachi Ltd | Semiconductor device |
| JPS59191360A (en) * | 1983-04-15 | 1984-10-30 | Internatl Rectifier Corp Japan Ltd | Lead frame material for semiconductor device and lead frame as well as assembling for semiconductor device |
-
1985
- 1985-03-11 JP JP60046668A patent/JPS61206247A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61206247A (en) | 1986-09-12 |
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