JPH05291879A - Automatic equalizer circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide an automatic equalization circuit that can be realized by an analog circuit by automatically correcting the tap coefficient according to the distortion of an input signal. [Configuration] N-tap transversal filter (10
1 to 106) as an input, a first low-pass filter 108 that receives the output of the comparator 107 and outputs a reference waveform, and a first low-pass filter 1
08 and the output of the transversal filter subtractor 109, N multipliers 110 to 112 for multiplying the output of the subtractor 109 and the output of each stage of the transversal filter, and N N second low-pass filters 113 to 115 for respectively smoothing the outputs of the multipliers,
The output of the N second low-pass filters is composed of N integrators 116 to 118 each having an input,
The output of each integrator is used as the tap coefficient of each stage of the N-tap transversal filter.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an automatic equalizer used for demodulation in a digital data communication or a recording device, which automatically corrects a tap coefficient in accordance with distortion of an input signal to realize an analog circuit. To provide a digitalization circuit.

[0002]

2. Description of the Related Art An output r _{k obtained} by adding an input sequence {a _k } to a transversal filter having tap coefficients Cj (j = 0, ..., N) is given by (Equation 1).

[0003]

[Equation 1]

Next, as the evaluation function showing the goodness of approximation of the filter output r _k and the ideal output s _k , the root mean square error between them is obtained. When the average operation is E [·], it becomes as in (Equation 2).

[0005]

[Equation 2]

According to the maximum gradient method, the tap coefficient can be brought close to the optimum value by updating the coefficient according to (Equation 3).

[0007]

[Equation 3]

[0008] dD / dCj is as follows using (Equation 2).

[0009]

[Equation 4]

Therefore, (Equation 3) is

[0011]

[Equation 5]

[0012] FIG. 6 shows a 3-tap transversal filter to which (Equation 5) is applied. In FIG. 6, 401 and 402 are delay elements, and 403, 404 and 40.
5 is a coefficient multiplier, 406 is an adder, 407 is a comparator, 4
09 is a subtractor, 410, 411, 412 are multipliers, 41
Reference numerals 3,414,415 are accumulators.

The input signal passes through a transversal filter composed of delay elements 401 and 402, coefficient multipliers 403, 404 and 405, and an adder 406, and then a reference value s _k at a detection point is obtained by a comparator 407. A subtractor 409 obtains an error e _k between the transversal filter output r _k and the reference value s _k .

The product e _k · a _kj of this error and the delay line output is obtained by the multipliers 410, 411 and 412, and the integrator 4
The tap coefficients Cj are updated with the values multiplied by 13,414,415 multiplied by an appropriate coefficient as an increment.

By repeating the above operation a number of times, the tap coefficient changes in the direction in which the error decreases, and it is possible to obtain an equalized output from the transversal filter (reference document: IEICE "Digital Signal Processing"). , 1
1. Adaptive digital signal processing and automatic equalization).

[0016]

However, since the reference value s _k is _obtained by the comparator 407 in the above configuration, it becomes a valid value only at the detection point. Therefore, it is necessary to control the operation of the entire system by the PLL clock for detecting point timing. The circuit system that updates the coefficient at the detection point timing can be realized only by a digital circuit, which leads to an increase in hardware scale. Further, since the coefficient is updated only at the detection point timing, there is a problem that the coefficient converges more slowly than the coefficient is updated all the time.

[0017]

In order to solve the above problems, in the automatic equalization circuit of the present invention, a comparator having an output of an N-tap transversal filter as an input and an output of the comparator as an input, A first low-pass filter that outputs a reference waveform, a subtractor that determines the difference between the output of the first low-pass filter and the output of the transversal filter, the output of the subtractor and the output of each stage of the transversal filter , N second low-pass filters for smoothing the outputs of the N multipliers, and N for receiving the outputs of the N second low-pass filters as inputs. The integrator is composed of a plurality of integrators, and the output of the N integrators is used as the tap coefficient of each stage of the N-tap transversal filter.

[0018]

The automatic equalizer circuit of the present invention constructed by using the above means can be realized by all analog circuits and can be realized by less hardware than the conventional digital automatic equalizer circuit. Further, since the coefficient is updated all the time, the coefficient converges faster than the conventional digital automatic equalization circuit that updates the coefficient only at the detection point.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of an automatic equalizing circuit according to the present invention are shown in FIGS.
Will be explained. First, FIG. 1 shows the present invention applied to a 3-tap transversal filter. In FIG. 1, a low-pass filter 108 is added to FIG. 6 used in the description of the conventional technique, and integrators 413, 414, 415 are provided as low-pass filters 113, 114, 115 and integrators 116, 11 respectively.
It has been replaced with 7,118.

The operation of FIG. 1 will be described with reference to FIG. Figure 2
(1) is the output of the adder 106 at the final stage of 101 to 106 that constitutes the 3-tap transversal filter, as shown in FIG.
(2) is the output of the comparator 107 at the next stage. 2C shows the output of the low-pass filter 108 in the subsequent stage. The threshold of the comparator 107 is set so that the output pulse width of the comparator 107 becomes equal to the bit inversion interval of the signal. An ideal signal waveform is obtained by designing as described above.

The frequency characteristic in the low region of the output of the comparator 107 is equal to the frequency characteristic determined by the modulation rule of the signal, and the frequency characteristic in the high region is 0 at a frequency that is an integral multiple of the frequency corresponding to the bit inversion interval of the signal. In the region before the frequency, the frequency characteristic decreases linearly. Therefore, the output becomes equal to the waveform of the roll-off factor 1 except for the low pass filter 108 which has a frequency higher than the bit inversion interval of the signal. In addition, the low-pass filter 108 can control the inclination of the attenuation in the region before the cutoff described above to obtain an output equal to the waveform of an arbitrary roll-off factor.

In this way, the output of the transversal filter can be compared with the outputs of the comparator 107 and the low-pass filter 108 created as a reference at all timings, not only at the detection point.
As a result, the comparator, the subsequent multiplier, and the low-pass filter can be configured by an analog circuit that operates in continuous time, and the circuit scale can be made smaller than that configured by the digital circuit as shown in the conventional example. You can

Further, since the error signal can be obtained at all timings to update the tap coefficient, the tap coefficient will no longer converge.

Next, a second embodiment of the present invention will be described with reference to FIGS.
Will be explained. When the output of the transversal filter is a ternary partial response, its waveform is shown in Fig. 4.
As shown in (1), it has a positive peak and a negative peak. The circuit in this case includes a comparator which outputs the output of the transversal filter and which outputs a square wave on the plus side with a threshold value on the plus side and a comparator which outputs a square wave on the minus side with a threshold value on the minus side. It suffices to adopt a configuration in which the reference waveform is created by passing both of them, adding their outputs, and passing them through a low-pass filter. The pulse width of the output pulse of the comparator and the frequency characteristic of the low pass filter are designed by the method described in the first embodiment.

FIG. 3 shows the delay element 219, the comparator 228, the adder 227, and the circuit block 2 surrounded by a broken line in FIG.
26 and 229 are added. The output of the transversal filter composed of 201 to 206 is input to the comparator 207 having a positive threshold value and the comparator 228 having a negative threshold value, and both outputs are added by the adder 227. After that, a reference waveform is obtained by passing through a low pass filter 208.

Further, the circuit blocks 226 and 229 keep the threshold values of the comparators 207 and 228 optimal even if the amplitude of the input signal changes.

The operation of the circuit block 226 for keeping the threshold value of the plus side comparator 207 at an optimum value will be described with reference to FIG. In FIG. 4, assuming that (1) is the output of the 3-tap transversal filter configured by 201 to 206, the output of the delay element 219 having the delay amount of the time T is (2). After punching out with the threshold value shown by the broken line in the figure, the output of the comparator 207 becomes (3), the output of the comparator 220 becomes (4), and the output of the RS flip-flop 221 at the subsequent stage becomes (5). The output of the subtracter 222 that takes the difference between the RS flip-flop 221 and the comparator 207 is the comparator 20 as shown in (6).
If the pulse width of the output (3) of 7 is wider than T, it becomes a positive pulse having a pulse width different from T, and if it is narrower than T,
It becomes a negative pulse having a pulse width different from T. If this is output through the integrator 223 as (7) and is used as the threshold value of the comparators 207 and 220 through the low pass filter 224, when the pulse width of the output is wider than T,
Since the threshold value increases accordingly, the pulse width decreases, and when the output pulse width is narrower than T, the threshold value decreases accordingly and the pulse width increases.

Further, the circuit block 229 which keeps the threshold value of the minus side comparator 228 at an optimum value has the same configuration and the same operation.

In this way, even if the amplitude of the input signal changes, the output pulse width of the comparator is automatically kept at T, and in combination with the low pass filter 208 described in the first embodiment, an ideal reference. The waveform can be obtained.

Next, a third embodiment of the present invention will be described with reference to FIG. FIG. 5 is a diagram in which an adder 330 is added to FIG. The partial response sequence of (1, 0, -1) requires a 1 + D decoder for demodulation. This is to add the original signal and the signal delayed by the same time as the bit inversion interval of the signal, and in FIG.
And an adder 330. The delay element 319 is the second
The circuit scale can be reduced by also using the delay element 219 described in the above embodiment.

[0031]

As described above, the automatic equalization circuit of the present invention is
An optimal combination of a comparator and a low-pass filter creates a reference waveform that has valid values over the entire time. Therefore, it can be realized by all analog circuits and can be realized by less hardware than the conventional digital automatic equalization circuit. Further, since the coefficient is updated all the time, the coefficient converges faster than the conventional digital automatic equalization circuit that updates the coefficient only at the detection point.

Further, even if the amplitude of the input signal changes, the pulse width of the comparator output can be kept constant by keeping the slice level of the comparator optimum, and an ideal reference waveform can always be obtained.

Furthermore, the circuit size can be reduced by using the delay element of the 1 + D decoder used for demodulating the partial response sequence of (1, 0, -1) also as another circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an automatic equalization circuit according to a first exemplary embodiment of the present invention.

FIG. 2 is a waveform diagram for explaining the operation of the first embodiment.

FIG. 3 is a block diagram showing a configuration of an automatic equalization circuit according to a second embodiment of the present invention.

FIG. 4 is a waveform diagram for explaining the operation of the second embodiment.

FIG. 5 is a block diagram showing a configuration of an automatic equalization circuit according to a third exemplary embodiment of the present invention.

FIG. 6 is a block diagram showing a configuration of a conventional automatic equalization circuit.

[Explanation of symbols]

101, 102, 201, 202, 219, 319 Delay element 103-105, 203-205 Coefficient multiplier 106, 206, 227, 330 Adder 107, 207, 220, 228 Comparator 108, 113-115, 208, 213-215 , 2
24 Low-pass filter 109,209,222 Subtractor 110-112,210-212 Multiplier 116-118,216-218,223 Integrator 221 RS flip-flop

Claims (4)

[Claims] 1. A comparator having an output of an N-tap transversal filter as an input, and a first having an output of the comparator as an input and outputting a reference waveform.
Low-pass filter, a subtractor for obtaining the difference between the output of the first low-pass filter and the output of the transversal filter, and N multiplications for multiplying the output of the subtractor and the output of each stage of the transversal filter. And N second second smoothers for respectively smoothing the outputs of the N multipliers.
Low pass filter and N integrators having outputs of the N second low pass filters as inputs, and outputs of the N integrators of each of the N tap transversal filters. An automatic equalization circuit having a tap coefficient of stages. 2. An N-tap transversal filter output is a ternary partial response waveform, and the output of the transversal filter is used as an input.
And a second comparison circuit, an adder that adds the outputs of the first comparison circuit and the second comparison circuit, and a first output that receives the output of the adder and outputs a reference waveform.
Low-pass filter, a subtractor for obtaining the difference between the output of the first low-pass filter and the output of the transversal filter, and N multiplications for multiplying the output of the subtractor and the output of each stage of the transversal filter. And N second second smoothers for respectively smoothing the outputs of the N multipliers.
Low pass filter and N integrators having outputs of the N second low pass filters as inputs, and outputs of the N integrators of each of the N tap transversal filters. An automatic equalization circuit having a tap coefficient of stages. 3. The first and second comparison circuits each have a first comparator having an output of an N-tap transversal filter as an input, and an output of the transversal filter as an input, and bit inversion of an input signal. A delay element having a delay time equal to the interval T, a second comparator having the output of the delay element as an input, an output of the second comparator is a reset input, and an output of the first comparator is set. An RS flip-flop as an input, a subtractor for obtaining a difference between the output of the RS flip-flop and an output of the first comparator, an integrator having an output of the subtractor as an input, and the integrator. And a low-pass filter whose input is the output of the low-pass filter, the output of the low-pass filter is a threshold of the first comparator and the second comparator, and the input of each of the first comparators is The automatic equalization according to claim 2, wherein the first and second comparison circuits are input, and the outputs of the respective first comparators are output of the first and second comparison circuits. circuit. 4. An automatic equalization circuit, characterized in that a 1 + D decoder is connected to the output of an N-tap transversal filter, and the delay element used in the decoder is also used as the delay element according to claim 2.