JPH0529850A - Field effect transistor amplifier - Google Patents

Abstract

(57) [Abstract] [Purpose] A compact, high-power internally matched field-effect transistor (hereinafter referred to as FET) with good reflection characteristics in a wide band.
The purpose is to obtain an amplifier. A FET amplifier according to the present invention includes a power distributor having a coupling circuit, which is provided on a dielectric substrate, and which integrates two branches for shunt connection by a microstrip line and configures a branch for series connection by a slot line. It is configured by including a power combiner.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention mainly relates to a microwave band high power field effect transistor amplifier.

[0002]

2. Description of the Related Art FIG. Ya
mada, et al .: “X AND KuBAND HIGH
POWER GaAs FETs ", IEEEEMTT
-S Digest, No. It is a schematic block diagram of the FET amplifier for high output shown by DD-5, (1988),
FIG. 10 is a DD sectional view of FIG. In the figure, 2 is a field effect transistor (hereinafter referred to as FET), 3 is an input side matching circuit, 4 is an output side matching circuit, 5 is an input terminal, 6 is an output terminal, 7 is a package, 8 is a power distributor, Reference numeral 9 is a power combiner. These components are housed in the package 7, and the FET amplifier 1 itself is constructed in a small size. This FET amplifier 1 is a so-called internal matching FET amplifier in which a bias circuit is not provided,
The input terminal 5 is the gate terminal of the FET 2, and the output terminal 6 is FE.
It serves as a T drain terminal, and the package 7 itself serves as a source terminal.

Next, the operation of this FET amplifier will be described with reference to the equivalent circuit diagram of FIG. In FIG. 11, 8 is a power distributor, 9 is a power combiner, and 10 is an isolation resistor of the power distributor and the power combiner. In this example, a Wilkinson type power distributor 8 and a power combiner 9 are used because of the small size. Input terminal 5
The input power to the power splitter 8 is divided into two in-phase and equal amplitude by the power distributor 8 and amplified by the two FETs 2. The amplified powers are combined by the power combiner 9 and taken out from the output terminal 6.
The input matching circuit 3 and the output matching circuit 4 are FE in the required band.
Input / output impedance of T2 and input / output terminal impedance
It is designed to match the dance (usually 50Ω). If the variations in the output amplitude and phase of the two FETs 2 are small, the power is effectively combined and a high output can be obtained. Even if there are large variations in the amplitudes and phases of the outputs of the two FETs 2, the imbalance component is absorbed by the isolation resistor 10 so that problems such as oscillation do not occur.

[0004]

Since the conventional FET amplifier is configured as described above, it is characterized in that it is small and can provide high output, but the power distributor 8 and the power combiner 9 are not so wide band. Therefore, there is a problem that the band in which good reflection characteristics are obtained is narrow, and therefore the band in which gain and high output are obtained is narrow. As a means for increasing the band, there is a method of using a Lang coupler as the power distributor 11 and the power combiner 12 as in the conventional example 2 shown in FIG. However, in this case, since the two output terminals of the Lange coupler are not DC-connected, there is a problem that a bias cannot be applied from the outside.

The present invention has been made in order to solve the above-mentioned problems, is small in size as in the conventional example, and has a better reflection characteristic in a wider band than the conventional one, and gain and high gain in a wide band. It is an object of the present invention to obtain an internal matching type FET amplifier capable of obtaining an output and applying a bias from the outside.

[0006]

To achieve the above object, in an FET amplifier according to a first aspect of the present invention, a microstrip line in which two branches for shunt connection provided in a dielectric substrate are integrated, A power distributor and a power combiner each having a coupling circuit composed of a slot line forming a series-connected branch provided on a ground conductor on the rear surface of a dielectric substrate are provided. In the FET amplifier according to claim 2, a microstrip line that integrates two branch connection branches provided on a first dielectric substrate and a second dielectric substrate that is superposed on the first dielectric substrate. The power distributor and the power combiner each having a coupling circuit composed of a slot line that constitutes a series-connected branch provided on the ground conductor on the surface of.

[0007]

In the FET amplifier of the present invention configured as described above, two branches for shunt connection are integrated by a microstrip line on a dielectric substrate, and a series connection branch is configured for a slot line. Since the power distributor and the power combiner having the above are small in size and widened in band due to the small use of the quarter wavelength line,
In addition, since the input / output terminal and isolation terminal are connected in direct current, good reflection characteristics can be obtained over a wider band than before, and therefore gain and high output can be obtained over a wide band, and bias must be applied externally. You can

[0008]

EXAMPLES Example 1. Embodiment 1 of the present invention will be described below with reference to the drawings. 1 is a schematic configuration diagram of an FET amplifier showing a first embodiment of the present invention. FIG. 2 shows A of FIG.
A sectional view and FIG. 3 are equivalent circuit diagrams of the FET amplifier shown in FIG. In FIGS. 1, 2, and 3, reference numerals 30 and 40 denote a power distributor and a power combiner, respectively. FIG. 9 showing a conventional example,
The same or corresponding portions of the FET amplifiers of FIGS. 10 and 11 are designated by the same reference numerals, and duplicate description will be omitted.

FIG. 4 is a configuration diagram of the power distributor 30 and the power combiner 40 which constitute the FET amplifier of FIG. 1, and FIG. 5 is a BB sectional view of FIG. 4 and 5, the dielectric substrate 33
A microstrip line consisting of the microstrip conductor 31 on the front surface and the ground conductor on the back surface and the slot line 32 provided on the ground conductor 34 on the back surface of the dielectric substrate 33 form a coupling circuit. Reference numeral 50 denotes a groove provided in the package 7 that forms a space in front of the slot line 32 of the power distributor 30 and the power combiner 40 when mounted on the package 7. The coupling circuit of the power distributor and the power combiner shown in FIG. 4 can be considered as a modification of the branch line coupler of three branches, and the band width is wider than that of the conventional branch line coupler due to the small use of the quarter wavelength line. It becomes small. In FIG. 4, if a is used as an input terminal, b and c are used as output terminals, and d is used as an isolation terminal, they function as a power distributor, while b and c are used as input terminals, a is used as an output terminal, and d is used as a power distributor. If used as an isolation terminal, it works as a power combiner. Power distributor 3 configured as described above
0 and the power combiner 40 of the present invention are as small as the conventional FET amplifier, and can obtain good reflection characteristics in a wider band than the conventional FET amplifier, and can obtain a gain and a high output in a wide band. Besides, there is an advantage that a bias can be applied from the outside.

Embodiment 2. Next, a second embodiment of the present invention will be described with reference to the drawings. FIG. 6 shows a second embodiment of the present invention.
FIG. 7 shows a power distributor 60 and a power combiner 70 that form the FET amplifier of FIG. Second Embodiment FIG. 8 is a sectional view of an FET amplifier showing a second embodiment of the present invention. In the figure, 61 is a first dielectric substrate,
Reference numeral 62 is a second dielectric substrate that is overlaid on the first dielectric substrate 61. The ground conductor 65 of the first dielectric substrate 61 and the second
The ground conductor 66 of the dielectric substrate 62 is electrically connected by a through hole 63 and a conductor 64. By the microstrip line including the microstrip conductor 31 on the front surface of the first dielectric substrate 61 and the ground conductor 65 on the back surface, and the slot line 32 provided on the ground conductor 66 on the surface of the second dielectric substrate 62. Similar to the first embodiment, a modified coupling circuit of a branch line coupler with three branches is formed. The FET amplifier of the present invention including the power distributor 60 and the power combiner 70 configured as described above is small in size, as in the first embodiment, and can obtain better reflection characteristics in a wider band than the conventional one, and gain in a wide band. In addition to high output, it has an advantage that a bias can be applied from the outside. There is an advantage that the groove 50 of the package 7 shown in FIG. 5 is unnecessary.

[0011]

As described above, according to claim 1 of the present invention, the microstrip line in which two branches for shunt connection provided in the dielectric substrate are integrated, and the ground conductor on the rear surface of the dielectric substrate are provided. By providing the power distributor and the power combiner having the coupling circuit composed of the slot lines that configure the provided branch of the series connection, the size is the same as that of the conventional example, and the reflection is better in the wider band than the conventional example. By obtaining the characteristics, it is possible to obtain an internal matching type FET amplifier that can obtain a gain and a high output in a wide band and can apply a bias from the outside. According to a second aspect of the present invention, a microstrip line in which two branches for shunt connection provided in a first dielectric substrate are integrated, and a second dielectric layer is stacked on the first dielectric substrate. By providing a power distributor and a power combiner having a coupling circuit made up of slot lines forming branches connected in series provided on the ground conductor on the surface of the substrate, the size is small as in the conventional example, It is possible to obtain an internal matching type FET amplifier capable of obtaining a good reflection characteristic in a wider band, obtaining a gain and a high output in a wider band and applying a bias from the outside.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of an FET amplifier showing a first embodiment of the present invention.

2 is a cross-sectional view taken along the line AA of the FET amplifier of FIG.

FIG. 3 is an equivalent circuit diagram of the FET amplifier of FIG.

FIG. 4 is a configuration diagram of a power distributor and a power combiner that configure the FET amplifier of FIG.

5 is a BB cross-sectional view of the power distributor and power combiner of FIG.

FIG. 6 is a configuration diagram of a power distributor and a power combiner that form an FET amplifier according to a second embodiment of the present invention.

7 is a CC cross-sectional view of the power distributor and power combiner of FIG.

FIG. 8 is a sectional view of an FET amplifier according to a second embodiment of the present invention.

FIG. 9 is a schematic configuration diagram of a FET amplifier of Conventional Example 1.

10 is a DD cross-sectional view of the FET amplifier of FIG.

11 is an equivalent circuit diagram of the FET amplifier of FIG.

FIG. 12 is an equivalent circuit diagram of a FET amplifier of Conventional Example 2.

[Explanation of symbols]

1 FET amplifier 2 FET 3 Input side matching circuit 4 Output side matching circuit 5 input terminals 6 output terminals 7 package 30 power distributor 31 Microstrip conductor 32 slots 33 Dielectric substrate 34 Ground conductor 40 power combiner 50 grooves 60 power distributor 61 First Dielectric Substrate 62 Second Dielectric Substrate 63 through holes 64 conductor 65 Ground conductor 66 Ground conductor 70 Power combiner

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Naoki Takagi             5-1-1 Ofuna, Kamakura-shi Mitsubishi Electric stock             Company Electronic Systems Laboratory

Claims (2)

[Claims] 1. An internally-matched field-effect transistor amplifier including a power divider and a power combiner, wherein a microstrip line in which two branches for shunt connection provided on a dielectric substrate are integrated, and the dielectric. A field effect transistor amplifier comprising a power distributor and a power combiner having a coupling circuit composed of a slot line forming a series-connected branch provided on a ground conductor on the back surface of a substrate. 2. An internal matching type field effect transistor amplifier including a power divider and a power combiner, wherein a microstrip line in which two shunt connection branches provided in a first dielectric substrate are integrated, A power distributor and a power combiner having a coupling circuit composed of a slot line constituting a series-connected branch provided on a ground conductor on the surface of a second dielectric substrate which is stacked on the first dielectric substrate are provided. A field-effect transistor amplifier characterized by the above.