JPH05299332A - Resist coating method for semiconductor wafer and suction jig - Google Patents

Resist coating method for semiconductor wafer and suction jig

Info

Publication number
JPH05299332A
JPH05299332A JP4105008A JP10500892A JPH05299332A JP H05299332 A JPH05299332 A JP H05299332A JP 4105008 A JP4105008 A JP 4105008A JP 10500892 A JP10500892 A JP 10500892A JP H05299332 A JPH05299332 A JP H05299332A
Authority
JP
Japan
Prior art keywords
semiconductor wafer
suction jig
resist
suction
jig
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4105008A
Other languages
Japanese (ja)
Inventor
Masato Nishizawa
正人 西澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP4105008A priority Critical patent/JPH05299332A/en
Publication of JPH05299332A publication Critical patent/JPH05299332A/en
Pending legal-status Critical Current

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  • Cleaning Or Drying Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

(57)【要約】 【目的】露光装置によるパターンの転写工程に、パター
ンぼけの原因となる半導体ウェハの裏面の微小パーティ
クルが持ち込まれることを防止する。 【構成】工程(a)で半導体ウェハ1をメカニカル搬送
具7に載せて搬入する。(b)(c)(d)で上の吸着
治具2uに保持させメカニカル搬送具7を退去させてか
ら下の吸着治具2dに保持変えする。(e)で半導体ウ
ェハ1を回転させながら表面全面にレジストノズル4に
よってレジストを塗布する。(f)で溶剤ノズル5によ
り表面周縁のレジストを除去する。(g)で上の吸着治
具2uに保持変えし、回転させながら裏面全面を溶剤、
純水などの順にバックリンスノズル6により洗浄する。
乾燥後(h)(i)でメカニカル搬送具9を導入し、上
の吸着治具2uの吸着を開放し、メカニカル搬送具9に
半導体ウェハ1を載せて搬出し、露光装置に送る。
(57) [Abstract] [Purpose] To prevent fine particles on the back surface of a semiconductor wafer, which cause pattern blurring, from being brought into a pattern transfer process by an exposure apparatus. [Structure] In step (a), the semiconductor wafer 1 is loaded on a mechanical carrier 7. In steps (b), (c) and (d), the upper suction jig 2u is held and the mechanical carrier 7 is withdrawn, and then the lower suction jig 2d is held. In (e), the resist is applied to the entire surface by the resist nozzle 4 while rotating the semiconductor wafer 1. In (f), the resist on the surface periphery is removed by the solvent nozzle 5. In (g), the upper suction jig 2u is held and changed, and the whole back surface is covered with solvent while rotating.
The back rinse nozzle 6 is used for cleaning in order of pure water or the like.
After drying (h) and (i), the mechanical transfer tool 9 is introduced, the suction of the upper suction jig 2u is released, and the semiconductor wafer 1 is placed on the mechanical transfer tool 9 and carried out and sent to the exposure device.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、半導体装置の製造工
程のレジストプロセスにおいて、縮小投影法などによる
露光工程の前工程に置かれる半導体ウェハのレジスト塗
布方法及びレジスト塗布に使用する吸着治具に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resist coating method for a semiconductor wafer and a suction jig used for resist coating in a resist process in a manufacturing process of a semiconductor device, which is placed in a pre-process of an exposure process such as reduction projection. ..

【0002】[0002]

【従来の技術】図4は従来例の半導体ウェハのレジスト
塗布方法及び吸着治具を示す斜視図である。各工程にお
ける位置決めとなるオリエンテーションフラット(以
下、OFともいう。)1aを持つ半導体ウェハ1は、真
空源に接続される複数の吸着小穴43を持つ上向き棒状
の吸着治具42によって裏面が吸着されて回転し、レジ
ストノズル4から吐出されるレジストが表面に塗布され
る。半導体ウェハ1の周縁のレジストは他の全面のレジ
ストより厚く、厚さも不均一なので溶剤ノズル5から吐
出される溶剤で除去し、同時に又はその後、半導体ウェ
ハ1の裏面周縁にリンスノズル46から溶剤、次に水を
吐出して裏面周縁を洗浄する。その後、半導体ウェハ1
を図示しない縮小投影露光装置のステージに搬送し、O
Fで位置決めしてレチクル(ホトマスクともいう)によ
り露光する。また、このレジスト塗布工程の前工程で水
などを使用したブラッシングによる裏面スクラバを実施
することもある。
2. Description of the Related Art FIG. 4 is a perspective view showing a conventional semiconductor wafer resist coating method and a suction jig. The semiconductor wafer 1 having an orientation flat (hereinafter also referred to as OF) 1a for positioning in each step is attracted on the back surface by an upward stick-shaped suction jig 42 having a plurality of suction small holes 43 connected to a vacuum source. The resist which is rotated and discharged from the resist nozzle 4 is applied to the surface. Since the resist on the peripheral edge of the semiconductor wafer 1 is thicker than the resist on the entire other surface and the thickness is not uniform, the resist is removed by the solvent discharged from the solvent nozzle 5, and at the same time or after that, the solvent is discharged from the rinse nozzle 46 to the peripheral edge of the back surface of the semiconductor wafer 1. Next, water is discharged to clean the periphery of the back surface. After that, semiconductor wafer 1
To a stage of a reduction projection exposure apparatus (not shown),
Position with F and expose with a reticle (also called a photomask). In addition, backside scrubber may be performed by brushing using water or the like in a step before the resist coating step.

【0003】[0003]

【発明が解決しようとする課題】サブミクロンICプロ
セスにおいては、特に縮小投影露光装置の焦点深度が1
μm前後になってきている。レジスト塗布工程の後の縮
小投影露光装置による微細パターンの転写工程におい
て、半導体ウェハ1の裏面に微小パーティクルが付着し
たものが露光装置のステージに載置されたとき、ステー
ジの上の薄い半導体ウェハ1はパーティクルにより部分
的に盛り上がり、図5に示すように良好なレチクル1g
の他に、パーティクルの周辺に焦点がずれたパターンぼ
けのレチクル1bが生じる。半導体ウェハ1の裏面の微
小パーティクルは、ステージに取り残されることもあ
り、そうすると連続処理において、多数の半導体ウェハ
1に同一のパターン不良が起きる。このパターン不良は
検査で発見されても、転写工程を停止してステージの洗
浄再生の手間がかかり、検査で発見されなければ最終試
験における半導体装置の不良品となってその間の全ての
工程が無駄になる。パーティクルによるパターンぼけ
は、前記裏面スクラバにより大幅に減少するが、裏面ス
クラバ後に各種搬送具との接触により裏面の汚染が進行
してパターンぼけは絶滅できないし、裏面スクラバの工
程が経済的ロスとなる。
In the submicron IC process, the reduction projection exposure apparatus has a depth of focus of 1 or less.
It is around μm. In the step of transferring a fine pattern by the reduction projection exposure apparatus after the resist coating step, when the semiconductor wafer 1 having fine particles attached to it is placed on the stage of the exposure apparatus, the thin semiconductor wafer 1 on the stage Is partially raised by particles, and as shown in FIG. 5, a good reticle 1 g
In addition, a reticle 1b with a defocused pattern is generated around the particles. The fine particles on the back surface of the semiconductor wafer 1 may be left on the stage, which causes the same pattern defect in many semiconductor wafers 1 in continuous processing. Even if this pattern defect is found in the inspection, it takes time and effort to wash and regenerate the stage by stopping the transfer process, and if it is not found in the inspection, it becomes a defective semiconductor device in the final test and all the processes in the meantime are wasted. become. Pattern blurring due to particles is greatly reduced by the backside scrubber, but contamination of the backside progresses due to contact with various transport tools after the backside scrubber and the pattern blurring cannot be extinguished, and the backside scrubber process becomes an economic loss. ..

【0004】この発明の目的は、露光装置によるパター
ンの転写工程に、パターンぼけの原因となる半導体ウェ
ハの裏面の微小パーティクルが持ち込まれることを防止
できる半導体ウェハのレジスト塗布方法及び吸着治具を
提供することにある。
An object of the present invention is to provide a semiconductor wafer resist coating method and a suction jig which can prevent fine particles on the back surface of a semiconductor wafer, which cause pattern blurring, from being brought into a pattern transfer process by an exposure apparatus. To do.

【0005】[0005]

【課題を解決するための手段】この発明の半導体ウェハ
のレジスト塗布方法は、下向きカップ状の上の吸着治具
と上向きカップ状の下の吸着治具とを向かい合わせた間
に半導体ウェハを配置し、始めに前記下の吸着治具に保
持される前記半導体ウェハの表面全面にレジスト塗布を
行い、次に前記半導体ウェハを前記上の吸着治具に保持
変えして前記半導体ウェハの裏面全面に洗浄処理を施し
て主工程とするものである。このとき、前記レジスト塗
布の工程と前記洗浄処理の工程との間に、前記下の吸着
治具に保持される前記半導体ウェハの表面周縁にレジス
ト除去処理の工程を介入させたり、前記の主工程の前
に、メカニカル搬送具に載せられて搬入される前記半導
体ウェハを前記上の吸着治具に保持させて前記メカニカ
ル搬送具を退去させてから前記半導体ウェハを下の吸着
治具に保持変えする工程を置き、前記の主工程の後に、
前記半導体ウェハをメカニカル搬送具に載せて搬出する
工程を置いたりするものである。
According to the method for applying a resist on a semiconductor wafer of the present invention, a semiconductor wafer is arranged between a downward cup-shaped upper suction jig and an upward cup-shaped lower suction jig. First, resist is coated on the entire front surface of the semiconductor wafer held by the lower suction jig, and then the semiconductor wafer is held by the upper suction jig and changed to the entire back surface of the semiconductor wafer. The main process is a cleaning process. At this time, between the resist coating process and the cleaning process, the resist removing process is intervened in the peripheral edge of the surface of the semiconductor wafer held by the lower suction jig, or the main process is performed. Before the above, the semiconductor wafer carried on the mechanical transport tool is carried by the upper suction jig to withdraw the mechanical transport tool, and then the semiconductor wafer is held by the lower suction jig. Place the process, and after the main process,
There is a step of placing the semiconductor wafer on a mechanical carrier and carrying it out.

【0006】この発明の半導体ウェハの吸着治具は、取
り扱う半導体ウェハの外形と一致する外形を持つカップ
状の吸着治具であって、この吸着治具の周縁端面に真空
源に接続される複数の吸着小穴を備えるものである。こ
のとき、前記半導体ウェハのオリエンテーションフラッ
トに対応する部分は、前記吸着小穴が存在しない凹部を
形成したり、前記吸着小穴が存在しない複数の凹部を形
成したりするものである。
The semiconductor wafer suction jig of the present invention is a cup-shaped suction jig having an outer shape that matches the outer shape of the semiconductor wafer to be handled, and a plurality of vacuum jigs are connected to the peripheral edge surface of the suction jig. It has a suction small hole. At this time, the portion corresponding to the orientation flat of the semiconductor wafer forms a recess in which the suction small holes do not exist, or forms a plurality of recesses in which the suction small holes do not exist.

【0007】[0007]

【作用】図1を参照する。この発明の半導体ウェハのレ
ジスト塗布方法によれば、工程(e)のレジスト塗布後
に初めて、半導体ウェハ1の裏面全面を工程(g)で洗
浄処理し、その後、工程(i)で、メカニカル搬送具9
に半導体ウェハ1を載せてすぐ露光装置のステージに載
置することができる。このため、半導体ウェハ1は他の
各種搬送具に接触する機会がなく、露光装置によるパタ
ーンの転写工程におけるパターンぼけの原因となる半導
体ウェハの裏面の微小パーティクルの持ち込みを防止で
きる。このとき、工程(e)でレジスト塗布のために半
導体ウェハ1を下の吸着治具2dで保持したまま、半導
体ウェハ1の表面周縁にレジスト除去処理の工程を介入
させることができる。そしてこれらの主工程(e)、
(f)及び(g)の前及び後に、工程(a)、(b)、
(c)及び(d)並びに工程(h)及び(i)を置くこ
とにより、半導体ウェハ1はレジスト塗布装置に関して
メカニカル搬送具7及び9により搬入及び搬出されて全
工程が完成する。
Operation: Referring to FIG. According to the semiconductor wafer resist coating method of the present invention, the entire rear surface of the semiconductor wafer 1 is washed in the step (g) for the first time after the resist coating in the step (e), and then in the step (i), the mechanical transfer tool is used. 9
The semiconductor wafer 1 can be immediately placed on the stage of the exposure apparatus. Therefore, the semiconductor wafer 1 does not have a chance to come into contact with other various transport tools, and it is possible to prevent the carry-in of fine particles on the back surface of the semiconductor wafer, which causes pattern blurring in the pattern transfer process by the exposure apparatus. At this time, in the step (e), the resist removing process can be performed on the peripheral edge of the surface of the semiconductor wafer 1 while the semiconductor wafer 1 is held by the lower suction jig 2d for resist coating. And these main steps (e),
Before and after (f) and (g), steps (a), (b),
By placing (c) and (d) and steps (h) and (i), the semiconductor wafer 1 is carried in and carried out by the mechanical carriers 7 and 9 with respect to the resist coating apparatus, and all steps are completed.

【0008】図2(及び3)を参照する。この発明の半
導体ウェハの吸着治具によれば、吸着治具2u、2dは
オリエンテーションフラットを含む半導体ウェハ1の外
形の周縁部分のみと接触するだけとなり、接触によるパ
ーティクルの付着が減少する。特に工程(g)では、工
程(f)でレジスト除去された半導体ウェハ1の表面周
縁のみを吸着するので、吸着治具2uがレジストに接触
してパーティクルを発生させることが全くない。このと
き、レジスト除去を行っても半導体ウェハ1のオリエン
テーションフラット部は、他の規則正しい円弧部より不
規則な形状をしていてレジスト除去が必ずしも完璧では
ないので、吸着治具のオリエンテーションフラットに対
応する部分に凹部を形成すれば、パーティクルの発生と
付着が減少する。他の円弧部にも凹部を形成して接触面
を減らしてパーティクルの発生と付着が減少する。
Please refer to FIG. 2 (and 3). According to the semiconductor wafer suction jig of the present invention, the suction jigs 2u and 2d only come into contact with only the peripheral portion of the outer shape of the semiconductor wafer 1 including the orientation flat, and the adhesion of particles due to the contact is reduced. In particular, in step (g), since only the peripheral edge of the surface of the semiconductor wafer 1 from which the resist has been removed in step (f) is adsorbed, the adsorption jig 2u does not come into contact with the resist and generate particles at all. At this time, even if the resist is removed, the orientation flat portion of the semiconductor wafer 1 has a more irregular shape than other regular arc portions, and the resist removal is not always perfect. Therefore, it corresponds to the orientation flat of the suction jig. By forming a concave portion in the portion, generation and adhesion of particles are reduced. Recesses are also formed in the other arc portions to reduce the contact surface and reduce the generation and adhesion of particles.

【0009】[0009]

【実施例】図1は実施例1の半導体ウェハのレジスト塗
布方法を示す工程図、図2は図1において使用する吸着
治具の斜視図であり、図3は実施例2の吸着治具の斜視
図である。始めに、図2において、上の吸着治具2uと
下の吸着治具2dとは、オリエンテーションフラット
(OF)1aを持つ半導体ウェハ1の外形と一致するよ
うな外形を持ってカップ状をしている。この吸着治具2
u、2dの周縁端面に図示しない真空源に接続される複
数の吸着小穴3(2dには吸着小穴3が図に現れな
い。)を備える。図3に示す実施例2の吸着治具32
は、前記OFに対応する部分に、吸着小穴3が存在しな
い凹部32fを形成し、更に他の部分にも吸着小穴3が
存在しない複数の凹部32zを形成する。
EXAMPLE FIG. 1 is a process diagram showing a resist coating method for a semiconductor wafer of Example 1, FIG. 2 is a perspective view of an adsorption jig used in FIG. 1, and FIG. 3 is an adsorption jig of Example 2. It is a perspective view. First, in FIG. 2, the upper suction jig 2u and the lower suction jig 2d are cup-shaped with an outer shape that matches the outer shape of the semiconductor wafer 1 having an orientation flat (OF) 1a. There is. This suction jig 2
u and 2d are provided with a plurality of suction small holes 3 (the suction small holes 3 do not appear in 2d in FIG. 2) connected to a vacuum source (not shown) on the peripheral edge surfaces. The suction jig 32 of the second embodiment shown in FIG.
Forms a concave portion 32f having no suction small hole 3 in a portion corresponding to the OF, and further forms a plurality of concave portions 32z having no suction small hole 3 in another portion.

【0010】図1に示すレジスト塗布工程は、前記吸着
治具2u(又は32)及び2dを使用する。工程(a)
から(i)までの全9工程において、下向きカップ状の
上の吸着治具2uと上向きカップ状の下の吸着治具2d
とを向かい合わせた間に半導体ウェハ1が位置するよう
にし、両吸着治具は上下動する他、半導体ウェハ1を吸
着して回転可能であり、停止のとき、OF対応部分は向
かい合って同一の位置にくるようにする。
In the resist coating process shown in FIG. 1, the suction jigs 2u (or 32) and 2d are used. Process (a)
In all 9 steps from (i) to (i), the downward cup-shaped upper suction jig 2u and the upward cup-shaped lower suction jig 2d
The semiconductor wafer 1 is positioned between the two facing each other, and both suction jigs move up and down, and the semiconductor wafer 1 can be sucked and rotated. When stopped, the OF corresponding portions face each other and are the same. Try to come to the position.

【0011】始めに、工程(a)で半導体ウェハ1はメ
カニカル搬送具7に載せられて搬入される。工程(b)
で一度、半導体ウェハ1を上の吸着治具2uに保持さ
せ、工程(c)でメカニカル搬送具7を退去させてから
工程(d)で半導体ウェハ1を下の吸着治具2dに保持
変えする。工程(e)で前記下の吸着治具2dに保持さ
れる半導体ウェハ1を回転させながらその中心から表面
全面にレジストノズル4によってレジスト塗布を行う。
次に工程(f)で下の吸着治具2dに保持したままの半
導体ウェハ1の表面の周縁に、溶剤ノズル5で溶剤によ
るレジスト除去処理を行う。その後、工程(g)で半導
体ウェハ1を上の吸着治具2uに保持変えし、下の吸着
治具2dをカバー8で覆って半導体ウェハ1を回転させ
ながらその中心から裏面全面に溶剤、純水などの順に個
別のバックリンスノズル6により洗浄処理を施す。回転
乾燥後、最後に、工程(h)で半導体ウェハ1の下にメ
カニカル搬送具9を導入し、工程(i)で上の吸着治具
2uの吸着を開放し、メカニカル搬送具9に半導体ウェ
ハ1を載せて搬出する。例えば、工程(e)は3000
rpm、工程(g)は500から1000rpmの回転
数がよく、工程(f)のレジスト除去幅が外周3mmなら
吸着治具2uの周縁端面の幅は2mmがよい。
First, in step (a), the semiconductor wafer 1 is loaded on the mechanical carrier 7. Process (b)
Then, the semiconductor wafer 1 is once held by the upper suction jig 2u, the mechanical carrier 7 is withdrawn in the step (c), and then the semiconductor wafer 1 is held and changed by the lower suction jig 2d in the step (d). .. In step (e), while the semiconductor wafer 1 held by the lower suction jig 2d is rotated, resist coating is performed from the center of the semiconductor wafer 1 to the entire surface by the resist nozzle 4.
Next, in step (f), a resist removal process using a solvent is performed by a solvent nozzle 5 on the peripheral edge of the surface of the semiconductor wafer 1 which is still held by the lower suction jig 2d. Then, in step (g), the semiconductor wafer 1 is held and changed to the upper suction jig 2u, the lower suction jig 2d is covered with the cover 8, and the semiconductor wafer 1 is rotated from the center to the entire surface of the back surface with a solvent, pure solvent. A back rinse nozzle 6 is used for cleaning in order of water or the like. After the spin drying, finally, in step (h), the mechanical transfer tool 9 is introduced under the semiconductor wafer 1, and in step (i), the suction of the upper suction jig 2u is released, and the mechanical transfer tool 9 receives the semiconductor wafer. Place 1 and carry it out. For example, the step (e) is 3000
In the step (g), the number of revolutions is preferably 500 to 1000 rpm, and if the resist removal width in the step (f) is 3 mm in the outer circumference, the width of the peripheral edge surface of the suction jig 2u is preferably 2 mm.

【0012】このような実施例のレジスト塗布方法によ
れば、工程(e)のレジスト塗布後に初めて、半導体ウ
ェハ1の裏面全面を工程(g)で洗浄処理し、その後、
工程(i)で、メカニカル搬送具9に半導体ウェハ1を
載せてすぐ露光装置のステージに載置することができ
る。このため、半導体ウェハ1は他の各種搬送具に接触
する機会がなく、露光装置によるパターンの転写工程に
おけるパターンぼけの原因となる半導体ウェハの裏面の
微小パーティクルの持ち込みを防止できる。このとき、
レジスト塗布のために半導体ウェハ1を下の吸着治具2
dで保持したまま、半導体ウェハ1の表面周縁にレジス
ト除去処理の工程を介入させることができる。そしてこ
れらの主工程(e)、(f)及び(g)の前及び後に、
工程(a)、(b)、(c)及び(d)並びに工程
(h)及び(i)を置くことにより、半導体ウェハ1は
レジスト塗布装置に関してメカニカル搬送具7及び9に
より搬入及び搬出されて全工程が完成する。
According to the resist coating method of this embodiment, the entire back surface of the semiconductor wafer 1 is washed in the step (g) for the first time after the resist coating in the step (e), and then,
In step (i), the semiconductor wafer 1 can be placed on the mechanical carrier 9 and immediately placed on the stage of the exposure apparatus. Therefore, the semiconductor wafer 1 does not have a chance to come into contact with other various transport tools, and it is possible to prevent the carry-in of fine particles on the back surface of the semiconductor wafer, which causes pattern blurring in the pattern transfer process by the exposure apparatus. At this time,
The semiconductor wafer 1 is placed under the suction jig 2 for resist application.
While being held at d, the step of resist removal processing can be intervened on the peripheral edge of the surface of the semiconductor wafer 1. And before and after these main steps (e), (f) and (g),
By placing the steps (a), (b), (c) and (d) and the steps (h) and (i), the semiconductor wafer 1 is loaded and unloaded by the mechanical transport tools 7 and 9 with respect to the resist coating apparatus. All processes are completed.

【0013】またこのような実施例のカップ状の吸着治
具によれば、吸着治具2u、2dはオリエンテーション
フラットを含む半導体ウェハ1の外形の周縁部分のみと
接触するだけとなり、接触によるパーティクルの付着が
減少する。特に工程(g)では、工程(f)でレジスト
除去された半導体ウェハ1の表面周縁のみを吸着するの
で、吸着治具2uがレジストに接触してパーティクルを
発生させることが全くない。このとき、レジスト除去を
行っても半導体ウェハ1のオリエンテーションフラット
部は、他の規則正しい円弧部より不規則な形状をしてい
てレジスト除去が必ずしも完璧ではないので、吸着治具
のオリエンテーションフラットに対応する部分に凹部を
形成すれば、パーティクルの発生と付着が減少する。他
の円弧部にも凹部を形成して接触面を減らしてパーティ
クルの発生と付着が減少する。
Further, according to the cup-shaped suction jig of such an embodiment, the suction jigs 2u, 2d only come into contact with only the peripheral edge portion of the outer shape of the semiconductor wafer 1 including the orientation flat, and the particles due to the contact are generated. Adhesion is reduced. In particular, in step (g), since only the peripheral edge of the surface of the semiconductor wafer 1 from which the resist has been removed in step (f) is adsorbed, the adsorption jig 2u does not come into contact with the resist and generate particles at all. At this time, even if the resist is removed, the orientation flat portion of the semiconductor wafer 1 has a more irregular shape than other regular arc portions, and the resist removal is not always perfect. Therefore, it corresponds to the orientation flat of the suction jig. By forming a concave portion in the portion, generation and adhesion of particles are reduced. Recesses are also formed in the other arc portions to reduce the contact surface and reduce the generation and adhesion of particles.

【0014】[0014]

【発明の効果】この発明の半導体ウェハのレジスト塗布
方法によれば、レジスト塗布後に初めて半導体ウェハの
裏面全面を洗浄処理した直後に、半導体ウェハをメカニ
カル搬送具で露光装置のステージに載置することができ
る。このため、半導体ウェハは他の各種搬送具に接触す
る機会がなく、露光装置によるパターンの転写工程にお
けるパターンぼけの原因となる半導体ウェハの裏面の微
小パーティクルの持ち込みを防止できるという効果があ
り、半導体装置の不良率が減少し、ステージの洗浄再生
の手間が減ってレジスト塗布装置と露光装置とを接続し
ていわゆるインライン化が実現できるという効果があ
る。このとき、表面周縁にレジスト除去処理の工程を介
入させたり、搬入及び搬出されて全工程が完成する。
According to the semiconductor wafer resist coating method of the present invention, the semiconductor wafer is mounted on the stage of the exposure apparatus by the mechanical transfer tool immediately after the entire back surface of the semiconductor wafer is cleaned after the resist coating. You can Therefore, the semiconductor wafer has no opportunity to come into contact with other various transport tools, and there is an effect that it is possible to prevent carry-in of fine particles on the back surface of the semiconductor wafer, which causes pattern blurring in the pattern transfer process by the exposure apparatus. There is an effect that the defective rate of the apparatus is reduced, the labor for cleaning and reproducing the stage is reduced, and so-called in-line can be realized by connecting the resist coating apparatus and the exposure apparatus. At this time, all the steps are completed by interposing a resist removal process on the peripheral edge of the surface or carrying in and out.

【0015】この発明の半導体ウェハの吸着治具によれ
ば、吸着治具は半導体ウェハの外形の周縁部分のみと接
触するだけとなり、接触によるパーティクルの付着が減
少するという効果がある。特に裏面全面を洗浄処理する
工程では、レジスト除去された半導体ウェハの表面周縁
のみを吸着するので、吸着治具がレジストに接触してパ
ーティクルを発生させることが全くない。このとき、吸
着治具のオリエンテーションフラットに対応する部分や
他の円弧部に凹部を形成して接触面を減らしてパーティ
クルの発生と付着が減少するという効果がある。
According to the semiconductor wafer suction jig of the present invention, the suction jig only comes into contact with only the peripheral portion of the outer shape of the semiconductor wafer, which has the effect of reducing the adhesion of particles due to the contact. In particular, in the step of cleaning the entire back surface, only the peripheral edge of the front surface of the semiconductor wafer from which the resist has been removed is adsorbed, so that the adsorption jig does not contact the resist and generate particles at all. At this time, there is an effect that a concave portion is formed in a portion corresponding to the orientation flat of the suction jig or another circular arc portion to reduce a contact surface, thereby reducing generation and adhesion of particles.

【図面の簡単な説明】[Brief description of drawings]

【図1】実施例1の半導体ウェハのレジスト塗布方法を
示す工程図
FIG. 1 is a process diagram showing a method for applying a resist on a semiconductor wafer according to a first embodiment.

【図2】図1において使用する吸着治具の斜視図FIG. 2 is a perspective view of a suction jig used in FIG.

【図3】実施例2の吸着治具の斜視図FIG. 3 is a perspective view of a suction jig according to a second embodiment.

【図4】従来例の半導体ウェハのレジスト塗布方法及び
吸着治具を示す斜視図
FIG. 4 is a perspective view showing a conventional semiconductor wafer resist coating method and a suction jig.

【図5】図4により製造された半導体ウェハの平面図FIG. 5 is a plan view of the semiconductor wafer manufactured according to FIG.

【符号の説明】[Explanation of symbols]

1 半導体ウェハ 1a オリエンテーションフラット 1b レチクル 1g レチクル 2u 吸着治具 2d 吸着治具 3 吸着小穴 4 レジストノズル 5 溶剤ノズル 6 バックリンスノズル 7 メカニカル搬送具 8 カバー 9 メカニカル搬送具 32 吸着治具 32f 凹部 32z 凹部 42 吸着治具 43 吸着小穴 46 リンスノズル 1 semiconductor wafer 1a orientation flat 1b reticle 1g reticle 2u suction jig 2d suction jig 3 suction small hole 4 resist nozzle 5 solvent nozzle 6 back rinse nozzle 7 mechanical transport tool 8 cover 9 mechanical transport tool 32 suction jig 32f recess 32z recess 42 Adsorption jig 43 Adsorption small hole 46 Rinse nozzle

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】下向きカップ状の上の吸着治具と上向きカ
ップ状の下の吸着治具とを向かい合わせた間に半導体ウ
ェハを配置し、始めに前記下の吸着治具に保持される前
記半導体ウェハの表面全面にレジスト塗布を行い、次に
前記半導体ウェハを前記上の吸着治具に保持変えして前
記半導体ウェハの裏面全面に洗浄処理を施して主工程と
することを特徴とする半導体ウェハのレジスト塗布方
法。
1. A semiconductor wafer is placed between a lower cup-shaped upper suction jig and an upper cup-shaped lower suction jig, and the semiconductor wafer is first held by the lower suction jig. A resist is applied to the entire front surface of the semiconductor wafer, and then the semiconductor wafer is held and changed to the upper suction jig, and the entire back surface of the semiconductor wafer is subjected to a cleaning process, which is a main process. Wafer resist coating method.
【請求項2】請求項1記載の半導体ウェハのレジスト塗
布方法において、前記レジスト塗布の工程と前記洗浄処
理の工程との間に、前記下の吸着治具に保持される前記
半導体ウェハの表面周縁にレジスト除去処理の工程を介
入させて主工程とすることを特徴とする半導体ウェハの
レジスト塗布方法。
2. The semiconductor wafer resist coating method according to claim 1, wherein a surface peripheral edge of the semiconductor wafer held by the lower suction jig is provided between the resist coating step and the cleaning step. A resist coating method for a semiconductor wafer, wherein the main step is to intervene the step of resist removal processing.
【請求項3】請求項1又は2記載の半導体ウェハのレジ
スト塗布方法において、前記の主工程の前に、メカニカ
ル搬送具に載せられて搬入される前記半導体ウェハを前
記上の吸着治具に保持させて前記メカニカル搬送具を退
去させてから前記半導体ウェハを下の吸着治具に保持変
えする工程を置き、前記の主工程の後に、前記半導体ウ
ェハをメカニカル搬送具に載せて搬出する工程を置くこ
とを特徴とする半導体ウェハのレジスト塗布方法。
3. The method of applying a resist to a semiconductor wafer according to claim 1, wherein before the main step, the semiconductor wafer carried on a mechanical carrier is held by the upper suction jig. Then, a step of holding the semiconductor wafer on the lower suction jig after changing the mechanical carrier is removed, and after the main step, a step of placing the semiconductor wafer on the mechanical carrier and carrying it out is placed. A method for applying a resist to a semiconductor wafer, comprising:
【請求項4】取り扱う半導体ウェハの外形と一致する外
形を持つカップ状の吸着治具であって、この吸着治具の
周縁端面に真空源に接続される複数の吸着小穴を備える
ことを特徴とする半導体ウェハの吸着治具。
4. A cup-shaped suction jig having an outer shape that matches the outer shape of a semiconductor wafer to be handled, characterized in that a plurality of suction small holes connected to a vacuum source are provided on the peripheral end surface of the suction jig. A semiconductor wafer suction jig.
【請求項5】請求項4記載の半導体ウェハの吸着治具に
おいて、前記半導体ウェハのオリエンテーションフラッ
トに対応する部分は、前記吸着小穴が存在しない凹部を
形成することを特徴とする半導体ウェハの吸着治具。
5. The suction jig for a semiconductor wafer according to claim 4, wherein the portion corresponding to the orientation flat of the semiconductor wafer forms a recess in which the suction small hole does not exist. Ingredient
【請求項6】請求項4又は5記載の半導体ウェハの吸着
治具において、前記吸着小穴が存在しない複数の凹部を
形成することを特徴とする半導体ウェハの吸着治具。
6. The suction jig for a semiconductor wafer according to claim 4, wherein a plurality of recesses in which the suction small holes are not present are formed.
JP4105008A 1992-04-24 1992-04-24 Resist coating method for semiconductor wafer and suction jig Pending JPH05299332A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4105008A JPH05299332A (en) 1992-04-24 1992-04-24 Resist coating method for semiconductor wafer and suction jig

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4105008A JPH05299332A (en) 1992-04-24 1992-04-24 Resist coating method for semiconductor wafer and suction jig

Publications (1)

Publication Number Publication Date
JPH05299332A true JPH05299332A (en) 1993-11-12

Family

ID=14396050

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4105008A Pending JPH05299332A (en) 1992-04-24 1992-04-24 Resist coating method for semiconductor wafer and suction jig

Country Status (1)

Country Link
JP (1) JPH05299332A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001168011A (en) * 1999-12-09 2001-06-22 Dainippon Screen Mfg Co Ltd Thin film forming equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001168011A (en) * 1999-12-09 2001-06-22 Dainippon Screen Mfg Co Ltd Thin film forming equipment

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