JPH05299563A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

(57) [Abstract] [PROBLEMS] To provide a semiconductor device including a surface-mounting resin-sealed package that can effectively utilize the lower surface region of the package, and a method for manufacturing the same. [Structure] Pellets 12, tabs 4A, inner leads 8
In a semiconductor device including a resin-sealed package 14 for resin-sealing the A, 8B, and 8C groups and the wires 13 group, the inner leads 8A, 8B, and 8C groups are insulated from each other, and the tip of each step is The semiconductor pellets are formed by stacking the portions 9A, 9B, 9C in a stepwise manner in a state of being offset in the radial direction, and by bonding one end of the wire 13 to these tip portions 9A, 9B, 9C. On the other hand, each of the outer leads 6A, 6B, and 6C that are electrically connected to the inner leads are arranged in a matrix form on the mounting surface of the resin-sealed package 14 and have a substantially same mounting surface. It is exposed so that it is on the same plane.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing technique of a semiconductor device, and more particularly to a manufacturing technique of a semiconductor device having a surface mount type package, for example, to a device effectively used for a semiconductor integrated circuit device.

[0002]

2. Description of the Related Art Generally, as a package form of a semiconductor integrated circuit device (hereinafter referred to as an IC) having a large number of pins, a ceramic pin grid array package (hereinafter referred to as PGA) or a plastic is used.・ Quad flat package (hereinafter referred to as QFP)
Is widely known.

As an example of mentioning PGA.IC and QFP.IC, there is "Separate Volume Micro Devices No. 2" issued by Nikkei McGraw-Hill, June 11, 1984, P148-P154.

[0004]

[Problems to be Solved by the Invention] However, PGA / IC
Is expensive, and is an insert type,
There is a problem that mounting workability is poor.

On the other hand, in an IC having a surface mount type resin-sealed package represented by QFP IC,
There is a problem that a region of the mounting substrate facing the lower surface of the resin-sealed package is wasted.

An object of the present invention is to provide a semiconductor device having a surface mount type resin-sealed package which can effectively utilize the lower surface region of the package, and a method for manufacturing the same.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0008]

The typical ones of the inventions disclosed in the present application will be outlined below.

That is, a semiconductor pellet having an electronic circuit formed therein, a tab to which the semiconductor pellet is bonded, a plurality of inner leads radially arranged around the tab, each inner lead and the semiconductor pellet. A wire group bridging each other with an outer lead group integrally connected to each inner lead, and a resin seal for sealing the semiconductor pellet, the tab, the inner lead group and the wire group with a resin. In a semiconductor device having a stop package, the inner lead groups are stacked in a stepwise manner with the inner lead groups insulated from each other, and the tips of the respective steps being radially offset. By bonding one end of the wire to the tip, it is electrically connected to the semiconductor pellet, while the other, Each Utarido is one main surface thereof is arranged in a matrix in one main surface of the resin-sealed package, characterized in that it is exposed to be a main surface substantially the same plane.

[0010]

According to the above-mentioned means, since the outer lead group is exposed on the one main surface of the resin-sealed package,
Surface mounting is possible.

Moreover, since the outer lead groups are arranged in a matrix on one main surface of the resin-sealed package, the one main surface of the resin-sealed package is sufficiently effectively utilized. That is, the area of the mounting substrate facing the mounting surface of the resin-sealed package can be utilized.

Since the resin-sealed package is used, the manufacturing cost can be sufficiently reduced as compared with PGA.

[0013]

1 is a front sectional view showing a mounted state of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a partially omitted perspective view showing the semiconductor device as viewed from the back side. 3 and subsequent drawings are explanatory views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention.

In the present embodiment, the semiconductor device according to the present invention is configured as a semiconductor integrated circuit device (hereinafter, simply referred to as a semiconductor device) 15 including a surface mount type package in which outer leads do not project from the side surface to the outside. Has been done.

This semiconductor device 15 includes a semiconductor pellet 12 in which an electronic circuit is built, and a semiconductor pellet 12
4A to which is bonded, and a plurality of inner leads 8 radially arranged around the tab 4A.
A, 8B, 8C, a group of wires 13 bridging between the inner leads 8A, 8B, 8C and the semiconductor pellet 12, and the inner leads 8A, 8B, 8C are integrally connected to each other. Outer leads 6A, 6B,
6C group, the semiconductor pellet 12, the inner lead 8
A resin-sealed package 14 for resin-sealing the A, 8B, and 8C groups and the wire 13 group.

The inner leads 8A, 8B, 8C are stacked in a stepwise manner in a state where they are insulated from each other and the tips of the respective steps are displaced in the radial direction.
Bonding areas 9A, 9 formed on these tips
One ends of the wires 13 are bonded to B and 9C, respectively, so that they are electrically connected to the semiconductor pellet 12.

Further, slits S are formed in the rising portions of the inner leads 8A, 8B, 8C so as to be long in the longitudinal direction, and each slit S is filled with the resin of the resin sealing package 14. ing. The inner leads 8A, 8B, and 8C are firmly integrated with the substantial portion (body) of the resin-sealed package 14 by this filling portion.

Further, the width W1 in the circumferential direction of the first inner lead 8A arranged in the central portion of the resin-sealed package 14.
Is formed to be narrower than the width W2 of the second inner lead 8B outside thereof, and the width W2 of the second inner lead 8B is
It is formed narrower than the width W3 of the third inner lead 8C on the outside thereof. Therefore, the air gap between the inner leads adjacent to each of the inner leads 8A, 8B, 8C is set wider toward the inner side.

On the other hand, the outer leads 6A, 6B, 6C
The bottom surface of each of the
Are arranged in a matrix on the lower surface of the substrate and are exposed so as to be substantially flush with the lower surface.

The semiconductor device 15 having the above structure is manufactured by the following manufacturing method.

A method of manufacturing a semiconductor device according to an embodiment of the present invention will be described below. From this description, the details of the configuration of the semiconductor device 15 will be clarified together.

This semiconductor device manufacturing method is described in FIG.
Lead frame assembly 1 shown in (a) and (b)
Is used. The lead frame assembly 1 includes three lead frames 2A, 2B and 2C. These 3
Since the lead frames 2A, 2B and 2C are formed in substantially similar shapes, the first lead frame 2
The configuration will be described with A as a representative example.

That is, the lead frame 2A has an outer frame 3A formed in a substantially square frame shape.
In A, a tab 4A formed in a substantially square plate shape is arranged in a substantially central portion, and the outer frame 3 is provided via a tab suspension lead 5A.
It is suspended by being lifted by a predetermined height in one direction (hereinafter, referred to as “upward direction”) from A.

The outer frame 3A has a plurality of outer leads 6A,
The outer leads 6A are provided so as to project inward in the radial direction, and the outer leads 6A are provided so as to be parallel to each other so as to project at right angles to the outer frame 3A. A preliminary cutting portion 7A is arranged on the upper surface of each outer lead 6A at a position corresponding to a cutting position described later and is cut into a V-shaped groove.

An inner lead 8A is provided on each outer lead 6A.
Are continuously connected to the inner tip,
Each inner lead 8A is bent vertically inward in the radial direction after the middle portion thereof is raised substantially vertically. The inner leads 8A are arranged in close proximity to each other on the four sides of the tab 4A, and the bonding area 9A is substantially constituted by the tip portion thereof.

At the rising portion of each inner lead 8A, an elongated slit S is provided so as to be long in the longitudinal direction (vertical direction), and this slit S connects the inner and outer sides of the inner lead 8A in the radial direction. Is becoming

No tabs are formed on the second lead frame 2B. The second lead frame 2B is the first
The lead frame 2A is concentrically arranged on the lead frame 2A and is bonded thereto via the first insulating layer 10A. In this state, the tip end portions of the inner leads 8B of the second lead frame 2B are receded radially outward of the inner leads 8A of the first lead frame 2A, whereby the bonding area 9A of the first lead frame 2A is Exposed.

No tabs are formed on the third lead frame 2C either. The third lead frame 2C is the second
The lead frame 2B is concentrically arranged on the lead frame 2B and is adhered thereto via the second insulating layer 10B. In this state, the tip portions of the inner leads 8C of the third lead frame 2C are receded radially outward of the inner leads 8B of the second lead frame 2B, whereby the bonding area 9B of the second lead frame 2B is Exposed.

Then, the inner leads of the first lead frame 2A (hereinafter sometimes referred to as the first inner leads).
A circumferential width W1 of 8A is formed to be narrower than a circumferential width W2 of an inner lead (hereinafter, also referred to as a second inner lead) 8B of the second lead frame 2B arranged outside thereof. Has been done. The width W2 of the second inner lead 8B is smaller than the circumferential width W3 of the inner lead (hereinafter also referred to as the third inner lead) 8C of the third lead frame 2C arranged outside thereof. Is formed.

Further, in a state where the first lead frame 2A, the second lead frame 2B and the third lead frame 2C are laminated, the outer frames 3A, 3B and 3C of the respective lead frames 2A, 2B and 2C are the outer leads 6A,
It is in a state of being laminated outside 6B and 6C. The outer frames 3A, 3B, and 3C substantially form a dam for damming the resin at the time of molding a resin-sealed package, which will be described later.

The lead frame assembly 1 assembled as described above is subjected to pellet bonding and wire bonding in the pellet bonding process and the wire bonding process (see FIG. 3).

First, in the pellet bonding process, the pellet 12 in which the integrated circuit is formed in the so-called semiconductor pre-process is the tab 4A of the lead frame assembly 1.
They are concentrically arranged on the upper side and bonded and bonded by a bonding layer 11 made of Ag paste or the like.

Next, in the wire bonding step, the wire 13 is provided between each inner lead 8A, 8B, 8C of the lead frame assembly 1 and the pellet 12, and both ends thereof are bonded to the inner lead 8A, 8B, 8C bonding area. 9A, 9B, 9C and the bonding pads of the pellet 12 are bonded and bridged.
As a result, the integrated circuit built in the pellet 12
Bonding pad, wire 13, inner lead 8A,
8B, 8C and outer leads 6A, 6B, 6C are electrically led to the outside.

Here, each inner lead 8A, 8B, 8C
The widths W1, W2, and W3 are set so that the relationship of W1 <W2 <W3 is satisfied, so that the air gap of the first inner lead 8A is sufficiently secured, so that the wire bonding work is facilitated. It can be carried out.

Thereafter, the lead frame assembly 1 is resin-molded with the resin-sealed package 14 by using the transfer molding device 20 as shown in FIG.

The molding apparatus 20 shown in FIG.
1 and a lower mold 22. A cavity 23 is formed in cooperation with the mating surface of the upper mold 21 and the lower mold 22. A gate 24 is formed on the mating surface of the upper mold 21 so as to communicate with the cavity 23.
4 is open to a runner 25 which is fluidly connected to a pot (not shown).

When the resin-sealed package 14 is molded, the lead frame assembly 1 which is pellet-bonded and wire-bonded is placed on the lower die 22 and the outer leads 6A,
The groups 6B and 6C and the outer frames 3A, 3B, and 3C are placed so as to come into contact with the lower surfaces.

Then, when the upper die 21 and the lower die 22 are clamped, the outer frames 3A, 3B, 3 of the lead frame assembly 1 are closed.
C is sandwiched between the upper mold 21 and the lower mold 22, and the pellet 12, the tab 4, the group of inner leads 8 and the group of wires 13 are sealed in the cavity 23.

Next, when a resin (hereinafter, referred to as a resin) 26 as a molding material is filled in the cavity 23 through the runner 25 and the gate 24 and thermally cured,
The resin-sealed package 14 is molded. At this time, since the lower surface of each outer lead 6A, 6B, 6C is in contact with the lower mold 22, the lower surface of each outer lead 6A, 6B, 6C is exposed without being covered with resin.

Since each inner lead 8A, 8B, 8C has a slit S, the gate 2
The resin 26 injected from 4 into the cavity 23 flows through the slits S and is thereby uniformly filled in the cavity 23.

Further, since the resin 26 that is uniformly filled in the cavity 23 is hardened by heat and then bites into the inner leads 8A, 8B, 8C in the slit S, each inner lead is the substance of the resin-sealed package 14. Firmly integrated with the body (body).

After that, the upper mold 21 and the lower mold 22 are opened, and the resin-sealed package 14 becomes the upper mold 21 and the lower mold 22.
Released from.

As described above, the resin-sealed package 14
The lead frame assembly 1 in which the
B, 3C and the outer leads 6A, 6B, 6C are separated. At this time, the preliminary cutting portion 7A, at the boundary between each outer frame 3A, 3B, 3C and each outer lead 6A, 6B, 6C,
Since 7B and 7C are cut respectively, the outer frame 3
By pulling A, 3B, 3C and the resin-sealed package 14 in opposite directions, the outer frames 3A, 3B, 3C and the outer leads 6A, 6B, 6C group are precut portions 7A, 7C.
In B and 7C, they can be easily and properly separated.

In this way, the lead frame assembly 1
Outer frames 3A, 3B, 3C and outer leads 6A, 6B, 6
When the group C is separated, the semiconductor device 15 shown in FIGS. 1 and 2 is manufactured.

Next, manufactured as described above, and
A method of using the configured semiconductor device 15 and its operation will be described.

As shown in FIGS. 1 and 2, in the semiconductor device 15, the outer leads 6A, 6B, and 6C are arranged in a matrix on the lower surface of the resin-sealed package 14 and exposed. It can be surface-mounted on the printed wiring board 30.

That is, on the surface of the printed wiring board 30 on which the semiconductor device 15 is surface-mounted, a plurality of lands 31 are arranged in a matrix corresponding to the groups of outer leads 6A, 6B, 6C, and each outer lead 6A. ,
Each of them is formed in a small piece shape substantially the same as the shape of 6B and 6C, and a desired electric wiring (not shown) is electrically connected to this land 31. Further, the surface of the land 31 is appropriately preliminarily soldered (not shown) with a cream solder material or the like.

When the semiconductor device 15 is surface-mounted on the printed wiring board 30, the outer leads 6 are formed.
The semiconductor device 15 is placed and positioned on the printed wiring board 30 with A, 6B, and 6C aligned with each land 31.

When the reflow soldering process is performed between the printed wiring board 31 and the semiconductor device 15 in this state, the soldering layer 32 is provided between the contact surfaces of the outer leads 6A, 6B, 6C and the lands 31. Is formed. The soldering layer 32 electrically connects the outer leads 6A, 6B, 6C and the land 31 and also mechanically connects the semiconductor device 15 and the printed wiring board 30.

Here, since the width W3 of the third inner lead 3C is set to be large, an increase in electric resistance loss due to the third inner lead 3C being separated from the bonding pad of the pellet 12 is compensated. be able to.

According to the above embodiment, the following effects can be obtained. Since the outer leads 6A, 6B, 6C are exposed on the lower surface of the resin-sealed package 14, the semiconductor device 15 can be surface-mounted on the printed wiring board 30.

Since the outer leads 6 A, 6 B, and 6 C are arranged in a matrix on the lower surface of the resin-sealed package 14, the lower surface of the resin-sealed package 14 can be sufficiently and effectively utilized. That is, the region of the printed wiring board 30 that faces the lower surface of the resin seal 14 can be utilized.

As described above, the workability of mounting the semiconductor device can be improved and the mounting density of the printed wiring board 30 can be increased as compared with the mounting method by insertion.

Since the resin-sealed package 14 is used, the manufacturing cost can be sufficiently reduced as compared with PGA.

Since the slit S is formed in each inner lead 8 A, 8 B, 8 C, the resin-sealed package 1
The flow of the resin 26 at the time of molding No. 4 can be made smooth. Further, since the resin 26 of the resin-sealed package 14 can be made to stick to the slit S, the inner leads 8A, 8B, 8C can be firmly fixed.

The first, second and third inner leads 8A,
The relationship between the widths W1, W2 and W3 of 8B and 8C is W1 <W2
Since the relationship of <W3 is set, the air gap of the first inner lead 8A can be sufficiently secured and the electric resistance of the third inner lead 8C can be suppressed.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, the outer frame 3 group and the outer leads 6A, 6
Separation between the B and 6C groups is performed by separating the outer frames 3A, 3B,
Preliminary cutting portions 7A, 7B, 7C are cut at the boundaries between 3C and the outer leads 6A, 6B, 6C, and the outer frame 3A,
By pulling 3B and 3C and the resin-sealed package 14 in opposite directions, the outer frames 3A, 3B and 3C and the outer leads 6A, 6B and 6C groups are precut parts 7A and 7B.
7C is not limited to the separate execution, but the outer frames 3A, 3
It may be performed by cutting the B and 3C portions by cutting or the like.

The slits of the inner leads 8A, 8B, 8C may be omitted.

Further, the first, second and third inner leads 8
The widths W1, W2, W3 of A, 8B, 8C are W1 <W2 <
Not limited to W3, W1 = W2 = W3, or
You may set W1>W2> W3.

The number of the inner leads and the outer leads, the number of steps, the structure, etc. are not limited to those in the above embodiment, but it is desirable to appropriately select them in accordance with the size, structure, etc. of the semiconductor device.

In the above description, the manufacturing technology of the IC in which the outer leads are arranged on the four sides of the square lower surface of the resin-sealed package, which is the field of application which is the background of the invention made mainly by the present inventor, has been described. However, the present invention is not limited to this, and can be applied to all manufacturing techniques of semiconductor devices such as ICs in which outer leads are arranged on two sides of the rectangular lower surface of the resin-sealed package. In particular, the present invention has a large number of pins and can be applied to an IC that requires a low price, and an excellent effect can be obtained.

[0063]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.

By arranging and exposing the outer lead groups on the lower surface of the resin-sealed package in a matrix, the outer lead group can be surface-mounted on the printed wiring board and the area of the printed wiring board facing the lower surface of the resin-sealed package. Can be effectively used, and the packaging density can be increased.

Further, the workability of mounting can be improved as compared with the mounting method by insertion, and the use of the resin-sealed package can sufficiently reduce the manufacturing cost as compared with PGA.

[Brief description of drawings]

FIG. 1 is a front sectional view showing a mounted state of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a partially omitted perspective view showing a semiconductor device as viewed from the back side.

3A is a partially omitted plan view showing a lead frame assembly used in a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 3B is an enlarged partial perspective view thereof.

FIG. 4 is a front sectional view showing a resin encapsulation molding step in the method for manufacturing a semiconductor device according to an embodiment of the present invention.

[Explanation of symbols]

1 ... Lead frame assembly 2A, 2B, 2C ... Lead frame, 3A, 3B, 3C ... Outer frame, 4A ... Tab, 5A
… Tab suspension leads, 6A, 6B, 6C… Outer leads,
7A, 7B, 7C ... Preliminary cutting portion, 8A, 8B, 8C ... Inner lead, 9A, 9B, 9C ... Bonding area,
10A, 10B ... Insulating layer, 11 ... Bonding layer, 12
... Pellet, 13 ... Wire, 14 ... Resin-sealed package, 15 ... Semiconductor device, 20 ... Molding device, 21 ... Upper mold,
22 ... Lower mold, 23 ... Cavity, 24 ... Gate, 25
… Runners, 30… Printed wiring boards, 31… Lands, 3
2 ... Soldering layer, S ... Slit, W1, W2, W3 ...
Inner lead width.

Claims (6)

[Claims] 1. A semiconductor pellet having an electronic circuit built therein, a tab to which the semiconductor pellet is bonded, a plurality of inner leads radially arranged around the tab, each inner lead and a semiconductor pellet. A wire group bridging each other with an outer lead group integrally connected to each inner lead, and a resin seal for sealing the semiconductor pellet, the tab, the inner lead group and the wire group with a resin. In a semiconductor device having a stop package, the inner lead groups are insulated from each other, and
The tips of the steps are laminated in a stepwise manner with the tips being radially offset, and one ends of the wires are bonded to these tips to be electrically connected to the semiconductor pellet. On the other hand, on the other hand, each of the outer leads is exposed so that one main surface thereof is arranged in a matrix on one main surface of the resin-sealed package and is substantially flush with the main surface. Semiconductor device. 2. The semiconductor device according to claim 1, wherein a slit is provided in at least a part of each inner lead arranged in the peripheral portion of the resin-sealed package in the inner lead group. 3. The inner lead group is formed such that the width of the inner lead group arranged on the center side of the resin-sealed package is smaller than the width of the inner lead group arranged on the peripheral side thereof. Claim 1 characterized in that
The semiconductor device according to. 4. The method of manufacturing a semiconductor device according to claim 1, wherein a step of preparing a plurality of lead frames having substantially similar shapes to each other, and these lead frames, In such a manner that the outer leads are stacked in a stepwise manner with the tips of the respective steps being offset in the radial direction, and the main surface of each of the outer leads is a resin-sealed package. The steps of arranging them in a matrix on the main surface and combining them so that they are substantially flush with the main surface, and the step of bonding the semiconductor pellets to the tabs of one lead frame of the lead frame group, A step of bonding wires between the inner leads and the semiconductor pellets, and a combined lead frame group are formed on the molding die by the outer lead groups. The step of molding the resin-sealed package in a state where the main surface is exposed from the cavity, and the outer frame portion outside the outer lead group from the lead frame group in which the resin-sealed package is molded. A method of manufacturing a semiconductor device, comprising: 5. A preliminary cutting portion is formed at a boundary between each outer lead and the outer frame portion, and the outer lead and the outer frame portion are separated from each other by the preliminary cutting portion. The method for manufacturing a semiconductor device according to claim 4, wherein 6. The method of manufacturing a semiconductor device according to claim 4, wherein the outer lead and the frame portion are separated from each other by cutting the frame portion.