JPH05314280A - Microcomputer - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a microcomputer in which the CPU can recognize the output data of the PWM waveform generation circuit even after fixing the output to the outside. [Structure] The PWM waveform level read register 2 is provided with switches SW ₁ and SW ₂ operated on the control signal S ₁ from the CPU and the control signal S ₁ bar inverted by the inverter circuit 8 on the input side and the output side. When the output data of the generation circuit 1 is held and read, the held data is given to the data bus 3.

Description

Detailed Description of the Invention

[0001]

The present invention relates to pulse width modulation (hereinafter referred to as PWM
Called) a microcomputer for controlling an external circuit using a waveform.

[0002]

2. Description of the Related Art Microcomputers have internal
Some have a PWM waveform generation circuit, and when controlling the circuit outside the microcomputer using the PWM waveform output from this PWM waveform generation circuit, by fixing the output to the outside, for example, to "H" , External circuit PWM
Stop the waveform control. In this case, there is a method of setting the duty ratio of the next PWM waveform to be output as "H" 100% and fixing the output to "H" using only the PWM waveform generation circuit. However, it cannot be fixed at "H" unless the output of the next PWM waveform is output, and it is impossible to quickly cut off the external control by the PWM waveform. Therefore, it is fixed at “H” using the PWM waveform fixed register.

FIG. 3 is a block diagram showing a circuit configuration of a main part of a conventional microcomputer. In the figure, 1 is a PWM waveform generation circuit that generates a PWM waveform, and while outputting a PWM waveform of a certain cycle, the duty ratio of the PWM waveform of the next cycle or later can be set. This PWM waveform generation circuit 1
Is input to one input of the logical sum circuit 5, and this logical sum is output from the output terminal 6 to the external circuit to be controlled. The data of the PWM waveform fixed register 4 is input to the other input side of the OR circuit 5 through the switch SW ₄ . PW
The data held by the M waveform fixed register 4 is the data bus 3
It is input via the switch SW ₃ from. This switch SW
₃ is turned on / off by control signal S ₂ given by CPU (not shown)
To be done.

[0004] switching換側terminal of the switch SW ₄ is one is connected to the PWM waveform fixed register 4 and the other is grounded. The common side terminal of the switch SW ₄ is connected to the OR circuit 5. The control of this switch SW ₄ is
It is performed by the control signal S ₃ given by the CPU, and the switch SW ₄
When the one side is selected, the data of the PWM waveform fixed register 4 is input to the logical sum circuit 5. Then, as described above, the logical sum of the logical sum circuit 5 which inputs this data and the data of the PWM waveform generating circuit 1 is output to the output terminal 6.

FIG. 4 is a timing chart for explaining the operation of the circuit shown in FIG. First, in the normal state, the switch SW ₄ selects the ground side terminal, and the OR circuit 5 outputs the output data of the PWM waveform generation circuit 1 and the switch SW ₄
Outputs the logical sum with "L". That is, the output data of the PWM waveform generation circuit 1 is output to the output terminal 6.

When fixing the output to the outside, when the CPU turns on the switch SW ₃ by the control signal S ₂ and puts "H" on the data bus 3, this "H" is changed to the PWM waveform fixed register 4 Is input to. Further, when the CPU causes the switch SW ₄ to select the terminal on the PWM waveform fixed register 4 side by the control signal S ₃ , “H” of the PWM waveform fixed register 4 is input to the OR circuit 5. The logical sum circuit 5 outputs "H" which is the logical sum of the output data of the PWM waveform generating circuit 1 and "H" of the PWM waveform fixed register 4 to the output terminal 6. That is, the output to the outside is fixed at "H".

[0007]

However, as mentioned above, the PW
When the M waveform fixed register is used, the CPU cannot recognize the output data of the PWM waveform generation circuit when releasing the fixed output to the outside and returning to the original PWM waveform.
It was necessary to initialize the PWM waveform generation circuit. The present invention has been made in view of such circumstances, and an object thereof is to provide a microcomputer in which the CPU can recognize the output data of the PWM waveform generation circuit when the fixation of the output to the outside is released.

[0008]

A microcomputer according to the present invention is provided with a register for holding data output from a PWM waveform generation circuit, and when releasing the fixation of the output to the outside, the CPU holds this held data. It has a readable circuit configuration.

[0009]

In the microcomputer of the present invention, the PW
Since the output data of the M waveform generation circuit can be held, the CPU can recognize this data by reading the held data when releasing the fixed output to the outside.
It is not necessary to initialize the PWM waveform generation circuit.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings showing the embodiments thereof. FIG. 1 is a block diagram showing a circuit configuration of a main part of a microcomputer according to the present invention. 1 in the figure is PW
This is a PWM waveform generation circuit that generates M waveforms. The output data of this PWM waveform generation circuit 1 is directly to the OR circuit 5, and to the PWM waveform level read register 2 that holds this output data via switch SW ₁ . Is entered. Then, the data of the PWM waveform level read register 2 is output to the data bus 3 via the switch SW ₂ .

[0011] This is to switch SW ₂ is control signals S ₁ from an unillustrated CPU is directly input, the control signals S ₁ bar which is inverted through an inverter circuit 8 is inputted to the switch SW _1. When the CPU puts the data for fixing the output to the outside on the data bus 3, this data is switched SW.
It is input to PWM waveform fixed register 4 via ₃ and held.

This switch SW ₃ is turned on / off by a control signal S _{2 provided} by the CPU. Then, the data of the PWM waveform fixed register 4 is input to the OR circuit 5 via the switch SW ₄ . One of the switching side terminals of this switch SW ₄ is PW
The switch SW ₄ is connected to the M waveform fixed register 4 and the other is grounded. The switch SW ₄ is controlled by the control signal S ₃ from the CPU. And the data from this switch SW ₄ and PW
The logical sum of the logical sum circuit 5 that receives the output data of the M waveform generation circuit 1 as an input is output from the output terminal 6 to the external circuit that is the control target.

FIG. 2 is a timing chart for explaining the operation of the circuit shown in FIG. Under normal conditions,
As shown in FIG. 2D, the switch SW ₄ selects the ground side terminal, and the OR circuit 5 outputs the OR of the output data of the PWM waveform generating circuit 1 and “L” of the switch SW ₄ . That is, the output data of the PWM waveform generation circuit 1 shown in FIG. 2A is output to the output terminal 6 (FIG. 2E). At this time,
Switch SW ₃ is off. The switch SW ₁ is on and the switch SW ₂ is off. As shown in Fig. 2 (c), the PWM waveform level read register 2 holds the output data of the PWM waveform generation circuit 1, and this held data is the PWM waveform generation circuit. It changes as the output data of 1 changes.

Next, when fixing the output to the outside, the CPU turns on the switch SW ₃ by the control signal S ₂ and puts "H" on the data bus 3. Then, as shown in FIG. 2B, this "H" is input to the PWM waveform fixed register 4. Further, the CPU sends PW to the switch SW ₄ by the control signal S _3.
M Selects the waveform fixed register 4 side terminal. This
"H" of the PWM waveform fixed register 4 is input to the logical sum circuit 5, and the output of the output terminal 6 is "H" as shown in FIG.
Fixed to. Even after fixing the output to the outside like this
Figure 2 shows the PWM waveform level read register 2.
As shown in (c), the output data of the PWM waveform generation circuit 1 (Fig. 2 (a)) is held sequentially.

When reading the held data, the CPU turns off the switch SW ₁ and turns on the switch SW ₂ by the control signal S _1.
When N, this held data is given to the data bus 3 and C
The PU can recognize the output data of the PWM waveform generation circuit 1. When the CPU judges the data recognized in this way and decides to release the fixation, the CPU causes the switch SW ₄ to select the ground side terminal by the control signal S ₃ . Then, as in the normal state, the output data of the PWM waveform generating circuit 1 is output from the output terminal 6 to the outside.

On the other hand, it may be considered that the CPU releases the fixation without recognizing the output data of the PWM waveform generating circuit 1 in advance. In this case as well, the CPU can recognize the output data of the PWM waveform generation circuit 1 when the fixation is released. Since the PWM waveform read register 2 of the present embodiment is provided with switches SW ₁ and SW ₂ on the input and output sides, the operating states of which are reversed, the data changes during the reading of the data and the reading becomes undefined. There is no.

[0017]

As described above, since the microcomputer according to the present invention is provided with the PWM waveform level read register, the output data of the PWM waveform generation circuit can be held even after the output to the outside is fixed. .. The CPU can recognize this data by giving the held data to the data bus, so that the present invention has an excellent effect such that the fixation can be released without initializing the PWM waveform generating circuit.

[Brief description of drawings]

FIG. 1 is a block diagram showing a circuit configuration of a main part of a microcomputer according to the present invention.

FIG. 2 is a timing chart for explaining the operation of the circuit shown in FIG.

FIG. 3 is a block diagram showing a circuit configuration of a main part of a conventional microcomputer.

FIG. 4 is a timing chart for explaining the operation of the circuit shown in FIG.

[Explanation of symbols]

 1 PWM waveform generation circuit 2 PWM waveform level read register 4 PWM waveform fixed register 5 Logical sum circuit 8 Inverter circuit

Claims (1)

[Claims] 1. A PWM waveform generation circuit, a logical sum circuit that receives output data of the PWM waveform generation circuit as one input, and data for fixing the output of the logical sum circuit. In a microcomputer provided with a register for giving the data to the other input side, a register for holding the output data of the PWM waveform generation circuit is provided, and the circuit configuration is such that the CPU can read the data held in the register. Characteristic microcomputer.