JPH05315550A - Amplifying circuit - Google Patents

Abstract

PURPOSE:To reduce the number of the constituent elements of an amplifying circuit for high frequency use, in particular to reduce dramatically the chip size of an MMIC in the formation of the MMIC. CONSTITUTION:A collector terminal of a preceding-stage bipolar transistor 11, which is grounded at its emitter, and a base terminal of a succeeding-stage bipolar transistor 12, which is similarly grounded at its emitter, are directly connected to each other in a DC manner without making a capacitance for a DC block interpose between the collector and base terminals. A preceding- stage output bias terminal and a succeeding-stage input bias terminal are used in common as an interstage bias terminal 16. As at least the succeeding-stage transistor 12 of both transistors, a heterojunction bipolar transistor consisting of an emitter formed using AlgaAs as its material and a base and a collector, which are formed using GaAs as their materials, is used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifier circuit, and more particularly to a high frequency amplifier circuit.

[0002]

2. Description of the Related Art In the field of compound semiconductors, a heterojunction bipolar transistor using a wide bandgap as an emitter has recently attracted attention as a high speed / high frequency transistor. For example, the material of the emitter is AlGa
The heterojunction bipolar transistor in which As, the material of the base and the collector is GaAs is currently most developed. Conventionally, a high-frequency amplifier circuit using the above-mentioned heterojunction bipolar transistor has been composed of a circuit similar to that of a normal Si bipolar transistor.

Several examples of conventional high-frequency amplifier circuits will be described below with reference to the drawings.

FIG. 6 is a circuit diagram showing the configuration of an amplifier circuit using two transistors, and FIG. 7 is a circuit diagram showing the configuration of an amplifier circuit using one transistor.

In FIG. 6, reference numerals 61 and 62 denote front-stage and rear-stage transistors, respectively, both of which are grounded-emitter type. 3 is a capacitance called a DC block for blocking a bias, 4 is a reactance for blocking a high frequency,
Reference numeral 7 is a high frequency (RF) input terminal, 8 is an RF output terminal, 9 is a ground point, 65 is a front stage input bias terminal, 66 is a front stage output bias terminal, 67 is a rear stage input bias terminal, and 68 is a rear stage output bias terminal. In the figure, each node 6
The bias voltage applied to a, 6b, 6c and 6d is expressed by Vin = V (6a) = V (6c) <Vout = V (6b) = V (6d), and is generally an AlGaAs / GaAs heterojunction. For bipolar transistors, Vin = 1.4-1.5
V, Vout = 3 to 10V, and for Si-based (homojunction) bipolar transistors, Vin = 0.7V, Vout =
Each is set to about 5 to 20V.

In FIG. 7, reference numeral 71 is a transistor, which is a grounded-emitter type. Further, 75 is a bias terminal, and when the input / output bias is drawn out by one terminal as shown in the figure, a voltage distribution method in which resistances 77 and 78 are inserted on the input side is generally used. Also in this figure, each node 7
The bias voltage applied to a and 7b is represented by Vin = V (7a) <Vout = V (7b).

[0007]

However, in the above configuration, since the input and output biases are different, bias terminals are individually drawn out and resistance elements with large power loss are used, so that the circuit is simplified. And it was an obstacle to low power consumption. Furthermore, when this high-frequency amplifier circuit is integrated on one chip (MMIC), the large number of elements directly leads to the size of the chip, which is low in a compound semiconductor using an expensive substrate such as an epitaxial substrate. It was an obstacle to cost reduction.

In particular, the DC block capacitance between the stages in the two-stage amplifier circuit requires a large capacitance, so that it is almost impossible to reduce the size of the chip in the MMIC which is difficult to make a large capacitance.

In view of the above problems, the present invention provides a high-frequency amplifier circuit which eliminates the capacitance between stages and reduces the number of bias terminals for extraction, or does not use the voltage distribution method by resistance.

[0010]

In order to solve the above problems, the invention of claim 1 comprises a front-stage bipolar transistor whose emitter is grounded, and a rear-stage bipolar transistor whose emitter is grounded, and a rear-stage bipolar transistor. The base terminal of is adopted a configuration in which it is directly connected to the collector terminal of the preceding bipolar transistor on the DC circuit. According to the invention of claim 2, as a bipolar transistor at least in the latter stage, the emitter material is AlGaAs and the base and collector materials are GaAs.
The heterojunction bipolar transistor is used.

According to a third aspect of the present invention, a bipolar transistor having a grounded emitter is provided, and the same bias as that of the collector terminal of the bipolar transistor is applied to the base terminal of the bipolar transistor. According to the invention of claim 4, a heterojunction bipolar transistor in which the emitter material is AlGaAs and the base and collector materials are GaAs is used as the bipolar transistor.

According to a fifth aspect of the present invention, there is provided an integrated amplifier circuit comprising a front-stage heterojunction bipolar transistor formed on a semiconductor substrate and grounded at the emitter, and a rear-stage bipolar transistor formed on the semiconductor substrate and grounded at the emitter. And a distributed constant line that is directly extended from the collector terminal of the preceding heterojunction bipolar transistor and is connected directly to the base terminal of the subsequent heterojunction bipolar transistor while gradually changing the characteristic impedance. The configuration is adopted.

[0013]

According to the first or second aspect of the present invention, it is possible to eliminate the capacitance between the stages and integrate the output bias terminal of the preceding stage and the input bias terminal of the succeeding stage. Further, according to the invention of claim 3 or 4, it is possible to supply the bias only by the reactance without using the voltage distribution method by the resistance.

According to the integrated amplifier circuit of the fifth aspect of the present invention, the chip size is drastically reduced in the MMIC implementation, and as a result, a significant cost reduction is possible. Moreover, since the characteristic impedance of the distributed constant line is gradually changed so as to match the difference between the output impedance of the preceding heterojunction bipolar transistor and the input impedance of the latter heterojunction bipolar transistor, the interstage loss is reduced. It

[0015]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A high frequency amplifier circuit according to an embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows the configuration of an amplifier circuit according to the first embodiment of the present invention. In FIG. 1, 11 and 12 are front-stage and rear-stage transistors, respectively, both of which are grounded emitter type AlGaAs / GaAs heterojunction bipolar transistors. Reference numeral 15 is a front stage input bias terminal, 16 is an interstage bias terminal, and 17 is a rear stage output bias terminal. In the figure, each node 1a,
The bias voltage applied to 1b and 1c is expressed by Vin = V (1a) = V (1b) <Vout = V (1c), and is set to Vin = 1.5V and Vout = 5V, for example.

FIG. 2 shows the configuration of an amplifier circuit according to the second embodiment of the present invention. In FIG. 2, reference numeral 21 denotes a transistor, which is a grounded emitter type AlGaAs / GaAs heterojunction bipolar transistor. Further, reference numeral 25 is a bias terminal, which draws the input and output biases only by the reactance 4 as shown in FIG. Therefore, also in the figure, the bias voltage applied to each of the nodes 2a and 2b is represented by V (2a) = V (2b) = 1.5V.

FIG. 3 is a schematic view of the IV characteristic for showing that the input / output bias can be made the same in the heterojunction bipolar transistor. Collector voltage on the horizontal axis,
The vertical axis represents the collector current, the solid line shows the characteristics of the heterojunction bipolar transistor, and the broken line shows the characteristics of the homojunction bipolar transistor for comparison. Conventional Si
Base voltage of about 0.7V for bipolar transistors
Then, the transistor is turned on, and as shown in the same figure, the collector voltage is 0.7 V, and the transistor shifts from the saturated region to the active region. In a high-frequency amplifier circuit, the operating bias is always set in the active region of the transistor. In this case, the input applied voltage (base voltage) is about 0.7V, and the output applied voltage (collector voltage) also depends on the output. However, several V to several tens of V
Is set to. Therefore, it cannot be used as an amplifier circuit at an operating point such as point b in FIG.

On the other hand, in the heterojunction bipolar transistor, the emitter is a wide band gap AlGaAs.
Therefore, the base voltage for turning on the transistor is as high as 1.5V. However, like the homojunction bipolar transistor, the junction between the base and the collector is GaA.
Since it is a homojunction of s, the collector voltage shifts from the saturation region to the active region at about 0.7V. Therefore, even when both the base voltage and the collector voltage are set to 1.5 V as in the case of point a, the heterojunction bipolar transistor has an active region in which amplification can be sufficiently performed.

FIG. 4 shows the fabrication of an MMIC using the first embodiment of the present invention and using a distributed constant line in which the characteristic impedance gradually changes from high impedance to low impedance in order to reduce the reflection loss between stages. Here is an example: A semiconductor chip 40 has an MMIC formed on the surface thereof. Reference numerals 41 and 42 denote heterojunction bipolar transistors in the front and rear stages, respectively, and the output impedance of the front stage is higher than the input impedance of the rear stage. Reference numeral 43 is a distributed constant line, which is designed so that its characteristic impedance gradually decreases from the front stage output side to the rear stage input side in order to reduce interstage loss due to the difference in impedance. Reference numeral 44 is a wiring. Reference numeral 45 is a front-stage input / inter-stage bias pad, and 46 is a rear-stage output bias pad, which is connected to each transistor terminal through the high-frequency blocking reactance 4. 47 and 48 are an RF input pad and an RF output pad, respectively.
Are connected to the input of the front stage transistor and the output of the rear stage transistor, respectively. 49 is a ground pad extended from the emitter of each transistor. As is clear from the figure, each capacitance 3 for the DC block occupies a large proportion of the area of the semiconductor chip, and the removal of the DC block between the stages according to the present invention is effective.

FIG. 5 shows the measurement result of the actual RF characteristics of the MMIC manufactured in FIG. In the figure, the horizontal axis plots the frequency in logarithmic intervals, and the vertical axis plots the maximum available power gain in decibel conversion. As shown in the figure, the theoretical maximum gain in the case of two stages is simply doubled in the present plot method. On the other hand, the MMIC gain according to the present invention has good characteristics close to the theoretical value although there is some loss, and the effectiveness of the present invention can be proved.

As described above, according to the embodiment of the present invention, as shown in FIG. 1 or 2, the same voltage can be applied to the input / output bias of the transistor by taking advantage of the characteristics of the heterojunction bipolar transistor. So D
By eliminating the capacitance for C block and the resistance for voltage distribution, the bias circuit can be simplified and the number of circuit elements can be reduced. In addition, as shown in FIG.
It is possible to greatly contribute to the reduction of the chip size in such cases.

In the embodiment of the present invention, the former stage can be constituted by a normal Si bipolar transistor. Also, as a matter of course, the amplification circuit can be configured by a normal hybrid.

[0024]

As described above, according to the first or second aspect of the invention, in the amplifying circuit using the two-transistor bipolar transistor, the collector terminal of the front stage is directly connected to the base terminal of the rear stage. It is possible to eliminate the inter-stage capacitance and combine the output bias terminal of the preceding stage and the input bias terminal of the succeeding stage into one. This allows
The number of elements in the circuit is greatly reduced.

According to the invention of claim 3 or 4,
In the amplifier circuit using one bipolar transistor, the same bias as the collector terminal is applied to the base terminal, so that it is possible to supply the bias only by the reactance without using the voltage distribution method by the resistance. As a result, the number of circuit elements is reduced and the power consumption is greatly improved.

According to the integrated amplifier circuit of the fifth aspect of the invention, a distributed constant line is directly provided between the collector terminal of the preceding heterojunction bipolar transistor and the base terminal of the succeeding heterojunction bipolar transistor. Since the wired configuration is adopted, the MMIC chip size is dramatically reduced, and as a result, it is possible to significantly reduce the cost.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a two-stage amplifier circuit according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a one-stage amplifier circuit according to a second embodiment of the present invention.

FIG. 3 is a schematic diagram of IV characteristics for showing that the input / output bias can be the same in the heterojunction bipolar transistor.

FIG. 4 is an MMIC manufactured according to the first embodiment of the present invention.
It is a block diagram of a type amplifier circuit.

5 is a characteristic diagram showing a high frequency characteristic of the MMIC type amplifier circuit of FIG. 4;

FIG. 6 is a circuit diagram of a conventional two-stage amplifier circuit.

FIG. 7 is a circuit diagram of a conventional one-stage amplifier circuit.

[Explanation of symbols]

 3 capacitance 4 reactance 7 RF input terminal 8 RF output terminal 9 ground point 11, 41, 61 front stage transistor 12, 42, 62 rear stage transistor 15, 65 front stage input bias terminal 16 interstage bias terminal 17, 68 rear stage output bias terminal 21, 71 Transistors 25, 75 Bias Terminal 40 Semiconductor Chip 43 Distributed Constant Line 44 Wiring 45 Front Input / Interstage Bias Pad 46 Rear Output Bias Pad 47 RF Input Pad 48 RF Output Pad 49 Ground Pad 66 Front Output Bias Terminal 67 Rear Input Bias Terminal 77, 78 Resistance

Claims (5)

[Claims] 1. A front-stage bipolar transistor having a grounded emitter and a rear-stage bipolar transistor having a grounded emitter, wherein a base terminal of the rear-stage bipolar transistor is directly connected to a collector terminal of the front-stage bipolar transistor on a DC circuit. An amplifier circuit characterized by being connected. 2. The amplifier circuit according to claim 1, wherein a heterojunction bipolar transistor whose emitter material is AlGaAs and whose base and collector materials are GaAs is used as at least the subsequent bipolar transistor. 3. An amplifier circuit comprising a bipolar transistor having a grounded emitter, wherein the same bias as the collector terminal of the bipolar transistor is applied to the base terminal of the bipolar transistor. 4. The amplifier circuit according to claim 3, wherein a heterojunction bipolar transistor having an emitter material of AlGaAs and a base and collector material of GaAs is used as the bipolar transistor. 5. A front-stage heterojunction bipolar transistor formed on a semiconductor substrate and grounded with an emitter, a rear-stage heterojunction bipolar transistor formed on the semiconductor substrate and grounded with an emitter, and the front-stage heterojunction bipolar transistor. An integrated amplifier, comprising: a distributed constant line which is directly extended from the collector terminal of the transistor and is connected directly to the base terminal of the latter heterojunction bipolar transistor while gradually changing the characteristic impedance. circuit.