JPH05343849A - Manufacture of multilayer electronic component mounting substrate - Google Patents
Manufacture of multilayer electronic component mounting substrateInfo
- Publication number
- JPH05343849A JPH05343849A JP4170115A JP17011592A JPH05343849A JP H05343849 A JPH05343849 A JP H05343849A JP 4170115 A JP4170115 A JP 4170115A JP 17011592 A JP17011592 A JP 17011592A JP H05343849 A JPH05343849 A JP H05343849A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- substrate
- component mounting
- dry film
- multilayer board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は,電子部品搭載部におけ
る内層導体回路に損傷を与えることがない,多層電子部
品搭載用基板の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer electronic component mounting substrate which does not damage an inner layer conductor circuit in an electronic component mounting portion.
【0002】[0002]
【従来技術】従来,基板上に電子部品搭載部を有する多
層電子部品搭載用基板の製造方法としては,図8ないし
図10に示すものがある(特開昭61−75596号公
報)。即ち,この方法は,図10に示すごとく,電子部
品と電気的に接続される内層導体回路911を設けた第
一基板9と,その上に接着層5を介して接合した第二基
板7と,第一基板9の上方に設けた電子部品搭載用の凹
部950とを有する多層電子部品搭載用基板の製造方法
である。2. Description of the Related Art Conventionally, as a method for manufacturing a multilayer electronic component mounting substrate having an electronic component mounting portion on the substrate, there is one shown in FIGS. 8 to 10 (Japanese Patent Laid-Open No. 61-75596). That is, as shown in FIG. 10, this method comprises: a first substrate 9 provided with an inner layer conductor circuit 911 electrically connected to an electronic component; and a second substrate 7 joined thereto via an adhesive layer 5. , A method of manufacturing a multilayer electronic component mounting substrate having an electronic component mounting recess 950 provided above the first substrate 9.
【0003】この方法においては,まず,図8(a)に
示すごとく,基板の上部91にニッケル・金メッキ層を
形成した電子部品搭載部951と内層導体回路911と
を有してなる第一基板9を準備する。また,上記電子部
品搭載部951よりも大きい開口部75を有すると共
に,上部71に上記と同様のメッキ層を形成した外層導
体回路711を有する第二基板7と,上記開口部75と
同平面形状の開口部55を有する接着層5とを準備す
る。In this method, first, as shown in FIG. 8A, a first substrate having an electronic component mounting portion 951 having a nickel / gold plating layer formed on an upper portion 91 of the substrate and an inner layer conductor circuit 911. Prepare 9. Further, the second substrate 7 having the opening 75 larger than the electronic component mounting portion 951 and the outer layer conductor circuit 711 having the same plating layer as the above on the upper portion 71, and the same plane shape as the opening 75 And the adhesive layer 5 having the opening 55.
【0004】次に,図8(b)に示すごとく,第一基板
9の上に接着層5を介して上記第二基板7を積層すると
共に,これらを熱圧着により接合して多層板を作製す
る。次いで,図9(a)に示すごとく,上記多層板に貫
通孔97を穿設し,更に多層板の全表面及び貫通孔97
に金属(銅)メッキ11を施す。Next, as shown in FIG. 8B, the second substrate 7 is laminated on the first substrate 9 with the adhesive layer 5 interposed therebetween, and these are joined by thermocompression bonding to form a multilayer board. To do. Then, as shown in FIG. 9A, through holes 97 are formed in the multilayer plate, and further, the entire surface of the multilayer plate and the through holes 97 are formed.
A metal (copper) plating 11 is applied to.
【0005】次いで,図9(b)に示すごとく,エッチ
ングにより,第一基板9の下部99に,外層導体回路9
91を,また第二基板7の上部71には外層導体回路7
11を形成する。これにより,図10に示すごとく,電
子部品搭載部951の上に第二基板7の開口部75によ
って囲まれた凹部950が形成される。また,貫通孔9
7には,リードピン6を挿入する。Then, as shown in FIG. 9B, the outer conductor circuit 9 is formed on the lower portion 99 of the first substrate 9 by etching.
91, and the outer layer conductor circuit 7 on the upper part 71 of the second substrate 7.
11 is formed. As a result, as shown in FIG. 10, a recess 950 surrounded by the opening 75 of the second substrate 7 is formed on the electronic component mounting portion 951. Also, the through hole 9
The lead pin 6 is inserted into 7.
【0006】[0006]
【解決しようとする課題】しかしながら,図9(b)に
示すごとく,外層導体回路991,711を形成する工
程においては,電子部品搭載部951に露出している内
層導体回路911を汚染するおそれがある。即ち,上記
外層導体回路991,711を形成する際には,上記の
ごとく,まず貫通孔97及び基板の全表面に一旦銅メッ
キ11を施し,その後電子部品搭載部951,当初の内
層導体回路911の上の銅メッキ11(図9a)をエッ
チングにより除去している。However, as shown in FIG. 9B, in the step of forming the outer layer conductor circuits 991 and 711, the inner layer conductor circuit 911 exposed in the electronic component mounting portion 951 may be contaminated. is there. That is, when the outer layer conductor circuits 991 and 711 are formed, as described above, first, the through hole 97 and the entire surface of the substrate are once copper-plated 11 and then the electronic component mounting portion 951 and the initial inner layer conductor circuit 911 are formed. The copper plating 11 (FIG. 9a) on the top of the substrate has been removed by etching.
【0007】そのため,内層導体回路911の表面が汚
染され,電気的接合性の劣化等が生じるおそれがある。
本発明は,かかる問題点に鑑み,電子部品搭載部に露出
した内層導体回路に,損傷を与えることがない多層電子
部品搭載用基板の製造方法を提供しようとするものであ
る。As a result, the surface of the inner-layer conductor circuit 911 may be contaminated, and the electrical connection may be deteriorated.
In view of the above problems, the present invention aims to provide a method for manufacturing a multilayer electronic component mounting substrate that does not damage the inner layer conductor circuit exposed in the electronic component mounting portion.
【0008】[0008]
【課題の解決手段】本発明は,内層導体回路が形成され
た第一基板と,電子部品搭載部の上方に位置する開口部
を有する少なくとも1つの第二基板とを,接着層を介し
て貼り合わせて多層板を形成する積層工程と,上記多層
板の所定位置に貫通孔を設ける貫通孔形成工程と,上記
開口部を蓋するようにフィルム状のマスクを貼着するフ
ィルム貼着工程と,外層回路を形成する外層回路形成工
程とよりなることを特徴とする多層電子部品搭載用基板
の製造方法にある。According to the present invention, a first substrate on which an inner layer conductor circuit is formed and at least one second substrate having an opening located above an electronic component mounting portion are attached via an adhesive layer. A laminating step of forming a multi-layer board in combination, a through-hole forming step of providing a through-hole at a predetermined position of the multi-layer board, a film adhering step of adhering a film-like mask so as to cover the opening. An outer layer circuit forming step of forming an outer layer circuit is provided, which is a method for manufacturing a substrate for mounting a multilayer electronic component.
【0009】また,上記製法を実施するための製造方法
としては,次の方法がある。即ち,内層導体回路が形成
された第一基板と,電子部品搭載部の上に開口部を有す
る少なくとも1つの第二基板とを,接着層を介して貼り
合わせて多層板を形成する積層工程と,上記多層板の所
定位置に貫通孔を設けるB工程と,多層板の表面全体,
電子部品搭載部,及び貫通孔にメッキ触媒を施すC工程
とを行う。Further, as a manufacturing method for carrying out the above manufacturing method, there is the following method. That is, a laminating step of forming a multilayer board by bonding a first substrate on which an inner layer conductor circuit is formed and at least one second substrate having an opening above an electronic component mounting portion via an adhesive layer to form a multilayer board. , Step B of providing a through hole at a predetermined position of the multilayer board, and the entire surface of the multilayer board,
The electronic component mounting portion and the step C of applying a plating catalyst to the through holes are performed.
【0010】その後,多層板の表面全体にドライフィル
ムを貼着するD工程と,ドライフィルムを露光すると共
に貫通孔に対面する部分のドライフィルムを現像除去
し,他の部分はドライフィルムを残しておくE工程と,
上記貫通孔内に金属メッキを施すF工程と,ドライフィ
ルムを除去するG工程と,上記多層板の表面のメッキ触
媒をソフトエッチングにより除去するH工程とを行う。After that, the step D of attaching a dry film to the entire surface of the multilayer board, and exposing the dry film and developing and removing the part of the dry film facing the through hole, leaving the other part of the dry film. E process to put,
The F step of performing metal plating in the through hole, the G step of removing the dry film, and the H step of removing the plating catalyst on the surface of the multilayer board by soft etching are performed.
【0011】上記製造法において最も注目すべきこと
は,多層板の表面全体,電子部品搭載部,及び貫通孔に
メッキ触媒を施すC工程と,多層板の表面全体にドライ
フィルムを貼着するD工程と,ドライフィルムを露光す
ると共に貫通孔に対面する部分のドライフィルムを現像
除去し,他の部分はドライフィルムを残しておくE工程
と,上記貫通孔内に金属メッキを施すF工程と,ドライ
フィルムを除去するG工程にある。What is most noticeable in the above manufacturing method is the step C in which a plating catalyst is applied to the entire surface of the multilayer board, the electronic component mounting portion, and the through holes, and the dry film is adhered to the entire surface of the multilayer board D. The steps of exposing the dry film and developing and removing the dry film in the portion facing the through hole, leaving the dry film in the other portion, and the step of applying metal plating in the through hole. It is in the G step of removing the dry film.
【0012】上記第一基板は,その上部に電子部品搭載
部とその周辺部に設けられた内層導体回路とを有する。
上記第二基板は,電子部品搭載部よりも大きい開口部を
有する。上記電子部品搭載部は,凹状形,平面形,貫通
穴等よりなる。The first substrate has an electronic component mounting portion on an upper portion thereof and an inner layer conductor circuit provided on a peripheral portion thereof.
The second substrate has an opening larger than the electronic component mounting portion. The electronic component mounting portion has a concave shape, a flat shape, a through hole, or the like.
【0013】上記多層板は,第一基板と,その上に積層
された第二基板とよりなる。第一基板と第二基板との間
に,中間基板を設けてもよい。該中間基板は,電子部品
搭載部よりも大きく第一基板の開口部の外径よりも小さ
い開口部と,該開口部の周辺部に形成された内層導体回
路を有する。中間基板の開口部は,上方の基板程大きい
外径を有する。The multilayer board comprises a first substrate and a second substrate laminated on the first substrate. An intermediate substrate may be provided between the first substrate and the second substrate. The intermediate substrate has an opening larger than the electronic component mounting portion and smaller than the outer diameter of the opening of the first substrate, and an inner layer conductor circuit formed in the peripheral portion of the opening. The opening of the intermediate substrate has a larger outer diameter as it goes upward.
【0014】即ち,本発明は,電子部品搭載部を有する
第一基板の上方に第二基板を設けるものであって,両基
板の間には1枚又は複数枚の上記中間基板を設けること
もできる。また,上記第二基板の上部及び第一基板の上
部と下部には,予め銅箔層が設けられている。That is, according to the present invention, the second substrate is provided above the first substrate having the electronic component mounting portion, and one or a plurality of the intermediate substrates may be provided between the two substrates. it can. A copper foil layer is previously provided on the upper part of the second substrate and the upper and lower parts of the first substrate.
【0015】上記感光性のドライフィルムは,上記金属
メッキを貫通孔に施す工程(F工程)においても,電子
部品搭載部及びその開口部と,第二基板の上部に設けら
れた銅箔層とを被覆する。ドライフィルムは,化学銅メ
ッキ液及び強アルカリに対して優れた耐性を有する。上
記接着層は,シート状のプリプレグなどを用い,各基板
の間に介在させる。プリプレグは基板と同材料のものが
好ましい。In the photosensitive dry film, even in the step of applying the metal plating to the through hole (step F), the electronic component mounting portion and its opening, and the copper foil layer provided on the second substrate are formed. To cover. Dry film has excellent resistance to chemical copper plating solutions and strong alkalis. The adhesive layer is made of sheet-like prepreg and is interposed between the substrates. The prepreg is preferably made of the same material as the substrate.
【0016】第一,第二基板,中間基板としては,エポ
キシ,トリアジン,ポリイミド樹脂等の銅張積層板など
が用いられる。電子部品搭載部内には,防湿性の向上,
放熱性向上のために金属メッキ被膜を形成しておくこと
が好ましい。内層,外層の導体回路表面には,通常,ニ
ッケル・金メッキが施される。貫通孔は,リードピンな
どの外部導出端子を取り付けるための孔である。As the first and second substrates and the intermediate substrate, a copper clad laminate of epoxy, triazine, polyimide resin or the like is used. In the electronic component mounting area, improved moisture resistance,
It is preferable to form a metal plating film in order to improve heat dissipation. The inner and outer conductor circuit surfaces are usually plated with nickel and gold. The through hole is a hole for attaching an external lead terminal such as a lead pin.
【0017】また,貫通孔に金属メッキを施した後,ソ
フトエッチングを行う(H工程)。該ソフトエッチング
とは,絶縁基板の表面に残存しているメッキ触媒を除去
することである。ソフトエッチングに使われるソフトエ
ッチング溶液としては,硫酸などが用いられる。After the through holes are plated with metal, soft etching is performed (step H). The soft etching is to remove the plating catalyst remaining on the surface of the insulating substrate. Sulfuric acid or the like is used as the soft etching solution used for the soft etching.
【0018】また,外層導体回路は,貫通孔に金属メッ
キを施した後に形成される。外層導体回路の形成方法と
しては,ドライフィルムにより,外層導体回路を形成す
る部分を被覆し,次にレジスト膜により外層導体回路を
形成する部分を被覆し,上記ドライフィルムを除去し,
次いでエッチングにより外層導体回路を形成しない部分
の銅箔層を除去し,その後レジスト膜を除去する(I〜
M,乃至N工程)。レジスト膜としては,感光性ドライ
フィルム等があり,エッチング液に溶解しない。エッチ
ング液としては,塩化銅,塩化テトラアンミン銅などが
あり,銅箔層を溶解させる。The outer conductor circuit is formed after the through hole is plated with metal. As a method of forming the outer layer conductor circuit, a dry film covers a portion forming the outer layer conductor circuit, and then a resist film covers a portion forming the outer layer conductor circuit, and the dry film is removed.
Then, the copper foil layer in a portion where the outer layer conductor circuit is not formed is removed by etching, and then the resist film is removed (I to
M to N steps). As the resist film, there is a photosensitive dry film or the like, which does not dissolve in the etching solution. Examples of the etching liquid include copper chloride and tetraammine copper chloride, which dissolve the copper foil layer.
【0019】[0019]
【作用及び効果】本発明の多層電子部品搭載用基板の製
造方法においては,電子部品搭載部の上方に位置する開
口部を蓋するようにフィルム状のマスクを貼着してい
る。そのため,電子部品搭載部における内層導体回路に
は,金属メッキが施されない。また,上記製法を実施す
るための製造方法においては,多層板の表面全体,電子
部品搭載部,及び貫通孔にメッキ触媒を施し(C工
程),フィルム状のマスクとしてのドライフィルムを多
層板の全面に貼着させ(D工程),貫通孔に対面する部
分のみを現像除去し(E工程),その後貫通孔内に金属
メッキを施している(F工程)。In the method of manufacturing a substrate for mounting a multilayer electronic component of the present invention, a film-like mask is attached so as to cover the opening located above the electronic component mounting portion. Therefore, metal plating is not applied to the inner conductor circuit in the electronic component mounting portion. Further, in the manufacturing method for carrying out the above-mentioned manufacturing method, a plating catalyst is applied to the entire surface of the multilayer board, the electronic component mounting portion, and the through holes (step C), and a dry film as a film-shaped mask is applied to the multilayer board. The entire surface is attached (step D), only the portion facing the through hole is developed and removed (step E), and then the through hole is metal-plated (step F).
【0020】このD工程において,多層板の上部に貼着
されているドライフィルムは,電子部品搭載部及びその
開口部と,第二基板の銅箔層とを被覆している。そのた
め,電子部品搭載部における内層導体回路には,金属メ
ッキが施されない。それ故,絶縁基板の表面及び内層導
体回路に損傷を与えることなく,外層導体回路を形成す
ることができる。上記のごとく,本発明によれば,電子
部品搭載部に露出した内層導体回路に,損傷を与えるこ
とがない多層電子部品搭載用基板の製造方法を提供する
ことができる。In the step D, the dry film attached to the upper portion of the multilayer board covers the electronic component mounting portion and its opening, and the copper foil layer of the second substrate. Therefore, metal plating is not applied to the inner conductor circuit in the electronic component mounting portion. Therefore, the outer conductor circuit can be formed without damaging the surface of the insulating substrate and the inner conductor circuit. As described above, according to the present invention, it is possible to provide a method for manufacturing a multilayer electronic component mounting substrate that does not damage the inner layer conductor circuit exposed in the electronic component mounting portion.
【0021】[0021]
【実施例】実施例1 本発明の実施例にかかる多層電子部品搭載用基板の製造
方法につき,図1ないし図5を用いて説明する。本例の
製造方法により作製された多層電子部品搭載用基板は,
図5(n)に示すごとく,第一基板9と,第二基板7と
を有する。EXAMPLE 1 A method for manufacturing a substrate for mounting a multilayer electronic component according to an example of the present invention will be described with reference to FIGS. The multilayer electronic component mounting board manufactured by the manufacturing method of this example is
As shown in FIG. 5 (n), it has a first substrate 9 and a second substrate 7.
【0022】上記第一基板9の上部91には,凹状形の
電子部品搭載部95と,電子部品と電気的に接続するた
めの内層導体回路911とを設けている。電子部品搭載
部95は金属メッキ951で被覆されている。また,第
一基板9の下部99には,放熱層996や外層導体回路
991を設けている。The upper portion 91 of the first substrate 9 is provided with a concave electronic component mounting portion 95 and an inner layer conductor circuit 911 for electrically connecting with the electronic component. The electronic component mounting portion 95 is covered with a metal plating 951. Further, a heat dissipation layer 996 and an outer layer conductor circuit 991 are provided on the lower portion 99 of the first substrate 9.
【0023】上記第二基板7は,電子部品搭載部95の
外径よりも大きい開口部75を有し,その上部71にお
いては,貫通孔97のランドや接続回路等よりなる外層
導体回路711を形成している。第一基板9の上にはプ
リプレグよりなる接着層5を介して第二基板7が積層さ
れ,これらは多層板を形成している。該多層板の所定位
置には,貫通孔97が穿設されている。該貫通孔97は
金属メッキ3で被覆されている。The second substrate 7 has an opening 75 larger than the outer diameter of the electronic component mounting portion 95, and an upper layer 71 has an outer layer conductor circuit 711 including a land of the through hole 97 and a connection circuit. Is forming. A second substrate 7 is laminated on the first substrate 9 via an adhesive layer 5 made of prepreg, and these form a multilayer board. Through holes 97 are formed at predetermined positions of the multilayer board. The through hole 97 is covered with the metal plating 3.
【0024】次に,上記多層電子部品搭載用基板の製造
方法にかかる,A工程ないしN工程につき説明する。ま
ず,A工程においては,図1(a1)に示すごとく,第
一基板9と第二基板7と接着層5とを準備する。上記第
一基板9は,その上部91に金属メッキ951で被覆さ
れた電子部品搭載部95と,その開口周辺部に内層導体
回路911とを有する。またその下部99は銅箔層99
0を有する。Next, steps A to N in the method of manufacturing the above-mentioned substrate for mounting a multilayer electronic component will be described. First, in the step A, as shown in FIG. 1A1, the first substrate 9, the second substrate 7, and the adhesive layer 5 are prepared. The first substrate 9 has an electronic component mounting portion 95 having an upper portion 91 covered with a metal plating 951 and an inner layer conductor circuit 911 around the opening. The lower part 99 is a copper foil layer 99.
Has 0.
【0025】上記第二基板7の上部71は,銅箔層71
0で被覆され,上記電子部品搭載部95の外径よりも大
きい開口部75を有する。第二基板7の下部79には,
プリプレグよりなる上記接着層5が貼着されている。接
着層5は,第二基板の開口部75と同形状の開口部55
を有する。次に,図1(a2)に示すごとく,上記第一
基板9の上に,接着層5を介して上記第二基板7を積層
し,これらを熱圧着により接合し,多層板を得る。The upper portion 71 of the second substrate 7 is a copper foil layer 71.
It has an opening 75 which is covered with 0 and is larger than the outer diameter of the electronic component mounting portion 95. In the lower portion 79 of the second substrate 7,
The adhesive layer 5 made of prepreg is attached. The adhesive layer 5 has an opening 55 having the same shape as the opening 75 of the second substrate.
Have. Next, as shown in FIG. 1 (a2), the second substrate 7 is laminated on the first substrate 9 via the adhesive layer 5, and these are bonded by thermocompression bonding to obtain a multilayer board.
【0026】B工程においては,図1(b)に示すごと
く,多層板の所定位置に貫通孔97を穿設する。C工程
においては,図2(c)に示すごとく,多層板をメッキ
触媒液に浸漬する。これにより,多層板の全表面,即
ち,多層板の上部71,下部99,電子部品搭載部9
5,電子部品搭載部95の上方に設けられた開口部7
5,貫通孔97の全てが,メッキ触媒2により被覆され
る。メッキ触媒液としては,塩化バラジウムを用いる。In step B, as shown in FIG. 1B, a through hole 97 is formed at a predetermined position of the multilayer board. In step C, as shown in FIG. 2C, the multilayer board is immersed in the plating catalyst solution. As a result, the entire surface of the multilayer board, that is, the upper portion 71, the lower portion 99, and the electronic component mounting portion 9 of the multilayer board.
5, opening 7 provided above the electronic component mounting portion 95
5, all of the through holes 97 are covered with the plating catalyst 2. Valladium chloride is used as the plating catalyst liquid.
【0027】D工程においては,図2(d)に示すごと
く,多層板の表面全体にドライフィルム1を貼着する。
E工程においては,図2(e)に示すごとく,ドライフ
ィルム1を露光し,貫通孔97に対応する部分に孔17
を設ける。次いで,貫通孔97に対面する部分のドライ
フィルム1を現像除去し,他の部分はドライフィルム1
を残しておく。In step D, as shown in FIG. 2D, the dry film 1 is attached to the entire surface of the multilayer board.
In the step E, as shown in FIG. 2E, the dry film 1 is exposed and holes 17 are formed at the portions corresponding to the through holes 97.
To provide. Then, the dry film 1 in the part facing the through hole 97 is developed and removed, and the other part is dry film 1
Leave.
【0028】F工程においては,図3(f)に示すごと
く,多層板を金属メッキ液に浸漬する。これにより,貫
通孔97が金属メッキ3により被覆される。金属メッキ
液としては,銅メッキを用いる。G工程においては,図
3(g)に示すごとく,ドライフィルムを多層板から除
去する。H工程においては,図3(h)に示すごとく,
上記多層板の表面のメッキ触媒をソフトエッチングによ
り除去する。In step F, as shown in FIG. 3 (f), the multilayer board is immersed in a metal plating solution. As a result, the through hole 97 is covered with the metal plating 3. Copper plating is used as the metal plating solution. In the G step, the dry film is removed from the multilayer board as shown in FIG. In the H step, as shown in FIG.
The plating catalyst on the surface of the multilayer board is removed by soft etching.
【0029】I工程においては,図4(i)に示すごと
く,再度多層板の表面全体にドライフィルム1を貼着す
る。J工程においては,図4(j)に示すごとく,ドラ
イフィルム1を露光し,外層導体回路を形成する部分,
電子部品搭載部95の開口部75,及び貫通孔97に対
面する部分のドライフィルムを現像により除去し,他の
部分はドライフィルム1を残しておく。In step I, as shown in FIG. 4 (i), the dry film 1 is attached again to the entire surface of the multilayer board. In the J process, as shown in FIG. 4 (j), the portion where the dry film 1 is exposed to form the outer conductor circuit,
The dry film in the portion facing the opening 75 of the electronic component mounting portion 95 and the through hole 97 is removed by development, and the dry film 1 is left in the other portions.
【0030】K工程においては,図4(k)に示すごと
く,多層板を電着液に浸漬し,該電着液に通電する。こ
れにより,レジスト膜4が外層導体回路を形成する部
分,電子部品搭載部95の開口部75,及び貫通孔97
に対面する部分に形成される。In step K, as shown in FIG. 4 (k), the multi-layer plate is immersed in the electrodeposition solution, and the electrodeposition solution is energized. As a result, the portion where the resist film 4 forms the outer conductor circuit, the opening 75 of the electronic component mounting portion 95, and the through hole 97.
Is formed in the portion facing the.
【0031】L工程においては,図5(l)に示すごと
く,ドライフィルムを除去する。M工程においては,図
5(m)に示すごとく,銅箔層における外層導体回路を
形成しない部分をエッチングにより除去する。N工程に
おいては,図5(n)に示すごとく,レジスト膜を除去
し,多層板の表面に外層導体回路711,991,及び
放熱層996を形成する。In step L, the dry film is removed as shown in FIG. In the M step, as shown in FIG. 5 (m), a portion of the copper foil layer where the outer layer conductor circuit is not formed is removed by etching. In the N step, as shown in FIG. 5N, the resist film is removed and the outer conductor circuits 711, 991 and the heat dissipation layer 996 are formed on the surface of the multilayer board.
【0032】本例の多層電子部品搭載用基板の製造方法
においては,多層板の表面全体,電子部品搭載部95,
及び貫通孔97にメッキ触媒2を施し(C工程),ドラ
イフィルム1を多層板の全面に貼着させ(D工程),ド
ライフィルムにおける貫通孔97に対面する部分のみを
現像除去し(E工程),その後貫通孔97内に金属メッ
キ3を施している(F工程)。In the method of manufacturing the multilayer electronic component mounting substrate of this example, the entire surface of the multilayer plate, the electronic component mounting portion 95,
Then, the plating catalyst 2 is applied to the through holes 97 (step C), the dry film 1 is attached to the entire surface of the multilayer board (step D), and only the portion of the dry film facing the through holes 97 is removed by development (step E). ), And then the metal plating 3 is applied to the through holes 97 (step F).
【0033】このD工程において,多層板の上部71に
貼着されているドライフィルム1は,電子部品搭載部9
5及びその開口部75と,第二基板7の銅箔層710と
を被覆している。そのため,電子部品搭載部95におけ
る内層導体回路911には,金属メッキが施されない。
それ故,従来例における,電子部品搭載部95内の金属
メッキを除去するという工程は,不必要となる。そのた
め,電子部品搭載部95における内層導体回路911に
損傷を与えることがない。In the step D, the dry film 1 attached to the upper portion 71 of the multilayer board is attached to the electronic component mounting portion 9
5 and the opening 75 thereof, and the copper foil layer 710 of the second substrate 7 are covered. Therefore, the inner layer conductor circuit 911 in the electronic component mounting portion 95 is not metal-plated.
Therefore, the step of removing the metal plating in the electronic component mounting portion 95 in the conventional example is unnecessary. Therefore, the inner layer conductor circuit 911 in the electronic component mounting portion 95 is not damaged.
【0034】また,本例においては,外層導体回路を形
成する部分,貫通孔97,電子部品搭載部95,電子部
品搭載部95に露出した内層導体回路911が,レジス
ト膜4により被覆された状態で,外層導体回路を形成し
ない部分の銅箔層710,990をエッチングにより除
去している(M工程)。レジスト膜4は,エッチングに
より溶解しない。そのため,多層板の表面及び電子部品
搭載部95に露出した内層導体回路911に損傷を与え
ることなく,外層導体回路711,991を形成するこ
とができる。Further, in this example, the portion forming the outer layer conductor circuit, the through hole 97, the electronic component mounting portion 95, and the inner layer conductor circuit 911 exposed in the electronic component mounting portion 95 are covered with the resist film 4. Then, the copper foil layers 710 and 990 where the outer layer conductor circuit is not formed are removed by etching (step M). The resist film 4 is not dissolved by etching. Therefore, the outer layer conductor circuits 711 and 991 can be formed without damaging the surface of the multilayer board and the inner layer conductor circuits 911 exposed in the electronic component mounting portion 95.
【0035】実施例2 本例の製造方法により作製された電子部品搭載用基板
は,図6に示すごとく,平面状の凹部952を設けてい
る。その他は,実施例1における電子部品搭載用基板と
同様である。本例の電子部品搭載用基板の製造方法は,
実施例1と同様である。本例においても,実施例1と同
様の効果を得ることができる。Example 2 The electronic component mounting substrate manufactured by the manufacturing method of this example has a planar recess 952 as shown in FIG. Others are the same as those of the electronic component mounting board in the first embodiment. The manufacturing method of the electronic component mounting substrate of this example is as follows.
This is the same as the first embodiment. Also in this example, the same effect as that of the first embodiment can be obtained.
【0036】実施例3 本例の製造方法により作製された電子部品搭載用基板
は,図7に示すごとく,貫通穴よりなる電子部品搭載部
953を設けている。この電子部品搭載部953には,
例えば金属放熱板を設けると共に,その上に形成された
凹部内に電子部品を搭載する。その他は,実施例1にお
ける電子部品搭載用基板と同様である。本例の電子部品
搭載用基板の製造方法は,実施例1と同様である。本例
においても,実施例1と同様の効果を得ることができ
る。Example 3 An electronic component mounting substrate manufactured by the manufacturing method of this example is provided with an electronic component mounting portion 953 formed of a through hole as shown in FIG. In this electronic component mounting portion 953,
For example, a metal heat dissipation plate is provided, and electronic parts are mounted in the recess formed on the metal heat dissipation plate. Others are the same as those of the electronic component mounting board in the first embodiment. The method of manufacturing the electronic component mounting substrate of this example is the same as that of the first embodiment. Also in this example, the same effect as that of the first embodiment can be obtained.
【図1】実施例1の多層電子部品搭載用基板の製造工程
説明図。FIG. 1 is an explanatory view of a manufacturing process of a multilayer electronic component mounting substrate according to a first embodiment.
【図2】図1に続く製造工程説明図。FIG. 2 is an explanatory view of the manufacturing process following FIG.
【図3】図2に続く製造工程説明図。3 is an explanatory view of the manufacturing process following FIG. 2. FIG.
【図4】図3に続く製造工程説明図。FIG. 4 is an explanatory view of the manufacturing process following FIG.
【図5】図4に続く製造工程説明図。FIG. 5 is an explanatory view of the manufacturing process following FIG.
【図6】実施例2の多層電子部品搭載用基板の製造工程
説明図。FIG. 6 is an explanatory view of the manufacturing process of the multilayer electronic component mounting substrate according to the second embodiment.
【図7】実施例3の多層電子部品搭載用基板の製造工程
説明図。FIG. 7 is an explanatory view of a manufacturing process of the multilayer electronic component mounting substrate according to the third embodiment.
【図8】従来例の多層電子部品搭載用基板の製造工程説
明図。FIG. 8 is an explanatory view of a manufacturing process of a conventional multilayer electronic component mounting substrate.
【図9】図8に続く製造工程説明図。FIG. 9 is an explanatory view of the manufacturing process following FIG.
【図10】図9に続く製造工程説明図。FIG. 10 is an explanatory view of the manufacturing process subsequent to FIG. 9;
1...ドライフィルム, 2...メッキ触媒, 3...金属メッキ, 4...レジスト膜, 5,...接着層, 55,75,...開口部, 7,...第二基板, 711,991...外層導体回路, 71,,91...上部, 9...第一基板, 911...内層導体回路 95,952,953...電子部品搭載部, 79,99...下部, 1. . . Dry film, 2. . . Plating catalyst, 3. . . Metal plating, 4. . . Resist film, 5 ,. . . Adhesive layer, 55, 75 ,. . . Opening, 7 ,. . . Second substrate, 711, 991. . . Outer layer conductor circuit, 71, 91. . . Top, 9. . . First substrate, 911. . . Inner layer conductor circuit 95, 952, 953. . . Electronic component mounting part, 79, 99. . . beneath,
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H05K 3/28 G 7511−4E 3/42 A 7511−4E ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Office reference number FI Technical display location H05K 3/28 G 7511-4E 3/42 A 7511-4E
Claims (2)
電子部品搭載部の上方に位置する開口部を有する少なく
とも1つの第二基板とを,接着層を介して貼り合わせて
多層板を形成する積層工程と, 上記多層板の所定位置に貫通孔を設ける貫通孔形成工程
と, 上記開口部を蓋するようにフィルム状のマスクを貼着す
るフィルム貼着工程と, 外層回路を形成する外層回路形成工程とよりなることを
特徴とする多層電子部品搭載用基板の製造方法。1. A first substrate on which an inner layer conductor circuit is formed,
Laminating step of forming a multilayer board by bonding at least one second substrate having an opening located above the electronic component mounting portion via an adhesive layer, and providing a through hole at a predetermined position of the multilayer board. For mounting a multilayer electronic component, comprising: a through hole forming step, a film attaching step of attaching a film mask to cover the opening, and an outer layer circuit forming step of forming an outer layer circuit. Substrate manufacturing method.
電子部品搭載部の上方に位置する開口部を有する少なく
とも1つの第二基板とを,接着層を介して貼り合わせて
多層板を形成する積層工程と, 上記多層板の所定位置に貫通孔を設けるB工程と, 多層板の表面全体,電子部品搭載部,及び貫通孔にメッ
キ触媒を施すC工程と, 多層板の表面全体にドライフィルムを貼着するD工程
と, ドライフィルムを露光すると共に貫通孔に対面する部分
のドライフィルムを現像除去し,他の部分はドライフィ
ルムを残しておくE工程と, 上記貫通孔内に金属メッキを施すF工程と, ドライフィルムを除去するG工程と, 上記多層板の表面のメッキ触媒をソフトエッチングによ
り除去するH工程とからなることを特徴とする多層電子
部品搭載用基板の製造方法。2. A first substrate having an inner conductor circuit formed thereon,
Laminating step of forming a multilayer board by bonding at least one second substrate having an opening located above the electronic component mounting portion via an adhesive layer, and providing a through hole at a predetermined position of the multilayer board. Step B, step C of applying a plating catalyst to the entire surface of the multilayer board, electronic component mounting area, and through holes, step D of attaching a dry film to the entire surface of the multilayer board, and exposing and penetrating the dry film. The step E is to develop and remove the dry film in the part facing the hole, and leave the dry film in the other part, the step F to perform metal plating in the through hole, the step G to remove the dry film, A method for manufacturing a substrate for mounting a multilayer electronic component, comprising the step H of removing the plating catalyst on the surface of the multilayer plate by soft etching.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4170115A JPH05343849A (en) | 1992-06-04 | 1992-06-04 | Manufacture of multilayer electronic component mounting substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4170115A JPH05343849A (en) | 1992-06-04 | 1992-06-04 | Manufacture of multilayer electronic component mounting substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05343849A true JPH05343849A (en) | 1993-12-24 |
Family
ID=15898920
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4170115A Pending JPH05343849A (en) | 1992-06-04 | 1992-06-04 | Manufacture of multilayer electronic component mounting substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05343849A (en) |
-
1992
- 1992-06-04 JP JP4170115A patent/JPH05343849A/en active Pending
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