JPH0543556U - Hybrid integrated circuit board - Google Patents

Hybrid integrated circuit board

Info

Publication number
JPH0543556U
JPH0543556U JP10010891U JP10010891U JPH0543556U JP H0543556 U JPH0543556 U JP H0543556U JP 10010891 U JP10010891 U JP 10010891U JP 10010891 U JP10010891 U JP 10010891U JP H0543556 U JPH0543556 U JP H0543556U
Authority
JP
Japan
Prior art keywords
insulating layer
integrated circuit
hybrid integrated
circuit board
metal substrates
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP10010891U
Other languages
Japanese (ja)
Inventor
智 星野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP10010891U priority Critical patent/JPH0543556U/en
Publication of JPH0543556U publication Critical patent/JPH0543556U/en
Withdrawn legal-status Critical Current

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  • Insulated Metal Substrates For Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

(57)【要約】 (修正有) 【目的】 金属基板を介して半導体部品相互が熱干渉す
るのを防止し、放熱板からの確実な放熱を可能とする。 【構成】 半導体部品2a、2bは、他の電子部品4、
4…と共に絶縁層1を介し金属基板9a、9b上に搭載
され、絶縁層1の表面に形成された回路配線5に接続さ
れている。金属基板9a、9bは分割部分6を境に互い
に分離されており、2つの半導体部品2a、2bが各々
別の金属基板9a、9bの上に搭載されている。このた
め、一方の半導体部品2aから発生した熱が金属基板9
a、9bを介して他方の半導体部品2bに及ばない。
(57) [Summary] (Correction) [Purpose] Prevents thermal interference between semiconductor components via a metal substrate and enables reliable heat dissipation from a heat sink. [Structure] The semiconductor components 2a and 2b are other electronic components 4,
4 and the like are mounted on the metal substrates 9a and 9b via the insulating layer 1 and connected to the circuit wiring 5 formed on the surface of the insulating layer 1. The metal substrates 9a and 9b are separated from each other with the divided portion 6 as a boundary, and the two semiconductor components 2a and 2b are mounted on different metal substrates 9a and 9b, respectively. Therefore, the heat generated from the one semiconductor component 2a is generated by the metal substrate 9
It does not reach the other semiconductor component 2b via a and 9b.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は、パワートランジスタやFET等の半導体部品を用いた回路装置にお いて、前記半導体部品を冷却するため基板を放熱性がある金属基板を用いた混成 集積回路基板に関する。 The present invention relates to a circuit device using a semiconductor component such as a power transistor or an FET, and to a hybrid integrated circuit substrate using a metal substrate having a heat radiation property for cooling the semiconductor component.

【0002】[0002]

【従来の技術】[Prior Art]

従来、放熱量の多い半導体部品を搭載した混成集積回路基板は、発熱によって 回路機能に支障を来さないように、前記半導体部品を搭載する回路基板として放 熱性の良好な金属基板を用い、この金属基板を介して半導体部品からの放熱を図 っている。例えば、パワ−トランジスタ等発熱量の多い半導体部品は、その半導 体部品の外装体が前記金属基板に直接または間接的に接合される。 Conventionally, a hybrid integrated circuit board on which a semiconductor component with a large amount of heat radiation is mounted uses a metal substrate with good heat dissipation as a circuit board on which the semiconductor component is mounted so that heat generation does not hinder the circuit function. Heat is radiated from semiconductor components through the metal substrate. For example, in a semiconductor component that generates a large amount of heat such as a power transistor, the outer casing of the semiconductor component is directly or indirectly bonded to the metal substrate.

【0003】 これらの発熱し易い半導体部品を搭載した混成集積回路基板は、例えば従来例 を示す図3と図4に示すようなものが知られている。すなわち、図3と図4で示 された混成集積回路基板には、発熱量の多いパワ−トランジスタ等の半導体部品 2、2が2個用いられている。金属基板9の上に絶縁層1が形成され、前記半導 体部品2、2と他の電子部品4、4…とがこの絶縁層1の上に搭載されている。 絶縁層1の一方の辺には、導電ランド8、8…が形成され、各々の電極ランド8 、8…にリード端子7、7の一端が半田付けされ、絶縁層1の側方に導出されて いる。As the hybrid integrated circuit board on which these semiconductor components that easily generate heat are mounted, for example, those shown in FIGS. 3 and 4 showing a conventional example are known. That is, the hybrid integrated circuit board shown in FIGS. 3 and 4 uses two semiconductor components 2, 2 such as power transistors that generate a large amount of heat. An insulating layer 1 is formed on a metal substrate 9, and the semiconductor components 2, 2 and other electronic components 4, 4, ... Are mounted on the insulating layer 1. The conductive lands 8, 8 ... Are formed on one side of the insulating layer 1, and one ends of the lead terminals 7, 7 are soldered to the respective electrode lands 8, 8 ... And led out to the side of the insulating layer 1. ing.

【0004】[0004]

【考案が解決しようとする課題】[Problems to be solved by the device]

このような金属基板9を用いた高周波電力増幅器は、最近の携帯電話等の小型 化に対応するため、より小型化の要求が高まり、図3及び図4に示されたように 、半導体部品2、2が近接して搭載されることが多くなっている。 The high frequency power amplifier using such a metal substrate 9 corresponds to the recent miniaturization of mobile phones and the like, and thus the demand for further miniaturization is increasing, and as shown in FIGS. 2 are often mounted close to each other.

【0005】 ところが、このようにして半導体部品2、2が近接して搭載されると、熱伝導 良好な前記金属基板9を介して一方の半導体部品2から発する熱が他方の半導体 部品2に及んだり、或は双方の半導体部品2、2から発する熱がその間に集中し 、金属基板9から円滑に放熱されないという事態が起こることがある。このよう にして、半導体部品2、2から発せられる熱が、金属基板9を介して相互に他方 の半導体2、2に及び、いわば熱干渉が起こるため、金属基板9に局部的な不測 の温度上昇等が起こり、放熱が当初の設計通りに確実になされないという課題が あった。 本考案の目的は、前記従来技術の課題を解消し、半導体部品相互の熱干渉を防 止し、金属基板からの確実な放熱を可能とすることが出来る混成集積回路基板を 提供する事にある。However, when the semiconductor components 2 and 2 are mounted close to each other in this manner, the heat generated from one semiconductor component 2 is transmitted to the other semiconductor component 2 via the metal substrate 9 having good thermal conductivity. In some cases, the heat generated from the semiconductor components 2 and 2 of both of them may be concentrated in the meantime, and the heat may not be radiated smoothly from the metal substrate 9. In this way, the heat generated from the semiconductor components 2 and 2 reaches the other semiconductors 2 and 2 via the metal substrate 9 and, so to speak, thermal interference occurs. As a result, there was a problem that the heat was not released exactly as originally designed due to rises and the like. It is an object of the present invention to provide a hybrid integrated circuit board that solves the above-mentioned problems of the prior art, prevents thermal interference between semiconductor components, and enables reliable heat dissipation from a metal board. .

【0006】[0006]

【課題を解消する為の手段】[Means for solving the problem]

すなわち本考案では、前記目的を達成するため、金属基板9a、9bと、該金 属基板9a、9bの上に形成され、表面に回路配線5が形成された絶縁層1と、 該絶縁層1を介して金属基板9a、9b上に搭載され、前記回路配線5に接続さ れた複数の半導体部品2a、2bとを有する混成集積回路基板において、該金属 基板9a、9bが各半導体部品2a、2b毎に分割され、各半導体部品2a、2 bが前記絶縁層1を介して各々別の該金属基板9a、9bの上に搭載されている ことを特徴とする混成集積回路基板を提供する。 That is, according to the present invention, in order to achieve the above object, the metal substrates 9a and 9b, the insulating layer 1 formed on the metal substrates 9a and 9b and having the circuit wiring 5 formed on the surface thereof, and the insulating layer 1 are formed. In a hybrid integrated circuit board having a plurality of semiconductor components 2a, 2b mounted on the metal substrates 9a, 9b via the above and connected to the circuit wiring 5, the metal substrates 9a, 9b are the semiconductor components 2a, Provided is a hybrid integrated circuit board, characterized in that the semiconductor parts 2a and 2b are each divided into 2b and are mounted on the different metal boards 9a and 9b via the insulating layer 1 respectively.

【0007】[0007]

【作 用】[Work]

本考案による混成集積回路基板では、各半導体部品2a、2b毎に金属基板9 a、9bが分割され、各々の金属基板9a、9bの上に絶縁層1を介して各々1 つずつの半導体部品2a、2bが搭載されていることから、一方の半導体部品2 aから発生した熱が金属基板9a、9bを介して他方の半導体部品2bに及ばな い。このため、半導体部品2a、2b相互の熱干渉が起こらず、個々の半導体部 品2a、2bから発生した熱が各々の金属基板9a、9bから放熱される。従っ て、不測の熱伝導が起こらず、設計上当初予想された放熱がほぼ確実になされる 。 In the hybrid integrated circuit board according to the present invention, the metal substrates 9a and 9b are divided for each of the semiconductor components 2a and 2b, and one semiconductor component is provided on each of the metal substrates 9a and 9b via the insulating layer 1. Since 2a and 2b are mounted, the heat generated from one semiconductor component 2a does not reach the other semiconductor component 2b via the metal substrates 9a and 9b. Therefore, thermal interference between the semiconductor components 2a and 2b does not occur, and the heat generated from the individual semiconductor components 2a and 2b is radiated from the respective metal substrates 9a and 9b. Therefore, unexpected heat conduction does not occur, and the heat radiation originally expected in the design is almost certainly achieved.

【0008】[0008]

【実 施 例】【Example】

次に、図面を参照しながら、本考案の実施例について具体的に説明する。 図1と図2に示された混成集積回路基板は、既に説明した図3と図4で示され た混成集積回路基板と基本的にはほぼ共通する構成を有している。すなわち、金 属基板9a、9b上に絶縁層1が形成され、2個用の半導体部品2a、2bと共 に他の電子部品4、4…が前記絶縁層1を介して金属基板9a、9bの上に搭載 されている。半導体部品2a、2bが搭載される側と同じ側の絶縁層1の表面に は導電体パターン、抵抗パターン、絶縁パターン等からなる回路配線5が形成さ れている。 Next, an embodiment of the present invention will be specifically described with reference to the drawings. The hybrid integrated circuit boards shown in FIGS. 1 and 2 have basically the same structure as the hybrid integrated circuit boards shown in FIGS. 3 and 4 described above. That is, the insulating layer 1 is formed on the metal substrates 9a and 9b, and the two semiconductor components 2a and 2b, as well as the other electronic components 4, 4, ... Are provided on the metal substrates 9a and 9b via the insulating layer 1. It is mounted on. A circuit wiring 5 including a conductor pattern, a resistance pattern, an insulation pattern, etc. is formed on the surface of the insulating layer 1 on the side on which the semiconductor components 2a and 2b are mounted.

【0009】 金属基板9a、9bは、図2において左右両側に分割されており、2つの金属 基板9a、9bが互いに別体となっている。これら金属基板9a、9bは分割部 分6を境に図2において作用に分離するように、前記絶縁層1の部品搭載側と反 対側の主面で接着剤等により接合されている。The metal substrates 9a and 9b are divided into left and right sides in FIG. 2, and the two metal substrates 9a and 9b are separate from each other. These metal substrates 9a and 9b are joined by an adhesive or the like on the principal surface of the insulating layer 1 on the component mounting side and the opposite side so as to be divided into the functions in FIG.

【0010】 絶縁層1の一方の辺には、導電ランド8、8…が形成され、各々の電極ランド 8、8…にリ−ド端子7、7…の一端が半田付けされ、絶縁層1の側方に導出さ れている。 なお、以上の実施例では、絶縁層1に搭載される半導体部品2a、2bが2個 である場合を示したが、半導体部品2a、2bが3個以上の場合でも本考案を適 用できることは明かである。この場合、金属基板9a、9bは、各半導体部品2 a、2b毎に3個以上に分割することは、前記実施例と基本的に同様である。The conductive lands 8, 8 ... Are formed on one side of the insulating layer 1, and one ends of the lead terminals 7, 7 ... Are soldered to the respective electrode lands 8, 8 ,. Is derived to the side of. In the above embodiments, the case where the number of the semiconductor components 2a and 2b mounted on the insulating layer 1 is two has been described, but the present invention can be applied even when the number of the semiconductor components 2a and 2b is three or more. It's clear. In this case, the metal substrates 9a and 9b are basically divided into three or more for each semiconductor component 2a and 2b, which is basically the same as the above-mentioned embodiment.

【0011】[0011]

【考案の効果】[Effect of the device]

以上説明した通り、本考案によれば、絶縁層1に搭載された複数の半導体部品 2a、2bが金属基板9a、9bを介して相互に熱干渉することが防止され、局 部的な不測の温度上昇等が起こらず、設計上当初予想された放熱が可能となると いう効果が得られる。 As described above, according to the present invention, it is possible to prevent the plurality of semiconductor components 2a and 2b mounted on the insulating layer 1 from interfering with each other through the metal substrates 9a and 9b, and to prevent a local unexpected occurrence. It is possible to obtain the effect that the originally designed heat dissipation is possible without the temperature rising.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の実施例を示す混成集積回路基板の斜視
図である。
FIG. 1 is a perspective view of a hybrid integrated circuit board showing an embodiment of the present invention.

【図2】同混成集積回路基板の側面図である。FIG. 2 is a side view of the hybrid integrated circuit board.

【図3】従来例を示す混成集積回路基板の斜視図であ
る。
FIG. 3 is a perspective view of a hybrid integrated circuit board showing a conventional example.

【図4】同混成集積回路基板の側面図である。FIG. 4 is a side view of the hybrid integrated circuit board.

【符号の説明】[Explanation of symbols]

1 絶縁基板 2a 発熱性の半導体部品 2b 発熱性の半導体部品 4 一般の電子部品 5 回路配線 9a 放熱板 9b 放熱板 DESCRIPTION OF SYMBOLS 1 Insulating substrate 2a Exothermic semiconductor component 2b Exothermic semiconductor component 4 General electronic component 5 Circuit wiring 9a Heat sink 9b Heat sink

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 FI 技術表示箇所 H01L 23/14 7352−4M H01L 23/14 M ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Office reference number FI Technical display location H01L 23/14 7352-4M H01L 23/14 M

Claims (1)

【整理番号】 0030214−01 【実用新案登録請求の範囲】[Reference number] 0030214-01 [Claims for utility model registration] 【請求項1】 金属基板9a、9bと、該金属基板9
a、9bの上に形成され、表面に回路配線5が形成され
た絶縁層1と、該絶縁層1を介して金属基板9a、9b
上に搭載され、前記回路配線5に接続された複数の半導
体部品2a、2bとを有する混成集積回路基板におい
て、該金属基板9a、9bが各半導体部品2a、2b毎
に分割され、各半導体部品2a、2bが前記絶縁層1を
介して各々別の該金属基板9a、9bの上に搭載されて
いることを特徴とする混成集積回路基板。
1. Metal substrates 9a, 9b and the metal substrate 9
an insulating layer 1 formed on a and 9b and having a circuit wiring 5 formed on the surface, and metal substrates 9a and 9b via the insulating layer 1.
In a hybrid integrated circuit board having a plurality of semiconductor components 2a, 2b mounted thereon and connected to the circuit wiring 5, the metal substrates 9a, 9b are divided for each semiconductor component 2a, 2b, 2. A hybrid integrated circuit board, wherein 2a and 2b are mounted on different metal boards 9a and 9b via the insulating layer 1 respectively.
JP10010891U 1991-11-09 1991-11-09 Hybrid integrated circuit board Withdrawn JPH0543556U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10010891U JPH0543556U (en) 1991-11-09 1991-11-09 Hybrid integrated circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10010891U JPH0543556U (en) 1991-11-09 1991-11-09 Hybrid integrated circuit board

Publications (1)

Publication Number Publication Date
JPH0543556U true JPH0543556U (en) 1993-06-11

Family

ID=14265187

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10010891U Withdrawn JPH0543556U (en) 1991-11-09 1991-11-09 Hybrid integrated circuit board

Country Status (1)

Country Link
JP (1) JPH0543556U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009055116A (en) * 2007-08-23 2009-03-12 Sanyo Electric Co Ltd Low pass filter and audio amplifier

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009055116A (en) * 2007-08-23 2009-03-12 Sanyo Electric Co Ltd Low pass filter and audio amplifier

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Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19960208