JPH0544794Y2 - - Google Patents
Info
- Publication number
- JPH0544794Y2 JPH0544794Y2 JP1987169704U JP16970487U JPH0544794Y2 JP H0544794 Y2 JPH0544794 Y2 JP H0544794Y2 JP 1987169704 U JP1987169704 U JP 1987169704U JP 16970487 U JP16970487 U JP 16970487U JP H0544794 Y2 JPH0544794 Y2 JP H0544794Y2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- terminal
- terminals
- circuit board
- wiring pattern
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Electric Clocks (AREA)
- Electromechanical Clocks (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Description
【考案の詳細な説明】
〔産業上の利用分野〕
本考案は、ICチツプの実装構造に関するもの
である。[Detailed description of the invention] [Field of industrial application] The present invention relates to a mounting structure of an IC chip.
ICチツプの実装構造として、特開昭59−
138341、特開昭56−50544、特開昭59−120884が
考案されている。これらは、配線パターンとIC
チツプの端子を金線、溶着、半田付け等で接続
し、更に接続部分を補強するためにモールド剤で
固着したものである。
As a mounting structure for IC chips,
138341, JP-A-56-50544, and JP-A-59-120884 were devised. These are the wiring pattern and IC
The terminals of the chip are connected using gold wire, welding, soldering, etc., and then fixed with a molding agent to reinforce the connected parts.
しかし、従来の実装方式では配線パターンと
ICチツプの端子を金線、溶着、半田付けで接続
する工程やモールドを行なう工程であるICチツ
プの実装工程を要した。又、この実装工程の不良
については修正が不可能であつた。しかも、IC
チツプや回路基板は他の時計部品と比較しても高
価なものであり、実装工程の歩留りは回路ブロツ
クのコストを左右することは周知である。
However, with conventional mounting methods, the wiring pattern
The IC chip mounting process involved connecting the IC chip terminals with gold wire, welding, and soldering, as well as molding. Furthermore, it was impossible to correct defects in this mounting process. Moreover, IC
Chips and circuit boards are expensive compared to other watch components, and it is well known that the yield of the mounting process affects the cost of the circuit block.
そこで本考案の目的とするところは、実装工程
を簡素化しコストの低減を図るとともに、実装工
程の不良についても簡単に修正できるという効果
を得ることにある。 Therefore, an object of the present invention is to simplify the mounting process and reduce costs, and to obtain the effect that defects in the mounting process can be easily corrected.
本考案の時計用ICチツプの実装構造は、複数
の端子を有し機枠に載置されるICチツプ、該IC
チツプの端子にそれぞれ対向する配線パターンを
設けた絶縁部材、弾性部を有し前記ICチツプを
押圧する押圧部材を有して成り、前記押圧部材の
弾性により、前記配線パターンと前記ICチツプ
の端子とを導通可能に圧接するよう構成したこと
を特徴とする。
The mounting structure of the IC chip for a watch of the present invention consists of an IC chip that has multiple terminals and is mounted on a machine frame;
It comprises an insulating member provided with wiring patterns facing the terminals of the chip, and a pressing member having an elastic part for pressing the IC chip, and the elasticity of the pressing member causes the wiring patterns and the terminals of the IC chip to The invention is characterized in that it is configured such that they are electrically connected to each other by pressure.
以下に、本考案の実施例を図面にもとづいて詳
細に説明する。
Embodiments of the present invention will be described in detail below based on the drawings.
第１図は本考案の実施例を示す平面図、第２図
はその主要断面図である。 FIG. 1 is a plan view showing an embodiment of the present invention, and FIG. 2 is a main sectional view thereof.
１は機枠である合成樹脂で成形した地板であ
り、ICチツプ４を収納する凹部１ａを有してい
る。２は地板１に載置し、地板１に対向する側に
配線パターンを形成した絶縁部材である回路基板
である。３は弾性部を有するとともに回路基板２
の上面に載置した押圧部材である回路受である。
４はICチツプであり、金バンプで形成したステ
ツプモータ用出力端子、リセツト端子、水晶ユニ
ツト用端子、VDD端子、VSS端子、回路ブロツク
としての検査を行なうテスト用端子、歩度調整デ
ータ等を書き込むための書き込み用端子、ICチ
ツプ単体で検査するためのテスト用端子4Ｋ，41，4
Ｗを有している。５は水晶ユニツト、６は永久磁
石とかなから成るロータ１０とステータ１１とコ
イルブロツクから構成した周知のステツプモータ
のコイルブロツクである。回路基板２はICチツ
プ４の各端子に対向するステツプモータ用出力端
子パターン２ａ，２ｂ、水晶振動子のゲート、ド
レインの端子に接続されるゲートパターン２ｃ、
ドレインパターン２ｄ、VDDパターン２ｅ、VSS
パターン２ｆ、リセツトパターン２ｇ、テスト用
端子パターン２ｈ，２ｉ、書き込み用端子パター
ス２ｊを形成してある。又、各パターンの表面
（回路基板と銅箔の接続面を除いた面）には金メ
ツキを施してある。但しテスト用端子4Ｋ，41，4Ｗ
はICチツプ単体で検査する端子のため、テスト
用端子4Ｋ，41，4Ｗに対向したパターンは不要であ
る。ICチツプ４の各端子と配線パターンの平面
位置を決める手段としては、地板の凹部１ａの壁
によつてICチツプ４の外形が位置決めされてお
り、回路基板２は地板１に形成された２本のダボ
１ｂ，１ｃによつて位置決めされている。従つ
て、ICチツプの各端子とそれぞれに対向するパ
ターンは相対的に位置を決められている。又、
ICチツプ４の各端子とそれに対向する配線パタ
ーンの導通については、地板の凹部１ａの底面と
回路受３の押えばね（２本）３ａによつて押圧す
ることで得られている。又、回路基板２は図示し
たとおり、絶縁体であるベースを回路受３の押え
ばね３ａと配線パターンの間に介在したことでシ
ヨート防止をしている。押えばね３ａは２本で説
明したが、複数本で形成してもよい。例えばIC
チツプ４の四隅の近傍を４本のばねを用いて押え
ても良く、導通を得ようとする端子と配線パター
ンと同数のばねを用いて押圧してもよい。この場
合、回路基板２には、各配線パターン間に切り込
みを入れることによつて、各端子の高さのバラツ
キを吸収できるため、導通の信頼性をより向上で
きる。以上のような構成にしたことから実装工程
としては、地板の凹部１ａにICチツプ４を組み
込み、回路基板２、その上に回路受３を載置し
て、ねじ等で地板１と回路受３を固定することに
よつて実装できる。次に組み上がつた時計（ムー
ブメント）状態で作動チエツクや歩度調整を実施
する。従つて、実装としては、各部品を組み込ん
で行くだけで完成するため非常に簡単になつてい
る。又、実装をする上での不良は、熱圧着やワイ
ヤーボンドをしないため皆無となる。万が一不良
が出たとしても回路受３、回路基板２を外し、
ICチツプ４等の不良部品を交換すれば容易に修
理ができる。 Reference numeral 1 denotes a base plate molded from synthetic resin, which is a machine frame, and has a recess 1a in which an IC chip 4 is housed. Reference numeral 2 denotes a circuit board, which is an insulating member, placed on the base plate 1 and having a wiring pattern formed on the side facing the base plate 1. 3 has an elastic part and a circuit board 2
This is a circuit holder which is a pressing member placed on the top surface of the .
4 is an IC chip, which is made of gold bumps and contains a step motor output terminal, a reset terminal, a crystal unit terminal, a V DD terminal, a V SS terminal, a test terminal for testing as a circuit block, rate adjustment data, etc. Write terminal for writing, test terminal for inspecting a single IC chip 4K , 41 , 4
It has W. Reference numeral 5 indicates a crystal unit, and reference numeral 6 indicates a coil block of a well-known step motor, which is composed of a rotor 10 and a stator 11 made of permanent magnets or pins, and a coil block. The circuit board 2 has step motor output terminal patterns 2a and 2b facing each terminal of the IC chip 4, a gate pattern 2c connected to the gate and drain terminals of the crystal resonator,
Drain pattern 2d, V DD pattern 2e, V SS
A pattern 2f, a reset pattern 2g, test terminal patterns 2h and 2i, and a write terminal pattern 2j are formed. Furthermore, the surface of each pattern (excluding the connection surface between the circuit board and the copper foil) is plated with gold. However, test terminals 4K , 41 , 4W
Since these are terminals that are tested on the IC chip alone, there is no need for a pattern facing the test terminals 4K , 41 , and 4W . As a means for determining the planar position of each terminal and wiring pattern of the IC chip 4, the outer shape of the IC chip 4 is positioned by the wall of the recess 1a of the base plate, and the circuit board 2 is placed between two terminals formed on the base plate 1. It is positioned by dowels 1b and 1c. Therefore, the positions of each terminal of the IC chip and the patterns facing each other are determined relative to each other. or,
Continuity between each terminal of the IC chip 4 and the wiring pattern facing it is achieved by pressing the bottom surface of the recess 1a of the base plate with the pressing springs (two) 3a of the circuit receiver 3. Further, as shown in the figure, the circuit board 2 has a base made of an insulator interposed between the pressing spring 3a of the circuit receiver 3 and the wiring pattern to prevent short circuits. Although the description has been made using two pressing springs 3a, a plurality of pressing springs 3a may be used. For example, IC
The vicinity of the four corners of the chip 4 may be pressed using four springs, or the same number of springs as the number of terminals and wiring patterns to be established may be used to press the chip 4. In this case, by making cuts in the circuit board 2 between each wiring pattern, variations in the height of each terminal can be absorbed, so that the reliability of conduction can be further improved. With the above configuration, the mounting process involves assembling the IC chip 4 into the recess 1a of the base plate, placing the circuit board 2 and the circuit receiver 3 on it, and fixing the base plate 1 and the circuit receiver 3 with screws, etc. This can be implemented by fixing . Next, check the operation and adjust the rate of the assembled watch (movement). Therefore, the implementation is extremely simple, as it can be completed by simply incorporating each component. In addition, there are no defects during mounting because there is no thermocompression bonding or wire bonding. Even if a defect occurs, remove the circuit receiver 3 and circuit board 2,
It can be easily repaired by replacing defective parts such as IC chip 4.
次に第３図において本考案の他の実施例につい
て説明する。１は合成樹脂を成形した地板であ
り、押えばね１ｄ（２本）を有している。２は回
路基板、４はICチツプ（前述の実施例と同じ）、
３は回路受である。回路基板２には、ICチツプ
４の外形と略同一形状で形成した穴２ｋを設け、
各端子に対向する配線パターンはオーバーハング
（穴内に伸長させた形状）させてある。又、ICチ
ツプ４は、回路基板の穴２ｋに案内されている。
ICチツプ４の各端子とそれに対向する配線パタ
ーンは、回路受３と地板の押えばね１ｄによつて
押圧されて導通をとつている。 Next, referring to FIG. 3, another embodiment of the present invention will be described. Reference numeral 1 denotes a base plate molded from synthetic resin, and has pressing springs 1d (two pieces). 2 is a circuit board, 4 is an IC chip (same as the previous embodiment),
3 is a circuit receiver. The circuit board 2 is provided with a hole 2k formed in substantially the same shape as the outer shape of the IC chip 4,
The wiring pattern facing each terminal is overhanged (extended into the hole). Further, the IC chip 4 is guided into the hole 2k of the circuit board.
Each terminal of the IC chip 4 and the wiring pattern facing the terminal are pressed by a pressing spring 1d on the circuit receiver 3 and the base plate to establish continuity.
以上説明した実施例は板ばねによつてICチツ
プの端子と配線パターン間の導通を可能としてい
るが、コイルばねやゴム等の弾性部材を用いても
よい。 Although the embodiments described above enable conduction between the terminals of the IC chip and the wiring pattern using leaf springs, an elastic member such as a coil spring or rubber may also be used.
以上のように、回路基板、あるいは地板にIC
チツプとパターンの平面的な位置決めをし、回路
受でICチツプを押圧することによつて、ICチツ
プの実装において回路基板とICチツプを固着さ
せない実装構造にしたことで、実装工数の削減が
できるとともに、実装工程、或はICチツプや回
路基板の不良があつても回路受を外すことによつ
て容易に取りかえることができる等の優れた効果
を有するものである。更にICチツプのバンプや
配線パターンのIC端子との接触部に設けた突起
は、多数の端子と配線パターンの接続を容易にす
るとともに、接触部の接点圧を高められることか
ら導通の信頼性を高められる効果も生む。
As mentioned above, ICs are installed on the circuit board or ground plane.
By positioning the chip and pattern on a plane and pressing the IC chip with the circuit holder, we have created a mounting structure that does not allow the circuit board and IC chip to stick together during IC chip mounting, reducing the number of mounting steps. Additionally, even if there is a defect in the mounting process or in the IC chip or circuit board, it can be easily replaced by removing the circuit receiver. Furthermore, the bumps on the IC chip and the protrusions provided at the contact parts of the wiring patterns with the IC terminals not only facilitate the connection of multiple terminals and the wiring patterns, but also improve the reliability of continuity by increasing the contact pressure at the contact parts. It also produces an enhanced effect.
第１図は、本考案の実施例を示す平面図、第２
図はその主要断面図である。第３図は本考案の他
の実施例を示す断面図である。
１……地板、２……回路基板、３……回路受、
４……ICチツプ。
FIG. 1 is a plan view showing an embodiment of the present invention, and FIG.
The figure is its main sectional view. FIG. 3 is a sectional view showing another embodiment of the present invention. 1... Ground plate, 2... Circuit board, 3... Circuit receiver,
4...IC chip.
Claims (1)
が載置される機枠、前記ICチツプの端子にそれ
ぞれ対向する配線パターンを設けた絶縁部材、前
記機枠に設けられ前記ICチツプを押圧する押圧
部材から成る時計用ICチツプの実装構造におい
て、 前記機枠はICが配置される穴部が設けられ、 前記配線パターンは前記穴部に突出されるオー
バーハング部が設けられており、 前記押圧部材は前記配線パターンと前記ICチ
ツプの端子とを導通可能に圧接する弾性部を有す
ることを特徴とする時計用ICチツプの実装構造。[Claims for Utility Model Registration] An IC chip having a plurality of terminals, a machine frame on which the IC chip is placed, an insulating member provided with wiring patterns facing the terminals of the IC chip, and a machine frame provided on the machine frame. In the watch IC chip mounting structure comprising a pressing member that presses the IC chip, the machine frame is provided with a hole in which the IC is placed, and the wiring pattern is provided with an overhang portion that protrudes into the hole. A mounting structure for an IC chip for a watch, wherein the pressing member has an elastic portion that presses the wiring pattern and the terminal of the IC chip in electrically conductive contact.
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987169704U JPH0544794Y2 (en) | 1987-11-06 | 1987-11-06 | |
| GB8804409A GB2203270B (en) | 1987-03-05 | 1988-02-25 | Timepiece assembly. |
| US07/164,299 US5008868A (en) | 1987-03-05 | 1988-03-04 | Structure for mounting an integrated circuit |
| CH848/88A CH678256B5 (en) | 1987-03-05 | 1988-03-07 | |
| KR1019880003776A KR910008672B1 (en) | 1987-11-06 | 1988-04-04 | Structure for mounting ic chip for timepiece |
| CN88104877A CN1016289B (en) | 1987-11-06 | 1988-08-06 | Mounting structure for ic chip for timepiese |
| SG41694A SG41694G (en) | 1987-03-05 | 1994-03-22 | Timepiece assembly |
| HK40894A HK40894A (en) | 1987-03-05 | 1994-04-28 | Timepiece assembly |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987169704U JPH0544794Y2 (en) | 1987-11-06 | 1987-11-06 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0174595U JPH0174595U (en) | 1989-05-19 |
| JPH0544794Y2 true JPH0544794Y2 (en) | 1993-11-15 |
Family
ID=31460000
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987169704U Expired - Lifetime JPH0544794Y2 (en) | 1987-03-05 | 1987-11-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0544794Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012059869A (en) * | 2010-09-08 | 2012-03-22 | Toyobo Co Ltd | Fixing member |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6219990Y2 (en) * | 1979-06-05 | 1987-05-21 | ||
| JPS5661062U (en) * | 1979-10-16 | 1981-05-23 | ||
| JPS6126194U (en) * | 1984-07-23 | 1986-02-17 | セイコーエプソン株式会社 | Electronic clock circuit structure |
-
1987
- 1987-11-06 JP JP1987169704U patent/JPH0544794Y2/ja not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0174595U (en) | 1989-05-19 |
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