JPH0545984B2 - - Google Patents
Info
- Publication number
- JPH0545984B2 JPH0545984B2 JP58085752A JP8575283A JPH0545984B2 JP H0545984 B2 JPH0545984 B2 JP H0545984B2 JP 58085752 A JP58085752 A JP 58085752A JP 8575283 A JP8575283 A JP 8575283A JP H0545984 B2 JPH0545984 B2 JP H0545984B2
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- instructions
- executed
- time interval
- arithmetic unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a secondary processor, e.g. coprocessor
-
- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F02—COMBUSTION ENGINES; HOT-GAS OR COMBUSTION-PRODUCT ENGINE PLANTS
- F02B—INTERNAL-COMBUSTION PISTON ENGINES; COMBUSTION ENGINES IN GENERAL
- F02B75/00—Other engines
- F02B75/02—Engines characterised by their cycles, e.g. six-stroke
- F02B2075/022—Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle
- F02B2075/025—Engines characterised by their cycles, e.g. six-stroke having less than six strokes per cycle two
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8575283A JPS59212961A (ja) | 1983-05-18 | 1983-05-18 | データ処理装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8575283A JPS59212961A (ja) | 1983-05-18 | 1983-05-18 | データ処理装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59212961A JPS59212961A (ja) | 1984-12-01 |
| JPH0545984B2 true JPH0545984B2 (de) | 1993-07-12 |
Family
ID=13867584
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8575283A Granted JPS59212961A (ja) | 1983-05-18 | 1983-05-18 | データ処理装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59212961A (de) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0378415A3 (de) * | 1989-01-13 | 1991-09-25 | International Business Machines Corporation | Verteilungsmechanismus für mehrere Befehle |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6019028B2 (ja) * | 1977-08-26 | 1985-05-14 | 株式会社日立製作所 | 情報処理装置 |
| JPS5537663A (en) * | 1978-09-11 | 1980-03-15 | Toshiba Corp | Start system of option hardware |
| JPS5829051A (ja) * | 1981-08-17 | 1983-02-21 | Nec Corp | 演算処理装置 |
-
1983
- 1983-05-18 JP JP8575283A patent/JPS59212961A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59212961A (ja) | 1984-12-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4532589A (en) | Digital data processor with two operation units | |
| US4879646A (en) | Data processing system with a pipelined structure for editing trace memory contents and tracing operations during system debugging | |
| JP3984786B2 (ja) | 異なる待ち時間を伴う命令のスケジューリング | |
| US4409654A (en) | Data processor adapted for interruption to an instruction stream | |
| US6304954B1 (en) | Executing multiple instructions in multi-pipelined processor by dynamically switching memory ports of fewer number than the pipeline | |
| KR100346515B1 (ko) | 수퍼파이프라인된수퍼스칼라프로세서를위한임시파이프라인레지스터파일 | |
| JPH077385B2 (ja) | データ処理装置 | |
| US5832202A (en) | Exception recovery in a data processing system | |
| JP2002163127A (ja) | トレース制御回路 | |
| EP0223150B1 (de) | Informationsverarbeitungsvorrichtung | |
| US5590359A (en) | Method and apparatus for generating a status word in a pipelined processor | |
| US20080016321A1 (en) | Interleaved hardware multithreading processor architecture | |
| US5276822A (en) | System with enhanced execution of address-conflicting instructions using immediate data latch for holding immediate data of a preceding instruction | |
| US8631173B2 (en) | Semiconductor device | |
| US6016541A (en) | Instruction controlling system and method thereof | |
| JPH0545984B2 (de) | ||
| US5682521A (en) | Microprocessor control system which selects operating instructions and operands in an order based upon the number of transferred executable operating instructions | |
| US6981130B2 (en) | Forwarding the results of operations to dependent instructions more quickly via multiplexers working in parallel | |
| WO2024146076A1 (zh) | 乱序处理器中队列的队列项选择方法及装置 | |
| JPH0545983B2 (de) | ||
| JP2901247B2 (ja) | 掃出し制御方式 | |
| JPH07111683B2 (ja) | タスク切換機能付プロセッサ | |
| JP2682759B2 (ja) | 命令フェッチ回路 | |
| JP2927102B2 (ja) | 命令列切り替え方法及びそれを用いた演算プロセッサ | |
| EP0556825A1 (de) | Mikroprozessor |