JPH0548070A - Solid-state image sensing device - Google Patents

Abstract

PURPOSE:To lessen the power consumption by reducing the interphase capacitance of a CCD resistor, in a solid-state image sensing device. CONSTITUTION:Regions deeper in potential than other parts are made inside a charge accumulation part 4 by providing stops at the gate films below the transfer electrodes 1 and 2 of the charge accumulation part of CCD. The capacitance between layers is lessened by pitting this in such structure that only the transfer electrode on this region overlaps the adjacent transfer electrode.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device, and more particularly to a charge coupled device (hereinafter abbreviated as CCD) of the solid-state image pickup device.

[0002]

2. Description of the Related Art FIG. 4A shows an example of the structure of a transfer electrode of a CCD register in a conventional solid-state image pickup device, which is composed of a first layer transfer electrode 1 and a second layer transfer electrode 2. FIG. 4B is a sectional view taken along the line BB ′ in FIG. 4A and is composed of the transfer electrode 2, the gate oxide film 3, the charge storage section 4, and the channel stopper 5. Figure 4
As shown in (a), the transfer electrode is composed of two electrode layers, and the transfer electrode is formed so as to fill the gap of the first electrode layer.
A second electrode layer is formed, and the two electrode layers are formed so as to completely overlap with each other.

FIG. 5 shows a sectional view taken along the line CC 'of FIG. 4A and a potential diagram during charge transfer. After the first-layer transfer electrodes 1 are formed and covered with the interlayer insulating film 10 in order to make the interval between the adjacent transfer electrodes small enough not to create a potential barrier,
The second layer transfer electrode 2 is formed so as to fill the gap. At this time, it is difficult to form the second layer transfer electrode 2 only in the gap of the first layer transfer electrode 1 in view of the current photolithography technique, and an overlay is formed to allow misalignment to facilitate electrode formation. ing. In the case of the structure without superposition, as shown in FIG. 6, the interval between adjacent electrodes is separated, and a potential barrier is formed at that portion, so that transfer failure occurs.

In recent years, the number of pixels has been increasing in order to increase the resolution of solid-state image pickup devices, but the driving frequency is also increasing accordingly. If the power consumption of the CCD resistor is P, the drive frequency is F _c clock pulse amplitude is V _{cp, and the} load capacitance is C, then

[0005]

Therefore, if V _cp C is constant, the power consumption tends to increase as the driving frequency increases.

[0007]

The power consumption can be reduced by reducing the load capacitance of the clock pulse amplitude. However, if the clock pulse amplitude is reduced, the signal transfer efficiency deteriorates and the resolution characteristic deteriorates. It cannot be made smaller. Therefore, it is desired to reduce the load capacity. The load capacity of the CCD register is the transfer capacity between the transfer electrode and the Si substrate via the gate oxide film, and between the transfer electrodes adjacent to each other via the oxide film at the portion where the transfer electrodes are superposed on each other. There is interphase capacitance that results. The transfer charge is a factor that determines the maximum transfer charge amount because signal charges are accumulated in this transfer and transferred one after another.
Further, the interphase capacitance cannot be eliminated in order to form a structure in which electrodes can be easily formed and charge can be transferred without transfer failure. Therefore, if the load capacitance is reduced to improve the power consumption, the maximum transfer charge amount is reduced, the transfer efficiency is deteriorated, or the transfer electrode formation becomes difficult.

The present invention solves the above problems and is a CCD with low power consumption, large maximum transfer charge amount, and high transfer efficiency.
An object is to provide a solid-state imaging device including a register.

[0009]

According to the solid-state image pickup device of the present invention, a region where the potential is deeper than the other regions is formed in a part of the charge storage region of the CCD register, and the CCD is positioned above the region where the potential is deep. The transfer register has a CCD register having a structure in which only the transfer electrodes overlap with the adjacent transfer electrodes. In addition, the deep potential region in the charge storage region of the solid-state imaging device of the present invention is
It is formed by providing a step on the gate film below the transfer electrode of the CCD register.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1A shows a CCD of a solid-state image pickup device of the present invention.
The structure of the transfer electrode of the register is shown, and FIG. 1B is a sectional view taken along the line AA ′ in FIG. Figure 1
In FIG. 4, the same components as those of the conventional apparatus shown in FIG. 4 are designated by the same reference numerals. As shown in FIG. 1B, in this embodiment, a step is formed in the central portion of the gate oxide film 3 below the transfer electrode 2. This step is formed by etching the central portion of the gate oxide film to the substrate surface and then thinly oxidizing it. At this time, in the thin region 6 of the gate oxide film 3 below the transfer electrode 2, the potential of the charge storage portion 4 becomes deep. Also, FIG.
As shown in (a), the superposition of the transfer electrodes is formed only on the region where the potential of the charge storage portion is deep. In the present embodiment, the transfer electrode 2 of the second layer is projected and overlaps with the transfer electrode 1 of the first layer, but of course, the transfer electrode of the first layer may be projected. In this way, by reducing the overlapping amount of the transfer electrodes, the interphase capacitance can be reduced and the power consumption can be reduced.

The charge transfer of the CCD register of this embodiment will be described. As shown in the potential diagram of FIG. 5, charges are transferred by the difference in the potentials of the adjacent transfer electrodes. First, between the adjacent transfer electrodes. 2 transfers the signal charges in a deep electric potential region with superposition, and subsequently, as shown in FIG. 2, the electric potential in a shallow electric potential region without superposition between the electrodes is transferred to the deep electric potential region after the charge transfer. Moved and immediately transferred. Therefore, there is no signal charge left.

FIG. 3 is a sectional view of a CCD register of a solid-state image pickup device according to another embodiment of the present invention. CC shown in FIG.
Also in the D register, the structure of the transfer electrode is the same as that in FIG. In this embodiment, the gate film is the oxide film 7,
A three-layer structure of the nitride film 8 and the oxide film 9 is provided, and a film thickness difference is provided in the gate film at the central portion of the charge storage portion. Since the potential of the register 3 becomes deeper in this portion, the transfer electrode on this region is formed. The phase-to-phase capacity is reduced by superimposing only these. In this embodiment, the step is formed by wet etching using a resist mask, and the nitride film 8 acts as a stopper for etching the oxide film 9 at that time. It can be controlled reliably. After that, a thin oxide film is provided on the nitride film 8 by oxidation of the nitride film or the like.

[0013]

As described above, according to the present invention, the CCD
By providing a film thickness difference in the gate film below the transfer electrode of the register, a region where the potential depth is deeper than other portions is formed in the charge storage region of the CCD register, and the transfer electrode located on the deep potential region is formed. By using a structure in which only the adjacent transfer electrodes are overlapped with each other, the interphase capacitance is reduced, and a solid-state imaging device with low power consumption is enabled.

[Brief description of drawings]

1A is a configuration diagram of a transfer electrode of a solid-state image pickup device according to the present invention, and FIG. 1B is a cross-sectional view of a CCD register of the solid-state image pickup device according to the present invention, which corresponds to a sectional view taken along line AA ′ in FIG. Fig.

FIG. 2 is a potential diagram of a CCD register of the solid-state imaging device according to the present invention.

FIG. 3 is a diagram showing a second embodiment.

4A is a configuration diagram of a transfer electrode of a conventional solid-state imaging device, and FIG. 4B is a sectional view taken along line BB ′ of FIG.

5A and 5B are a sectional view and a potential diagram of a CCD register of a conventional solid-state imaging device corresponding to the sectional view taken along the line CC of FIG.

6A and 6B are a cross-sectional view and a potential diagram of a CCD register of a solid-state imaging device having a structure without overlapping between adjacent transfer electrodes.

[Explanation of symbols]

 1 1st layer transfer electrode 2 2nd layer transfer electrode 3 gate oxide film 4 charge storage part 5 channel stopper 6 thin region of gate oxide film 7 oxide film 8 nitride film 9 oxide film 10 interlayer insulating film

Claims (2)

[Claims] 1. A solid-state imaging device comprising at least a plurality of light-receiving regions and a charge-coupled device register, wherein a part of a charge storage region of the charge-coupled device register is deeper in electric potential than other parts. A solid-state imaging device comprising a charge-coupled device register having a structure in which only transfer electrodes formed on the deep potential region overlap with adjacent transfer electrodes. 2. The solid-state image sensor according to claim 1, wherein
Solid-state imaging characterized in that the gate film under the transfer electrode of the charge-coupled device register has a film thickness difference in a part of the charge storage region of the register, thereby forming a deep potential region in the charge storage region. element.