JPH054864B2 - - Google Patents

Description

Detailed Description of the Invention [Industrial Field of Application] The present invention is capable of converting one AC analog signal that does not include a DC component and a plurality of low-speed status signals that change below the frequency band of this AC analog signal into two signals. The present invention relates to a modulation/demodulation device for multiplex transmission using value signals.

[Prior Art] Conventionally, this type of PWM multiplex transmission device is shown in FIG. 3. The PWM multiplex transmission device shown in Figure 1 is roughly divided into a modulation circuit 1' that PWM multiplexes AC analog signals and status signals, a transmission circuit 2 that transmits binary signals, and multiplexed AC analog signals and status signals. Demodulation circuit 3 that separates and reproduces signals
It consists of three units.

The modulation circuit 1' includes a DC bias circuit 12 that applies a DC bias voltage to the transmission AC analog signal b in accordance with each of the n transmission status signals c to e, a triangular wave generation circuit 11 that generates a triangular wave, and a DC bias circuit 12. The comparator 13 compares the bias-applied analog signal f output from the triangular wave generating circuit 11 with the triangular wave a output from the triangular wave generating circuit 11, and provides a transmission PWM multiplexed signal g as an output.

The demodulation circuit 3 includes a bandpass filter (hereinafter referred to as BPF) 31 for separating and reproducing the received AC analog signal i from the received PWM multiplexed signal h, and a low-pass filter (hereinafter referred to as BPF) for separating the DC bias signal j. below,
(referred to as LPF) 32, and comparators 33, 34, and 35 that compare the DC bias signal j and reference potentials Vref1 to (n-1) and output (n-1) reception status signals k to m. configured.

Next, the operation of the conventional PWM multiplex transmission device configured as described above will be explained.

In the modulation circuit 1', the DC bias circuit 12 generates a bias application analog signal f in which the transmission AC analog signal b is superimposed on n types of DC bias voltages corresponding to one of the transmission status signals c to e. The comparator 13 generates a transmission PWM multiplexed signal g in which the amplitude of the biased analog signal f is converted into a pulse width using a triangular wave a having an amplitude that covers the amplitude range of the biased analog signal f.

The binarized transmission PWM multiplexed signal g is transmitted by the transmission circuit 2 and guided to the demodulation circuit 3 as the reception PWM multiplexed signal h. In the demodulation circuit 3,
The BPF 31 removes the low frequency component of the DC bias signal due to the state signal and the high frequency component of the PWM modulated wave due to the triangular wave, and reproduces the received AC analog signal i. In addition, the LPF 32 extracts the bias signal of the low frequency component and regenerates the DC bias signal j, and the comparators 33 to 35 identify the state signals, and (n-1) reception state signals It is output as k to m, and n different states are determined based on this. In addition, as a conventional PWM multiplex transmission device, Japanese Patent Application No. 61-278033
-131627), JP-A-60-43934, JP-A-58-
There are data time division multiplex transmission devices such as those disclosed in No. 87941 and Japanese Unexamined Patent Publication No. 58-223934.

[Problems to be solved by the invention] The conventional PWM multiplex transmission device shown in FIG.
DC bias voltage according to the state signal Since the amplitude of the signal f superimposed with the AC analog signal is converted into a pulse width, This requires a triangular wave generation circuit 11 that provides a triangular wave a with good linearity, resulting in technical difficulties and high costs.

Further, in the DC bias circuit 12, it is necessary to accurately apply a DC bias voltage corresponding to the status signal, which is also accompanied by technical difficulties and has the drawback of high cost.

Furthermore, all of the other time division multiplex transmission devices require frame synchronization means for time division multiplexing and demultiplexing, resulting in complicated circuits and high costs. Furthermore, when using digital signals as transmission signals, the mark rate had to be 50%.

The present invention was made in order to eliminate the drawbacks of the conventional devices as described above, and aims to provide a PWM multiplex transmission device with a simple circuit and at low cost.

[Means for solving the problems] In order to achieve such an object, the present invention
A PWM multiplex transmission device consists of a modulation circuit that modulates one AC analog signal and multiple low-speed status signals into one PWM signal, a transmission circuit that transmits the PWM signal, and a demodulator that demodulates the transmitted PWM signal. In a PWM multiplex transmission device consisting of a triangular wave generating circuit, a comparator that compares the triangular wave generated by the triangular wave generating circuit with an AC analog signal and outputting a PWM signal, and a An AND gate outputs a bias control signal as a logical product that is input with a clock signal and a state signal synchronized by the clock signal, and an OR gate generates a biased PWM signal by superimposing the bias control signal on the PWM signal. It is equipped with the following.

[Embodiment] Hereinafter, as an embodiment of the present invention, a PWM multiplex transmission device that multiplex transmits one analog signal and state signals representing three states using binary signals will be described with reference to FIG. do. In Figure 1,
Components with the same symbols as in FIG. 3 have similar functions.

The PWM multiplex transmission device shown in Fig. 1 consists of a modulation circuit 1, a transmission circuit 2, and a demodulation circuit 3. The modulation circuit 1 includes a triangular wave generation circuit 11 that outputs a triangular wave a, and a triangular wave generation circuit 11 that outputs a triangular wave a, and compares the triangular wave a and the transmitted AC analog signal b to generate an analog signal.
The circuit includes a comparator 13 that outputs a PWM signal r, and a flip-flop 14 (hereinafter referred to as FF) that receives a PWM clock signal o output from the triangular wave generation circuit 11 and outputs a bias control clock signal p. These triangular wave generation circuit 11, comparator 13 and
The FFs 14 together constitute a PWM modulation circuit. Furthermore, the modulation circuit 1 includes an AND gate 16, an OR gate 15, and an exclusive AND (hereinafter referred to as EXOR) as a logic gate circuit for superimposing the state signals c and d.
A gate 17 is provided. The triangular wave generating circuit 11 outputs the triangular wave a to the comparator 13 and also outputs the PWM clock signal o to the flip-flop 14, which in turn outputs the bias control clock signal p.
Output. Bias control clock signal p is input to AND gate 16 together with transmission status signal c;
A bias control signal q is provided as a logical product synchronized with a clock signal. At OR gate 15,
An analog PWM signal r is gated by a bias control signal q to output a biased PWM signal s. The bias applied PWM signal s is gated by the transmission status signal d at the EXOR gate 17, and the transmission
Outputs PWM multiplexed signal g.

The configurations of the transmission circuit 2 and the demodulation circuit 3 are the same as those shown in FIG. 3, so their explanation will be omitted.

Next, the operation of this device will be explained using the operation waveforms shown in FIG.

The transmitted AC analog signal b is sent to the triangular wave generation circuit 1
The comparator 13 compares the potential with the triangular wave a output from the AC analog signal b, and generates an analog PWM signal r whose pulse width corresponds to the amplitude of the AC analog signal b. Here, when the AC analog signal b is at zero level, the analog PWM signal r is converted to a pulse width that is half the period T of the triangular wave a. Further, the PWM clock signal o output from the triangular wave generation circuit 11 is a rectangular wave pulse with a period T equal to the triangular wave a, and the FF
At step 14, a bias control clock signal p is generated which is inverted at the rising edge of the PWM clock signal o and repeats inversion at the period T of the triangular wave a.

Three states A, B, represented by state signals
C is the state A of the transmission state signal c=Low (hereinafter abbreviated as L), the transmission state signal d=L, and c=High, respectively.
(hereinafter abbreviated as H), state B where d=L, and c=H,
This is realized by state C where d=H. Below, A,
Each state of B and C will be explained.

State A is the state when c=L and d=L,
The bias control signal q is always L, and the analog PWM signal r appears as it is in the bias application PWM signal s. Furthermore, since d=L, the bias-applied PWM signal s appears as is in the transmission PWM multiplexed signal g. Transmission PWM multiplexed signal g is sent to transmission circuit 2
and is input to the demodulation circuit 3 as a received PWM multiplexed signal h. In the demodulation circuit 3,
The BPF 31 removes the PWM modulated wave component of the received PWM multiplexed signal h, and reproduces the received AC analog signal i. Further, the LPF 32 removes the PWM modulated wave component and the AC analog signal component, demodulates the DC bias signal j representing the state, and has a zero potential here. The reception status signals k and l output from the comparators 33 and 34 are k=L and l=H, respectively.
This output is determined to be in state A.

State B is the state when c=H and d=L, and c
=H, the bias control clock signal p is applied as is to the bias control signal q, and the bias application PWM signal s becomes H during the period when the bias control signal q is H, and becomes an analog signal during the period when the bias control signal q is L. PWM signal r appears as is. Therefore, the bias application PWM signal s is a signal to which a positive potential bias is applied due to the H level during the period when the bias control signal q is H. Furthermore, since d=L, the bias-applied PWM signal s appears as is in the transmission PWM multiplexed signal g. In the demodulation circuit 3, the BPF 31 removes the PWM modulated wave component of the received PWM multiplexed signal h and the DC bias signal, and demodulates the received AC analog signal i. Further, in the LPE 32, the PWM modulated wave component and the AC analog signal component are removed, and the DC bias signal j is demodulated to have a positive potential. Comparator 33,3
The outputs k and l of 4 are k=H and l=H, respectively, and these outputs are determined to be in state B.

State C is the state when c=H and d=H, and c
=H, the bias control clock signal p appears as it is on the bias control signal q, and the bias is applied.
The PWM signal s becomes H during the period when the bias control signal q is H, and the analog PWM signal r appears as it is during the period when the bias control signal q is L. Furthermore, due to d=H, a signal whose polarity is inverted from the bias application PWM signal s appears in the transmission PWM multiplexed signal g. Therefore, the EXOR gate 17 inverts the polarity of the AC analog signal, and also inverts the positive DC bias potential applied by the OR gate 15, giving the same effect as applying a negative potential. . In the demodulation circuit 3, the BPF 31 demodulates the received analog signal i, and the LPF 3
At 2, the DC bias signal j is demodulated and becomes a negative potential. The outputs k and l of the comparators 33 and 34 become k=L and l=L, respectively, and these outputs are determined to be in state C.

In the above embodiment, in states B and C, half the period of the AC analog signal is removed in order to apply a DC bias, so the level of the received AC analog signal is halved compared to that in state A. Become.
Although it is possible to make the modulation/demodulation gain and S/N of the AC analog signal higher in state A than in states B and C as in this embodiment, when in state A, the bias control clock signal p If the gate circuit is configured to replace the H period of 1 with a constant pulse with a duty of 50%, it is possible to make the modulation/demodulation gain of the AC analog signal constant in all states A, B, and C.

In the above embodiment, the polarity of the received analog signal i is reversed in state C, but the EXOR gate 17 is not controlled by the transmission state signal d, and a bias is applied during the H period of the bias control signal q by the transmission state signal d. OR so that PWM signal s becomes L
By configuring the gate 15, a configuration without polarity reversal is possible.

Further, although the above embodiment describes the case where three types of state signals are transmitted, it is also possible to transmit more states depending on the configuration of the gate circuit.

[Effects of the Invention] As is clear from the above description, according to the present invention, the modulation circuit compares the triangular wave generating circuit with the triangular wave generated from the triangular wave generating circuit and an AC analog signal, and outputs a PWM signal. A comparator, a clock signal and a status signal generated by a triangular wave generation circuit are input, and a bias control signal is output as a logical product synchronized by the clock signal.
Generate bias application PWM signal by superimposing bias control signal with AND gate and PWM signal
By being equipped with an OR gate, there is no need for a high-precision triangular wave generation circuit using a high-precision analog circuit or a crystal oscillator, and the PWM multiplex transmission device can be configured with a simple circuit.

Furthermore, since frame synchronization means for time division multiplexing and demultiplexing is not required, the circuit can be easily configured.

Furthermore, when superimposing the PWM signal and the status signal, a logic gate circuit that uses a changeover switch is used, which increases the noise margin and eliminates switching noise. Since no control circuit is required, the configuration becomes extremely simple.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing one embodiment of the present invention;
FIG. 2 is a waveform diagram, and FIG. 3 is a block diagram showing a conventional PWM multiplex transmission device. 1... Modulation circuit, 2... Transmission circuit, 3... Demodulation circuit, 11... Triangular wave generation circuit (PWM modulation circuit), 13... Comparator (PWM modulation circuit), 15...
...OR gate (gate circuit), 16...AND gate (gate circuit).

Claims (1)

[Claims] 1 Consists of a modulation circuit that modulates one AC analog signal and a low-speed status signal into one PWM signal, a transmission circuit that transmits the PWM signal, and a demodulation circuit that demodulates the transmitted PWM signal.
In the PWM multiplex transmission device, the modulation circuit includes:
Triangular wave generation circuit 11 and the triangular wave generation circuit 11
a comparator 13 that compares the triangular wave a generated from the AC analog signal b and outputs a PWM signal r;
and an AND gate 16 which receives the clock signal p generated by the triangular wave generating circuit and the state signal c and outputs a bias control signal q as a logical product synchronized by the clock signal;
OR to generate a bias application PWM signal s by superimposing the bias control signal q on the PWM signal r;
A PWM multiplex transmission device characterized by comprising a gate 15.