JPH0556857B2 - - Google Patents
Info
- Publication number
- JPH0556857B2 JPH0556857B2 JP3341186A JP3341186A JPH0556857B2 JP H0556857 B2 JPH0556857 B2 JP H0556857B2 JP 3341186 A JP3341186 A JP 3341186A JP 3341186 A JP3341186 A JP 3341186A JP H0556857 B2 JPH0556857 B2 JP H0556857B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- value
- voltage
- difference
- semiconductor wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 235000012431 wafers Nutrition 0.000 claims description 32
- 239000004065 semiconductor Substances 0.000 claims description 31
- 238000009713 electroplating Methods 0.000 claims description 7
- 238000001514 detection method Methods 0.000 claims description 6
- 238000007747 plating Methods 0.000 description 7
- 239000010949 copper Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000003321 amplification Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 150000001768 cations Chemical class 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
Landscapes
- Electroplating Methods And Accessories (AREA)
- Electrodes Of Semiconductors (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、半導体ウエハーに電気メツキを施こ
す際に、半導体ウエハーと例えばホルダー等のメ
ツキ用治具との間の導通状態を監視する為に用い
られる電圧モニターに関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a method for monitoring the electrical conductivity between a semiconductor wafer and a plating jig such as a holder when electroplating a semiconductor wafer. This invention relates to voltage monitors used in
半導体ウエハーの表面に、例えばバンプ形成等
といつた電極の厚さを増加させる時、同電極面に
電気メツキを行うようにしている。第２図に電気
メツキの実施状態を説明する図を示す。図におい
て、１は例えば銅（Cu）板から成る陽極板、２
はホルダー３に固定され、ホルダー電極４と電気
接続している半導体ウエハーであり、これらをメ
ツキ液５中に浸漬し、陽極板１と半導体ウエハー
２との間に電圧を印加して、陰極に電気接続され
てる半導体ウエハー２表面上に金属陽イオン（こ
の場合Cu2+イオン）を析出させるものである。
ここで、半導体ウエハー２とホルダー電極４との
導通状態は必ずしも良いとは限らなく、導通状態
が悪い場合には、半導体ウエハー２表面上に形成
されたCuバンプの密着強度が低下してしまい、
Cuバンプの剥離が起こつてしまう。そこで通常
は、半導体ウエハー２とホルダー電極４との導通
不良を検出する為に電圧モニターを使用してい
る。
When increasing the thickness of an electrode on the surface of a semiconductor wafer, for example by forming bumps, the surface of the electrode is electroplated. FIG. 2 shows a diagram illustrating the implementation state of electroplating. In the figure, 1 is an anode plate made of, for example, a copper (Cu) plate, and 2
is a semiconductor wafer fixed to the holder 3 and electrically connected to the holder electrode 4. These are immersed in the plating liquid 5, and a voltage is applied between the anode plate 1 and the semiconductor wafer 2 to cause the cathode to Metal cations (Cu 2+ ions in this case) are deposited on the surface of a semiconductor wafer 2 that is electrically connected.
Here, the conduction state between the semiconductor wafer 2 and the holder electrode 4 is not necessarily good, and if the conduction state is poor, the adhesion strength of the Cu bumps formed on the surface of the semiconductor wafer 2 will decrease.
Peeling of the Cu bumps will occur. Therefore, a voltage monitor is usually used to detect poor conduction between the semiconductor wafer 2 and the holder electrode 4.
以下に従来の電圧モニターによる導通不良の検
出を説明する。第２図において、陽極板１と半導
体ウエハー２との電圧差を各々の半導体ウエハー
２について検出し、その電圧差の少なくとも１つ
が所定の設定値（例えば0.5V）より大きい時に、
導通不良と判断し、警報ブザーを鳴らすか又はラ
ンプを点滅させて作業者に警告している。 Detection of conduction failure using a conventional voltage monitor will be described below. In FIG. 2, the voltage difference between the anode plate 1 and the semiconductor wafer 2 is detected for each semiconductor wafer 2, and when at least one of the voltage differences is larger than a predetermined set value (for example, 0.5V),
It is determined that there is poor continuity and a warning buzzer sounds or a lamp flashes to warn the operator.
しかしながら、陽極板と半導体ウエハーとの電
圧差は、陽極板の表面状態の変化及びメツキ液の
温度の変化等により影響を受けて変化しており、
上記の従来の電圧モニターを使用すると、陽極板
と半導体ウエハーとの間の導通状態が良好であつ
ても検出した電圧差が所定の設定値より大きくな
つてしまい、誤つた判断をしてしまうという問題
が生じている。
However, the voltage difference between the anode plate and the semiconductor wafer changes due to changes in the surface condition of the anode plate, changes in the temperature of the plating solution, etc.
When using the above-mentioned conventional voltage monitor, even if there is good continuity between the anode plate and the semiconductor wafer, the detected voltage difference will be larger than the predetermined setting value, leading to incorrect judgments. A problem has arisen.
そこで本発明は上記の問題点に鑑みて創案され
たもので、陽極板の表面状態の変化及びメツキ液
の温度の変化等の影響を受けずに、正確な導通不
良の判断ができる半導体ウエハーの電気メツキ用
電圧モニターを提供する事を目的としている。 The present invention was devised in view of the above-mentioned problems, and is a semiconductor wafer that can accurately determine conduction defects without being affected by changes in the surface condition of the anode plate or changes in the temperature of the plating solution. The purpose is to provide a voltage monitor for electric plating.
上記の目的を達成する為の本発明の半導体ウエ
ハーの電気メツキ用電圧モニターは、陰極に電気
接続されている複数の半導体ウエハーの各々と、
陽極に電気接続されている電極板との間の電圧差
を検出し、その各々を増幅する増幅回路と、増幅
された複数の電圧差のうち最大値及び最小値を選
出する選出回路と、その最大値と最小値との差に
応じた値を検出する電圧差検出回路と、その検出
された差に応じた電圧値と所定の設定値とを比較
する比較回路と、その比較回路からの信号により
駆動される警報回路とから構成される。
To achieve the above object, the voltage monitor for electroplating semiconductor wafers of the present invention has a voltage monitor for electroplating each of a plurality of semiconductor wafers electrically connected to a cathode;
an amplifier circuit that detects voltage differences between the anode and the electrode plate electrically connected to the anode and amplifies each of the voltage differences; a selection circuit that selects the maximum value and minimum value from among the plurality of amplified voltage differences; A voltage difference detection circuit that detects a value corresponding to the difference between the maximum value and the minimum value, a comparison circuit that compares the voltage value corresponding to the detected difference with a predetermined setting value, and a signal from the comparison circuit. It consists of an alarm circuit driven by
そして本発明は上記の構成により、各々の半導
体ウエハーと電極板との間の電圧差を検出し、そ
の値の最大値と最小値との差に応じた値を検出
し、その差に応じた値が所定の設定値より大きい
場合には導通不良と判断し、例えば、ブザーを鳴
らす。又は、ランプを点滅する。
With the above configuration, the present invention detects the voltage difference between each semiconductor wafer and the electrode plate, detects a value corresponding to the difference between the maximum value and the minimum value, and detects the voltage difference according to the difference. If the value is larger than a predetermined set value, it is determined that there is a continuity failure, and, for example, a buzzer is sounded. Or blink the lamp.
以下、図面に示す実施例により本発明を詳細に
説明する。第１図に本発明の一実施例である電圧
モニターの電気回路図を示す。図において、１０
０は第２図における陽極板１と、No.10〜No.60まで
の６枚の半導体ウエハー２との各々の電圧差V10
〜V60を検出し、増幅する増幅回路であり、オペ
アンプ１０１〜１０６は増幅器として動作してい
る。２００は増幅回路１００で増幅された電圧差
V10〜V60の最大値Vnaxと最小値Vnioを選出する
選出回路であり、ダイオード２０１〜２０６で
Vnaxを、ダイオード２０７〜２１２でVnioをそれ
ぞれ選出している。スイツチ２１３〜２１８は、
例えばホルダー３が本実施例のように半導体ウエ
ハー２を６枚セツトできるものである時に、都合
により５枚しかセツトしない場合、セツトされな
い場所からの異常信号を遮断するものである。３
００は選出回路２００で選出されたVnaxとVnioと
の差（Vnax−Vnio）を検出する電圧差検出回路で
あり、オペアンプ３０１は定電圧回路として動作
しており選出回路２００から出力されるVnaxの
インピーダンスを変換する。又、オペアンプ３０
２は反転回路として動作しており増幅度は−１で
Vnioの入出力の関係を反転し、しかもインピーダ
ンスを変換している。そして、オペアンプ３０３
でVnaxとVnioの差をとり、しかも反転して出力し
ている。４００は電圧差検出回路３００から出力
される電圧差（Vnax−Vnio）の値と所定の設定値
とを比較し、電圧差（Vnax−Vnio）の値が設定値
Vefより大きい場合（つまり、Vef−（Vnax−Vnio）
＜０の場合）には警報回路６００（回路は図示は
しないが、公知のものと同様のものを用いればよ
い）に“Hi”レベルの信号を送り、警報回路６
００にて例えば警報ブザーを鳴らす、又は、ラン
プを点滅させるものである。尚、所定の設定値
Vefは設定回路５００における可変抵抗５０１の
値を変化させることにより任意に調節可能であ
り、半導体ウエハー２とホルダー電極４との間に
導通不良が生じた場合にVnaxとVnioの差の値がそ
の状態を判断できる値（例えば0.1V）に設定す
る。又、本実施例では遅延回路７００を比較回路
４００の出力側に接続している。遅延回路７００
はコンデンサ７０１の容量の大きさで決まる時間
だけ遅延するものであり、電圧モニターのスイツ
チがONされてから遅延時間（例えば0.5〜２秒）
の間は比較回路４００の出力を吸収するものであ
り、動作初期時のノイズ等が原因の異常信号によ
る警報回路６００の誤動作を防止するものであ
る。尚、図中、白ぬきの矢印は電源Vccに電気接
続されている。
Hereinafter, the present invention will be explained in detail with reference to embodiments shown in the drawings. FIG. 1 shows an electrical circuit diagram of a voltage monitor that is an embodiment of the present invention. In the figure, 10
0 is the voltage difference V 10 between the anode plate 1 and the six semiconductor wafers 2 from No. 10 to No. 60 in FIG.
This is an amplifier circuit that detects and amplifies ~ V60 , and operational amplifiers 101 to 106 operate as amplifiers. 200 is the voltage difference amplified by the amplifier circuit 100
This is a selection circuit that selects the maximum value V nax and minimum value V nio of V 10 to V 60 , and is
V nax and V nio are selected by the diodes 207 to 212, respectively. The switches 213 to 218 are
For example, when the holder 3 is capable of setting six semiconductor wafers 2 as in this embodiment, but for some reason only five semiconductor wafers 2 are set, the abnormal signal from the location where the wafers are not set is blocked. 3
00 is a voltage difference detection circuit that detects the difference between V nax and V nio selected by the selection circuit 200 (V nax - V nio ), and the operational amplifier 301 operates as a constant voltage circuit and outputs from the selection circuit 200. Converts the impedance of V nax . Also, operational amplifier 30
2 operates as an inverting circuit and the amplification degree is -1.
The input/output relationship of V nio is reversed, and the impedance is also converted. And op amp 303
The difference between V nax and V nio is taken, and it is inverted and output. 400 compares the value of the voltage difference (V nax −V nio ) output from the voltage difference detection circuit 300 with a predetermined set value, and the value of the voltage difference (V nax − V nio ) is determined as the set value.
If V ef is greater than (i.e., V ef −(V nax −V nio )
<0), a “Hi” level signal is sent to the alarm circuit 600 (the circuit is not shown, but a circuit similar to a known one may be used), and the alarm circuit 6
At 00, for example, an alarm buzzer sounds or a lamp flashes. In addition, the predetermined setting value
V ef can be adjusted arbitrarily by changing the value of the variable resistor 501 in the setting circuit 500, and when a conduction failure occurs between the semiconductor wafer 2 and the holder electrode 4, the difference between V nax and V nio can be adjusted. Set the value to a value that allows you to determine its state (for example, 0.1V). Further, in this embodiment, the delay circuit 700 is connected to the output side of the comparison circuit 400. delay circuit 700
is delayed by a time determined by the capacitance of the capacitor 701, and the delay time (for example, 0.5 to 2 seconds) after the voltage monitor switch is turned on.
During this period, the output of the comparator circuit 400 is absorbed, and the alarm circuit 600 is prevented from malfunctioning due to an abnormal signal caused by noise or the like at the initial stage of operation. In addition, in the figure, the white arrow is electrically connected to the power supply Vcc .
以上に示した構成の電圧モニターによると、半
導体ウエハー２とホルダー電極４との間に導通不
良が生じた場合、半導体ウエハー２と陽極板１と
の間の電圧差が、導通状態が良いものに比べて大
きくなるのでVnaxの値が大きくなり、したがつ
てVnax−Vnioの値も大きくなるので、その値が所
定の設定値より大きい時には例えば警報ブザーが
鳴るか、又は、ランプを点滅して作業者に導通不
良を警告する事が出来る。尚、陽極板１と半導体
ウエハー２との電圧差の値が、陽極板１の表面状
態の変化及びメツキ液の温度の変化等により影響
を受けたとしても、その影響は全ての半導体ウエ
ハー２について同様であるので、Vnax及びVnioの
値は同様に変動し、その差（Vnax−Vnio）の値に
何ら影響する事がなく、確実に導通不良を判断出
来る。 According to the voltage monitor configured as described above, when poor conduction occurs between the semiconductor wafer 2 and the holder electrode 4, the voltage difference between the semiconductor wafer 2 and the anode plate 1 changes to the one with good conduction. Since the value of V nax becomes larger than that, the value of V nax −V nio also becomes larger, so when the value is larger than a predetermined set value, for example, an alarm buzzer sounds or a lamp flashes. It is possible to warn the operator of poor continuity. Furthermore, even if the value of the voltage difference between the anode plate 1 and the semiconductor wafer 2 is affected by changes in the surface condition of the anode plate 1, changes in the temperature of the plating solution, etc., this effect will not affect all semiconductor wafers 2. Since they are the same, the values of V nax and V nio fluctuate in the same way, and the value of the difference (V nax - V nio ) is not affected in any way, and a conduction failure can be reliably determined.
また、本発明は上記実施例に限定される事な
く、その主旨を逸脱しない限り例えば以下に示す
如く種々変形可能である。 Furthermore, the present invention is not limited to the above embodiments, and can be modified in various ways, for example as shown below, without departing from the spirit thereof.
(1) １つのホルダー３に固定される半導体ウエハ
ー２の数は６枚に限定される事なく、何枚でも
よく、その枚数に応じた回路設計を増幅回路１
００及び選出回路２００に施せばよい。(1) The number of semiconductor wafers 2 fixed to one holder 3 is not limited to six, and any number of semiconductor wafers may be used.
00 and the selection circuit 200.
(2) 遅延回路７００はなくてもよく、又、設定回
路５００で設定される設定値は比較回路４００
に組込んでもよい。(2) The delay circuit 700 may be omitted, and the setting value set by the setting circuit 500 is the same as that of the comparison circuit 400.
It may be incorporated into
(3) 言うまでもなく、各々の回路構成も、入出力
の関係が等しい範囲で種々変形可能である。(3) Needless to say, each circuit configuration can be modified in various ways as long as the input/output relationship is the same.
以上述べたように、本発明の半導体ウエハーの
電気メツキ用電圧モニターによると、陽極板と複
数の半導体ウエハーとの電圧差の各々を所定の設
定値Vefと比較するのではなく、電圧差の最大値
Vnaxと最小値Vnioとの差の値を所定の設定値と比
較する事により、陽極板の表面状態の変化及びメ
ツキ液の温度の変化等からの影響を受けずに、正
確な導通不良の判断ができ、導通不良により引き
起こされるがバンプ剥離等といつた弊害を防止す
る事が出来るという優れた効果がある。
As described above, according to the voltage monitor for electroplating semiconductor wafers of the present invention, the voltage difference between the anode plate and the plurality of semiconductor wafers is not compared with a predetermined set value V ef . Maximum value
By comparing the value of the difference between V nax and the minimum value V nio with a predetermined setting value, it is possible to accurately determine conduction defects without being affected by changes in the surface condition of the anode plate or changes in the temperature of the plating solution. This has the excellent effect of preventing problems such as bump peeling caused by poor conduction.
第１図は本発明の一実施例の電圧モニターの電
気回路図、第２図は電気メツキの実施状態を説明
する図である。
１００……増幅回路、２００……選出回路、３
００……電圧差検出回路、４００……比較回路、
５００……設定回路、６００……警報回路。
FIG. 1 is an electric circuit diagram of a voltage monitor according to an embodiment of the present invention, and FIG. 2 is a diagram illustrating the implementation state of electroplating. 100...Amplification circuit, 200...Selection circuit, 3
00... Voltage difference detection circuit, 400... Comparison circuit,
500...Setting circuit, 600...Alarm circuit.
Claims (1)
ハーの各々と、陽極に電気接続されている電極板
との間の電圧差を検出し、その各々を増幅する増
幅回路と、 前記増幅された複数の電位差のうち最大値及び
最小値を選出する選出回路と、 前記最大値と前記最小値との差に応じた値を検
出する電圧差検出回路と、 前記最大値と前記最小値との差に応じた値を所
定の設定値と比較する比較回路と、 前記比較回路からの信号により駆動される警報
回路とからなる事を特徴とする半導体ウエハーの
電気メツキ用電圧モニター。[Scope of Claims] 1. An amplifier circuit that detects a voltage difference between each of a plurality of semiconductor wafers electrically connected to a cathode and an electrode plate electrically connected to an anode, and amplifies each of the voltage differences; a selection circuit that selects a maximum value and a minimum value from among the plurality of amplified potential differences; a voltage difference detection circuit that detects a value corresponding to the difference between the maximum value and the minimum value; 1. A voltage monitor for electroplating semiconductor wafers, comprising: a comparison circuit that compares a value corresponding to a difference with a predetermined set value; and an alarm circuit driven by a signal from the comparison circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3341186A JPS62190722A (en) | 1986-02-17 | 1986-02-17 | Voltage monitor for electroplating of semiconductor wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3341186A JPS62190722A (en) | 1986-02-17 | 1986-02-17 | Voltage monitor for electroplating of semiconductor wafer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62190722A JPS62190722A (en) | 1987-08-20 |
| JPH0556857B2 true JPH0556857B2 (en) | 1993-08-20 |
Family
ID=12385846
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3341186A Granted JPS62190722A (en) | 1986-02-17 | 1986-02-17 | Voltage monitor for electroplating of semiconductor wafer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62190722A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040000489A1 (en) * | 2002-05-07 | 2004-01-01 | University Of Southern California | Methods and apparatus for monitoring deposition quality during conformable contact mask plating operations |
| US10297421B1 (en) | 2003-05-07 | 2019-05-21 | Microfabrica Inc. | Plasma etching of dielectric sacrificial material from reentrant multi-layer metal structures |
| JP4795075B2 (en) * | 2006-03-31 | 2011-10-19 | 古河電気工業株式会社 | Electroplating equipment |
-
1986
- 1986-02-17 JP JP3341186A patent/JPS62190722A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62190722A (en) | 1987-08-20 |
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