JPH0562345B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a look-up table (LUT).
For line-connected displays, blink control is used to display images by switching the input address of the LUT at regular intervals to expand the image expression capacity without increasing the amount of information transmitted over the line. Regarding circuits.

(b) Prior Art and Problems For example, the conventional blink control circuit 1 shown in FIG. 1 uses a system in which the LUT memory 2 is rewritten at regular intervals by software from a control device (CPU). As shown in Figure 2, the LUT memory 2 stores a group of data (12 bits) in the form of an array (output field) or a table.
This is a table that searches for the necessary data from among 4096 types (4096 types) using the heading key part (16 types in 4 bits) attached to the data (input field) as a clue. Normally, the selector 3 outputs the display data obtained by scanning the video memory 4 in which data to be displayed is stored by the memory scanning circuit 5 to the LUT memory 2, and outputs the display data to the LUT memory 2.
data is displayed on the screen. This LUT memory 2 outputs 4 bits each for the three primary colors red (R), gray (G), and blue (B), and the screen display is
It is 12 bit. In response to a blink command from the CPU, the selector 3 selects the display data of the memory scanning circuit 5.
Stops output to LUT memory 2, outputs the CPU access address to LUT memory 2, writes CPU access data to LUT memory 2, and displays it on the screen.

In the method described above, in which the LUT memory 2 is rewritten from the CPU at a fixed cycle (for example, 0.5 second cycle),
During the screen display cycle, the CPU asynchronously
Since LUT memory 2 is accessed (written) from , noise occurs on the screen. This is because even if the access time of the LUT memory 2 is set to a high speed (25 ns), the occurrence of noise of about 1 dot cannot be avoided because it is close to the display interval of dots (39 ns). Since this noise occurs every blink period (0.5 seconds), there is a problem that image quality deteriorates.

(c) Object of the Invention The object of the invention is to provide a display circuit that displays an image using an LUT memory, a display circuit that includes a blink memory that switches the input address of the LUT memory at regular intervals;
Normally, the blink operation is not performed when the address and data match, but the CPU rewrites the data, and when the address and data do not match, the blink operation is performed.The selector allows the normal display of V-RAM and the data of the blink memory to be displayed at frame intervals. It is an object of the present invention to provide a blink control circuit which switches at a blink period synchronized with the above and prevents noise on the screen.

(d) Structure of the Invention According to the present invention, this object is to provide pixel data obtained by sequentially scanning a video memory by a memory scanning circuit as an input address of a look-up table, In a blink control circuit that performs blink display of a display image by switching the input address of the look-up table at a constant cycle when displaying an image using image display data obtained from the memory scanning circuit, a first selector that switches between data and an address signal from a control device; a blink memory that uses the output of the first selector as an access address;
a second selector that switches between image data from the memory scanning circuit and output data from the blinking memory at a blinking cycle, and a first path leading directly from the memory scanning circuit to the second selector; A second path from the memory scanning circuit to the second selector via the first selector and blinking memory is configured, and in normal image display, the first path and the second path are connected to each other. The same data as the address is stored in each address of the blinking memory so that the data of the address is the same, and the data of the first route and the second route are made different during blinking. This is achieved by providing a blink control circuit characterized in that a predetermined address of the blink memory specified by the control device is rewritten with data from the control device.

(e) Examples of the invention Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 3 is a block diagram showing one embodiment of the blink control circuit of the present invention.

In the figure, a video memory (V-RAM) 7 is scanned by a memory scanning circuit 8, and the data to be displayed is scanned by a look-up table (LUT memory).
9 of the display circuit for displaying the image.
A blink control circuit 6 that switches the input address of the LUT memory 9 at a constant cycle, the
a selector (I) 12 that stops the output of the LUT memory 9 of the image display of the RAM 7 and selects control device (CPU) data; and a blink memory 10 that writes the control device data based on the selection of the selector (I) 12. , a selector ( ) 11 that switches between the data in the blink memory 10 and the image data in the V-RAM 7 at the blink cycle.

In normal image display when not blinking,
In the blink memory 10, an address and data stored at that address are assumed to be the same.

Therefore, the display data of V-RA 7 takes a route from the memory scanning circuit 8 directly to the selector ( ) 11, and from the memory scanning circuit 8 through the selector (I) 12 and the blinking memory 10 to the selector () 11.
The data on both routes will be the same.

Even if the selector ( ) 11 switches at the blink period, the same data is obtained, and the LUT memory 9
The input address of will not change and no blinking will occur.

Blink control is performed by switching the selector (I) 12, specifying a predetermined address in the blink memory 10 from the CPU, and rewriting the stored data.
In the blink memory 10, the address and the data stored at that address are no longer the same.

Therefore, from the memory scanning circuit 8 to the selector (I) 1
2 and the selector () through the blink memory 10.
The output data of the path leading to 11 is sent to the memory scanning circuit 8.
Since the data is different from the data on the route directly reaching the selector ( ) 11, a different address is input to the LUT memory 9 at the blink period, and a blink display is performed.

In this case, by rewriting the blinking memory 10 from the CPU, the display color can be changed arbitrarily even during blinking. A selector () 11 is a direct output of the memory scanning circuit 8 and a blink memory 10.
The output is switched at a blink period (0.5 seconds) synchronized with the frame period.

Normally, the address and data of the blinking memory 10 match, and normal display is performed and no blinking operation is performed. However, when the memory contents do not match the address and data, that is, the contents of the blinking memory 10 are written by the CPU When the switch is changed, it becomes a blinking operation, so unlike the conventional blinking operation, the normal display system is not disturbed at regular intervals (0.5 seconds), so no noise is generated on the display screen during blinking. There are three types of LUT memory 9: three primary colors: red (R), gray (G), and blue (B).
This is done with 4 bit input and output, and the image is displayed with 12 bit/dot.

(f) Effects of the Invention As explained in detail above, the blink control circuit of the present invention includes a control circuit that displays an image using an LUT memory, and a blink memory that switches the input address of the LUT memory at regular intervals. Normally, the address of the blinking memory is the input address of the LUT memory, and if the address and data match, no blinking operation is performed, but if the contents of the blinking memory are rewritten by the CPU and the address and data do not match, the blinking occurs. The selector () switches between the normal display from V-RAM and the data in the blink memory at the blink cycle (0.5 seconds) synchronized with the frame interval, and outputs the data to the LUT memory. Since the system is not disturbed at every blink cycle, noise is not generated on the display screen during blinking and the image quality is not degraded.

[Brief explanation of the drawing]

Figure 1 is a block diagram of a conventional blink control circuit, Figure 2 is a diagram showing the contents of the LUT memory, and Figure 3 is a diagram showing the contents of the LUT memory.
The figure shows a block diagram of one embodiment of the blink control circuit of the present invention. In the figure, 6 is a blink control circuit, 7 is a V-
RAM, 8 is a memory scanning circuit, 9 is LUT memory,
10 is blink memory, 11 is selector (),
12 is a selector (I).

Claims (1)

[Claims] 1. Pixel data obtained by sequentially scanning a video memory with a memory scanning circuit.
When displaying an image using the image display data obtained from the lookup table, the lookup table is given as an input address.
A blink control circuit that performs blink display of a display image by switching the input address of the up table at a constant cycle, a first selector that switches between pixel data from the memory scanning circuit and an address signal from the control device; a blinking memory that uses the output of the first selector as an access address; and a second selector that switches between pixel data from the memory scanning circuit and output data from the blinking memory at a blinking cycle, and the memory scanning a first path leading directly from the circuit to the second selector; and a second path leading from the memory scanning circuit to the second selector via the first selector and blinking memory; In normal image display, the same data as the address is stored in each address of the blinking memory so that the data on the first path and the second path are the same. Blink control characterized in that a predetermined address of the blink memory specified by the control device is rewritten with data from the control device so that data on a first path and a second path are different. circuit.