JPH0563103B2 - - Google Patents

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Publication number
JPH0563103B2
JPH0563103B2 JP62243727A JP24372787A JPH0563103B2 JP H0563103 B2 JPH0563103 B2 JP H0563103B2 JP 62243727 A JP62243727 A JP 62243727A JP 24372787 A JP24372787 A JP 24372787A JP H0563103 B2 JPH0563103 B2 JP H0563103B2
Authority
JP
Japan
Prior art keywords
crystalline silicon
layer
semiconductor layer
forbidden band
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP62243727A
Other languages
Japanese (ja)
Other versions
JPS6489472A (en
Inventor
Tadashi Saito
Tsuyoshi Uematsu
Sunao Matsubara
Yasuhiro Kida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62243727A priority Critical patent/JPS6489472A/en
Publication of JPS6489472A publication Critical patent/JPS6489472A/en
Publication of JPH0563103B2 publication Critical patent/JPH0563103B2/ja
Granted legal-status Critical Current

Links

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/545Microcrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/546Polycrystalline silicon PV cells

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  • Photovoltaic Devices (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はヘテロ接合を有する結晶シリコン太陽
電池に係り、特に光電気変換効率の高いデバイス
構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a crystalline silicon solar cell having a heterojunction, and particularly to a device structure with high photoelectric conversion efficiency.

〔従来の技術〕[Conventional technology]

pn又はpin接合を有するシリコン太陽電池の光
電気変換効率を上げるには、半導体バルク内部で
の光生成キヤリヤの損失を防止するのみならず半
導体表面での損失を防止することが重要である。
特に、後者に関し、光入射シリコン表面もしくは
電極部の下での光生成キヤリヤの再結合を防止す
ることが重要な課題である。その対策の一例とし
て、光入射シリコン表面での損失の低減はシリコ
ン表面を酸化することにより実現されている。ま
た電極下部での注入キヤリヤ再結合防止に関して
は、電極とn+層の間にn+多結晶Si層を介在させ
てn+n+接合を形成する方法が提案されている。
(アニユアル・プログレス・レポート:フオトボ
ルタイツクス、(1986年4月)第15頁(Annual
Progress Report:Photovoltaics、April(1986)
p.15)参照)。
In order to increase the photoelectric conversion efficiency of silicon solar cells with pn or pin junctions, it is important to prevent not only the loss of photogenerated carriers within the semiconductor bulk but also the loss at the semiconductor surface.
Particularly regarding the latter, it is an important issue to prevent recombination of the photogenerated carriers under the light-incident silicon surface or electrode section. As an example of countermeasures, the loss at the light incident silicon surface is reduced by oxidizing the silicon surface. Regarding prevention of injection carrier recombination below the electrode, a method has been proposed in which an n + polycrystalline Si layer is interposed between the electrode and the n + layer to form an n + n + junction.
(Annual Progress Report: Fotovoltaics, (April 1986) p. 15 (Annual
Progress Report: Photovoltaics, April (1986)
(See p.15).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術においては、広い禁制帯幅を有す
る半導体層の利用は考慮されておらず、従つて充
分に効果のある少数キヤリヤ再結合防止はなされ
ていない。
The above-mentioned prior art does not take into consideration the use of a semiconductor layer having a wide forbidden band width, and therefore does not provide a sufficiently effective prevention of minority carrier recombination.

本発明の目的は、かかる従来技術の欠点が無
く、高い光電気変換効率を有する光電気変換デバ
イスの構造を提供することにある。
An object of the present invention is to provide a structure of a photoelectric conversion device that does not have the drawbacks of the prior art and has high photoelectric conversion efficiency.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、結晶性シリコンでなるpn接合の
いずれか一方に接して、結晶性シリコンとそれよ
り禁制帯幅が広い半導体からなるヘテロ接合多層
構造の半導体層でなるN+もしくはP+層を形成し
たヘテロ接合半導体装置により達成される。な
お、この禁制帯幅が多き半導体は、酸素、窒素、
水素を含有するものでもよい。
The above purpose is to form an N + or P + layer consisting of a semiconductor layer with a heterojunction multilayer structure consisting of crystalline silicon and a semiconductor with a wider bandgap in contact with one of the pn junctions made of crystalline silicon. This is achieved by a heterojunction semiconductor device. Note that semiconductors with a large forbidden band width include oxygen, nitrogen,
It may also contain hydrogen.

該禁制帯幅が広い半導体層の形成法としては、
シラン系ガスを主な原料としたプラズマCVD法、
スパツタリング法、熱CVD法、光CVD法や分子
線蒸着法などがある。例えば、シラン系ガスのプ
ラズマCVD法を用いれば通常1.1〜2.0eVと禁制
帯幅を変化させることが出来、又ガスの種類、ガ
ス濃度やプラズマCVD条件により、結晶量を変
化させ、ヘテロ接合半導体の物性を制御する事が
可能である。
The method for forming the semiconductor layer with a wide forbidden band width is as follows:
Plasma CVD method using silane gas as the main raw material,
Examples include sputtering method, thermal CVD method, optical CVD method, and molecular beam evaporation method. For example, by using the plasma CVD method using silane-based gas, the forbidden band width can be varied from 1.1 to 2.0 eV, and the amount of crystals can be varied depending on the type of gas, gas concentration, and plasma CVD conditions. It is possible to control the physical properties of

又、他の反応ガス、例えばCH4、(CH32
SiH2、O2、NH3などを添加すればより禁制帯幅
の大きい半導体層を形成できる。この場合、特に
プラズマCVD法を使えば膜厚やドーピングの制
御性が優れており、実用価値が高い。
Also, other reactive gases such as CH 4 , (CH 3 ) 2 ,
By adding SiH 2 , O 2 , NH 3 or the like, a semiconductor layer with a larger forbidden band width can be formed. In this case, the plasma CVD method in particular has excellent control over film thickness and doping, and has high practical value.

又、この方法を用いれば、禁制帯幅の異なる半
導体層の積層化により任意のバンド構造を持つヘ
テロ接合を形成できる。特に、界面に禁制帯幅の
広い半導体薄層を界在させれば、逢半導体薄層へ
の少数キヤリヤの注入が効果的に阻止できる。
Furthermore, by using this method, a heterojunction having an arbitrary band structure can be formed by stacking semiconductor layers having different forbidden band widths. In particular, if a thin semiconductor layer with a wide forbidden band width is present at the interface, injection of minority carriers into the thin semiconductor layer can be effectively prevented.

〔作用〕[Effect]

該シリコンヘテロ半導体と結晶シリコンとのヘ
テロ接合作用を第1図と第2図を用いて説明す
る。
The heterojunction effect between the silicon heterosemiconductor and crystalline silicon will be explained with reference to FIGS. 1 and 2.

第1図は、N+形ヘテロ半導体層とP形単結晶
Siとの接合のバンド構造図である。例えば、プラ
ズマCVD法で形成した微結晶Siの平均的禁制帯
幅は約1.4eVで、結晶部(Eg=1.1eV)と非晶質
部(Eg=1.8eV)から構成されている事が知られ
ている。このヘテロ構造では、矢印で示すように
正孔のN+エミツタ層への注入が阻止される。
Figure 1 shows an N + type hetero semiconductor layer and a P type single crystal.
It is a band structure diagram of a junction with Si. For example, it is known that the average forbidden band width of microcrystalline Si formed by plasma CVD is approximately 1.4 eV, and it is composed of a crystalline part (Eg = 1.1 eV) and an amorphous part (Eg = 1.8 eV). It is being This heterostructure prevents holes from being injected into the N + emitter layer, as shown by the arrow.

第2図は、p+形ヘテロ半導体層とp形単結晶Si
との接合のバンド構造図である。P形単結晶Siに
P+形ヘテロ半導体層を接合することにより、光
励起で生じたP中の電子が矢印で示すようにPP+
界面から追返えされ、その結果外部に有効に取出
され変換効率の向上をもたらす。
Figure 2 shows a p + type hetero semiconductor layer and a p type single crystal Si
It is a band structure diagram of the junction with. P type single crystal Si
By joining the P + type hetero semiconductor layers, the electrons in P generated by photoexcitation move to PP +
It is repelled from the interface and, as a result, effectively taken out to the outside, resulting in an improvement in conversion efficiency.

〔実施例〕〔Example〕

以下、本発明の実施例を説明する。 Examples of the present invention will be described below.

実施例 1 第3図を用い、具体的適用例を説明する。Example 1 A specific application example will be explained using FIG.

1,2および3はそれぞれベース層、エミツタ
層およびコレクタ層で、4はヘテロ半導体層であ
る。5と6は酸化パツシベーシヨン層と反射防止
膜、7と8はそれぞれ得エミツタ電極とコレクタ
電極である。
1, 2 and 3 are a base layer, an emitter layer and a collector layer, respectively, and 4 is a hetero semiconductor layer. 5 and 6 are an oxidized passivation layer and an antireflection film, and 7 and 8 are an emitter electrode and a collector electrode, respectively.

上記のNPP+構造はP形単結晶Si基板1の上
に、通常の拡散技術により作られ、このN形エミ
ツタ層2の表面にプラズマCVD法を用いN+形ヘ
テロ半導体層4を形成した。この方法では、
SiH4−H2系の混合ガス(モル比1:30)、ドーパ
ントとしてPH3(PH3/SiH4=1000ppm)を用
い、1〜3Torrの低真空下で13MHzの高周波電界
を印加した。基板温度を200℃とした結果、比抵
抗0.01Ω・cmの微結晶シリコン層を得た。層およ
び電極5〜8は従来技術で形成した結果、逆方向
エミツタ電流密度として10-14A/cm2の値を得た。
The above NPP + structure was fabricated on a P type single crystal Si substrate 1 by a normal diffusion technique, and an N + type hetero semiconductor layer 4 was formed on the surface of this N type emitter layer 2 using a plasma CVD method. in this way,
Using a mixed gas of SiH 4 -H 2 (molar ratio 1:30) and PH 3 (PH 3 /SiH 4 = 1000 ppm) as a dopant, a high frequency electric field of 13 MHz was applied under a low vacuum of 1 to 3 Torr. As a result of setting the substrate temperature to 200°C, a microcrystalline silicon layer with a specific resistance of 0.01Ω·cm was obtained. The layers and electrodes 5-8 were formed using conventional techniques, resulting in a reverse emitter current density of 10 -14 A/cm 2 .

実施例 2 ヘテロ半導体層として、積層型ヘテロ半導体を
用いる場合について説明する。
Example 2 A case where a stacked hetero semiconductor is used as the hetero semiconductor layer will be described.

該ヘテロ半導体層を形成するため、光CVD法
を用いた。この方法では、低圧水銀ランプからの
紫外線を反応ガスに照射し、光分解により半導体
層を形成する。禁制帯幅の小さい半導体層は
Si2H6−SiH2−H2系の反応ガスを用いて作製さ
れ、他方、禁制帯幅の広い半導体層はSi2H6−H2
系反応ガスを用いて作製される。これらの方法を
交互に繰返すことにより積層したワイドギヤツプ
半導体層が形成された。得られたN形ヘテロ半導
体の禁制帯幅は約1.5eV、比抵抗は0.05Ω・cmで、
実施例1と同程度の逆方向飽和電流が得られた。
A photo-CVD method was used to form the hetero semiconductor layer. In this method, a reactive gas is irradiated with ultraviolet light from a low-pressure mercury lamp, and a semiconductor layer is formed by photolysis. A semiconductor layer with a small forbidden band width is
The Si 2 H 6 −SiH 2 −H 2 based reactive gas is used to fabricate the Si 2 H 6 −SiH 2 −H 2 semiconductor layer, while the semiconductor layer with a wide forbidden band width is formed using Si 2 H 6 −H 2 .
Produced using reactive gases. By repeating these methods alternately, laminated wide gap semiconductor layers were formed. The forbidden band width of the obtained N-type hetero semiconductor is approximately 1.5 eV, the specific resistance is 0.05 Ω・cm,
A reverse saturation current comparable to that of Example 1 was obtained.

実施例 3 PP+形アイソヘテロ構造への適用例を説明す
る。該P+形ヘテロ半導体4を形成するため、プ
ラズマCVD法を用いた。この方法では、SiH4
H2系の反応ガス(モル比1:106)、ドーパント
としてB2H6(B2H6/SiH4=1000ppm)を用い、
1〜3Torrの低真空下で13MHzの高周波電界を印
加した。
Example 3 An example of application to a PP + type isoheterostructure will be explained. In order to form the P + type hetero semiconductor 4, a plasma CVD method was used. In this method, SiH 4
Using H 2 -based reaction gas (molar ratio 1:106) and B 2 H 6 (B 2 H 6 /SiH 4 = 1000 ppm) as a dopant,
A high frequency electric field of 13 MHz was applied under a low vacuum of 1 to 3 Torr.

得られた膜は、P+形で引抵抗は1Ω・cm、禁制
帯幅は1.8eVであつた。これにより、太陽電池の
開放電圧が約20mV増加した。
The obtained film was P + type, had an attractive resistance of 1 Ω·cm, and a forbidden band width of 1.8 eV. As a result, the open circuit voltage of the solar cell increased by about 20 mV.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、逆方向電流が小さく、したが
つて光電気変換効率の大きい結晶シリコン太陽電
池を容易に提供することができる。
According to the present invention, it is possible to easily provide a crystalline silicon solar cell with a small reverse current and a high photoelectric conversion efficiency.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図および第2図は、本発明の原理を説明す
るための図、第3図は本発明の基本構造を示す図
である。 1……ベース層、2……エミツタ層、3……コ
レクタ層、4……ヘテロ半導体層、5……酸化
膜、6……反射防止膜、7……エミツタ電極、8
……コレクタ電極。
1 and 2 are diagrams for explaining the principle of the present invention, and FIG. 3 is a diagram showing the basic structure of the present invention. DESCRIPTION OF SYMBOLS 1... Base layer, 2... Emitter layer, 3... Collector layer, 4... Hetero semiconductor layer, 5... Oxide film, 6... Antireflection film, 7... Emitter electrode, 8
...Collector electrode.

Claims (1)

【特許請求の範囲】 1 第1の結晶性シリコン半導体層と第2の結晶
性シリコン半導体層からなる接合を有する結晶シ
リコン太陽電池において、上記第1の結晶性シリ
コン半導体層の上記接合とは反対側の面に接して
形成された、微結晶シリコン層およびバツシベー
シヨン層と、該微結晶シリコン層およびパツシベ
ーシヨン層からなる面の上に少なくとも上記微結
晶シリコン層に接して部分的に形成された電極を
有し、上記微結晶シリコン層は上記第1の結晶性
シリコン半導体層より禁制帯幅が広く、かつ上記
第1の結晶性シリコン半導体層とは同一導電型で
あることを特徴とする結晶シリコン太陽電池。 2 上記微結晶シリコン層は酸素、窒素および水
素からなる群から選ばれた少なくとも1種を含ん
でいる特許請求の範囲第1項記載の結晶シリコン
太陽電池。 3 第1の結晶性シリコン半導体層と第2の結晶
性シリコン半導体層からなる接合を有する結晶シ
リコン太陽電池において、上記第1の結晶性シリ
コン半導体層の上記接合とは反対側の面に接して
形成された半導体積層体およびパツシベーシヨン
層と、該半導体積層体およびパツシベーシヨン層
からなる面の上に少なくとも上記半導体積層体に
接して部分的に形成された電極を有し、上記半導
体積層体は禁制帯幅の広いシリコン系半導体層と
禁制帯幅の狭いシリコン系半導体層とが交互に積
層された構造をしており、その禁制帯幅は上記第
1の結晶性シリコン半導体層のそれより大きく、
かつその導電型は上記第1の結晶性シリコン半導
体層のそれと同一であることを特徴とする結晶シ
リコン太陽電池。 4 上記禁制帯幅の広い半導体層は酸素、窒素お
よび水素からなる群から選ばれた少なくとも1種
を含んでいる特許請求の範囲第3項記載の結晶シ
リコン太陽電池。
[Claims] 1. In a crystalline silicon solar cell having a junction consisting of a first crystalline silicon semiconductor layer and a second crystalline silicon semiconductor layer, the junction of the first crystalline silicon semiconductor layer is opposite to the junction of the first crystalline silicon semiconductor layer. a microcrystalline silicon layer and a passivation layer formed in contact with a side surface, and an electrode partially formed on a surface formed of the microcrystalline silicon layer and passivation layer at least in contact with the microcrystalline silicon layer. and the microcrystalline silicon layer has a wider forbidden band width than the first crystalline silicon semiconductor layer and is of the same conductivity type as the first crystalline silicon semiconductor layer. battery. 2. The crystalline silicon solar cell according to claim 1, wherein the microcrystalline silicon layer contains at least one selected from the group consisting of oxygen, nitrogen, and hydrogen. 3. In a crystalline silicon solar cell having a junction consisting of a first crystalline silicon semiconductor layer and a second crystalline silicon semiconductor layer, in contact with a surface of the first crystalline silicon semiconductor layer opposite to the junction. The semiconductor stack has a formed semiconductor stack and a passivation layer, and an electrode is formed on a surface of the semiconductor stack and the passivation layer, at least partially in contact with the semiconductor stack, and the semiconductor stack has a forbidden band. It has a structure in which silicon-based semiconductor layers having a wide width and silicon-based semiconductor layers having a narrow forbidden band width are alternately stacked, and the forbidden band width thereof is larger than that of the first crystalline silicon semiconductor layer,
A crystalline silicon solar cell characterized in that the conductivity type thereof is the same as that of the first crystalline silicon semiconductor layer. 4. The crystalline silicon solar cell according to claim 3, wherein the semiconductor layer with a wide forbidden band width contains at least one member selected from the group consisting of oxygen, nitrogen, and hydrogen.
JP62243727A 1987-09-30 1987-09-30 Crystal silicon solar cell Granted JPS6489472A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62243727A JPS6489472A (en) 1987-09-30 1987-09-30 Crystal silicon solar cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62243727A JPS6489472A (en) 1987-09-30 1987-09-30 Crystal silicon solar cell

Publications (2)

Publication Number Publication Date
JPS6489472A JPS6489472A (en) 1989-04-03
JPH0563103B2 true JPH0563103B2 (en) 1993-09-09

Family

ID=17108090

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62243727A Granted JPS6489472A (en) 1987-09-30 1987-09-30 Crystal silicon solar cell

Country Status (1)

Country Link
JP (1) JPS6489472A (en)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57204178A (en) * 1981-06-10 1982-12-14 Matsushita Electric Ind Co Ltd Optoelectric transducer
JPS6136716A (en) * 1984-07-30 1986-02-21 Minolta Camera Co Ltd Microfilm projecting optical system

Also Published As

Publication number Publication date
JPS6489472A (en) 1989-04-03

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