JPH0564893B2 - - Google Patents
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- Publication number
- JPH0564893B2 JPH0564893B2 JP61266166A JP26616686A JPH0564893B2 JP H0564893 B2 JPH0564893 B2 JP H0564893B2 JP 61266166 A JP61266166 A JP 61266166A JP 26616686 A JP26616686 A JP 26616686A JP H0564893 B2 JPH0564893 B2 JP H0564893B2
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- Prior art keywords
- signal
- amplitude
- circuit
- output
- hold circuit
- Prior art date
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- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
Description
【発明の詳細な説明】
〔概要〕
多値QAM或いはSSB変調など、定められた振
幅の変化に伝送情報を有するベースバンド信号で
変調された被変調のマイクロ波信号で、且つ途中
の伝送路でフエージング等により信号全体のレベ
ルが不規則に変動するマイクロ波信号の受信回路
に用いられるAGC回路であつて、入力する受信
レベルが変動する被変調の搬送波信号を入力して
増幅し検波した出力の振幅値の、受信信号全体の
レベル変動を検出するのに充分な一定時間毎の最
大値を記憶するピークホールド回路と、その記憶
した最大値をサンプルして次の最大値までホール
ドするサンプルホールド回路を備えて、高速デー
タで振幅変調した被変調のマイクロ波信号を振幅
成分に歪を与えることなく、しかしながら、フエ
ージング等による入力信号全体のレベルの変動に
対しては、良好な振幅制御動作を行うAGC回路。[Detailed Description of the Invention] [Summary] A modulated microwave signal that is modulated with a baseband signal that has transmission information in a predetermined change in amplitude, such as multilevel QAM or SSB modulation, and that is transmitted along a transmission path. This is an AGC circuit used in a receiving circuit for microwave signals whose overall signal level fluctuates irregularly due to fading, etc. The output is amplified and detected by inputting a modulated carrier signal whose receiving level fluctuates. A peak hold circuit that stores the maximum value of the amplitude value at fixed time intervals sufficient to detect level fluctuations of the entire received signal, and a sample hold circuit that samples the stored maximum value and holds it until the next maximum value. The circuit is equipped with a high-speed data amplitude-modulated microwave signal that does not distort the amplitude component, but has good amplitude control operation against fluctuations in the overall level of the input signal due to fading, etc. AGC circuit that performs.
本発明は多値QAM(直交振幅変調)やSSB変
調(単一サイドバンド振幅変調)された信号な
ど、振幅値の定められた変化に伝送情報を有する
ベースバンド信号で高周波の搬送波信号を変調し
た被変調の搬送波入力信号を可変利得増幅器で増
幅して出力搬送波のレベルを一定値になるように
前記増幅器の利得を自動制御する自動利得制御
(AGC)回路に関する。
The present invention modulates a high-frequency carrier signal with a baseband signal that has transmission information in a predetermined change in amplitude value, such as a signal subjected to multilevel QAM (quadrature amplitude modulation) or SSB modulation (single sideband amplitude modulation). The present invention relates to an automatic gain control (AGC) circuit that amplifies a modulated carrier wave input signal with a variable gain amplifier and automatically controls the gain of the amplifier so that the level of the output carrier wave becomes a constant value.
入力の例えば多値QAM信号波は、n値の定め
られた変化をする振幅値と位相値とを有する被変
調の搬送波信号の高速デイジタル信号であり且つ
その多値QAM信号全体のレベルが、途中の無線
の伝送路で発生するフエージング等で不規則に変
動するので、その受信波に対する増幅器のAGC
回路としては、入力の本来の振幅変調された伝送
信号に対しては応答しなくて歪みを与えず、途中
の伝送路でのフエージング等による全体のレベル
変動のみに対しては適切に応答して出力レベルが
一定となることが要求されている。 For example, the input multi-value QAM signal wave is a high-speed digital signal of a modulated carrier wave signal having an amplitude value and a phase value that change in a predetermined value of n, and the level of the entire multi-value QAM signal changes midway. The AGC of the amplifier for the received wave fluctuates irregularly due to fading, etc. that occurs in the wireless transmission path.
As a circuit, it does not respond to the original amplitude-modulated transmission signal of the input and does not cause distortion, and responds appropriately only to overall level fluctuations due to fading in the transmission path, etc. It is required that the output level be constant.
従来のAGC回路は、第5図のブロツク図に示
すごとく、入力搬送波信号Eioを可変利得増幅器
AGC AMPにより増幅して出力搬送波信号Eputを
出力する回路において、出力搬送波信号Eputの一
部を時定数回路CRをもつ検波器DETにより検波
し、検波器DETの直流検波出力を直流増幅器DC
AWPで増幅して前記可変利得増幅器AGC AMP
に加え可変利得増幅器AGC AMPの増幅利得を
制御して搬送波出力Eputの振幅を一定にする構成
になつている。
The conventional AGC circuit converts the input carrier signal Eio into a variable gain amplifier, as shown in the block diagram of Figure 5.
In a circuit that outputs an output carrier signal E put after being amplified by an AGC AMP, a part of the output carrier signal E put is detected by a detector DET having a time constant circuit CR, and the DC detection output of the detector DET is sent to a DC amplifier DC.
Variable gain amplifier AGC AMP with AWP amplification
In addition, the amplification gain of the variable gain amplifier AGC AMP is controlled to keep the amplitude of the carrier wave output Eput constant.
第5図の従来のAGC回路を、高速データで多
値QAM変調された被変調の多値QAMマイクロ
波信号波を受信する受信機に使用すると、受信機
入力の多値QAMマイクロ波信号は、高速のデー
タを、定められた振幅の変化と位相の変化の両方
により伝送するものである為、入力の多値QAM
マイクロ波信号は、その振幅値が一定ではなく、
変調信号(データ)により定められた振幅の変化
をする信号であり且つ途中の伝送路でのフエージ
ング等により全体のレベルが不規則に変動する信
号である。
When the conventional AGC circuit shown in FIG. 5 is used in a receiver that receives a modulated multi-value QAM microwave signal wave that has been multi-value QAM-modulated with high-speed data, the multi-value QAM microwave signal input to the receiver is Since high-speed data is transmitted using both predetermined amplitude changes and phase changes, the input multilevel QAM
The amplitude value of microwave signals is not constant;
It is a signal whose amplitude changes as determined by a modulation signal (data), and whose overall level fluctuates irregularly due to fading or the like in an intermediate transmission path.
それで、高速の多値QAMの搬送波信号の入力
レベルのフエージング等による速い変動に応答す
るためAGC回路の検波器DETの時定数CRを小さ
い値に選ぶと、AGC動作の応答が速くなつて
AGC回路の制御信号が多値QAM信号の振幅変化
に追随してしまい、伝送すべき信号(データ)の
1タイムスロツト毎の定められた振幅の変化に歪
を生じてしまう。従つて、検波器DETの時定数
CRの値は、伝送信号の1タイムスロツトの約10
倍以上としなければならない。 Therefore, if the time constant CR of the AGC circuit's detector DET is selected to a small value in order to respond to fast fluctuations due to fading, etc. of the input level of the carrier wave signal of high-speed multilevel QAM, the response of the AGC operation becomes faster.
The control signal of the AGC circuit follows the amplitude change of the multilevel QAM signal, causing distortion in the predetermined amplitude change for each time slot of the signal (data) to be transmitted. Therefore, the time constant of the detector DET
The value of CR is approximately 10 timeslot of the transmission signal.
It must be more than doubled.
時定数CRをこのような大きな値にすると、こ
んどは、多値QAM信号波の入力レベルのフエー
ジング等による速い変動に対してAGC回路の制
御動作が追随出来ないという問題が生じる。 If the time constant CR is set to such a large value, a problem arises in that the control operation of the AGC circuit cannot follow fast fluctuations due to fading or the like in the input level of the multilevel QAM signal wave.
上記の従来のAGC回路の問題点は、第1図の
原理ブロツク図に示すごとく、1タイムスロツト
毎の定められた振幅の変化に伝送すべき情報を有
するベースバンド信号で高周波の搬送波を変調し
た被変調の高周波搬送波信号であり且つ途中の伝
送路でフエージング等のため前記信号の定められ
た振幅の変化とは別の信号全体のレベルが不規則
に変動する被変調搬送波信号として入力する搬送
波信号を、制御信号Cにより可変される利得で増
幅して出力搬送波信号を出力する可変利得増幅器
3と、該増幅器3の出力搬送波信号を検波した振
幅値の前記信号全体のレベル変動を検出するのに
充分な大きい一定時間毎の最大値を記憶するピー
クホールド回路1と、該ピークホールド回路1の
出力を前記一定時間を周期としてサンプルし其の
サンプル値を保持するサンプルホールド回路2か
ら成り、該サンプルホールド回路2の出力値が一
定となるように前記制御信号Cにより前記可変利
得増幅器3の増幅利得を自動的に制御するように
構成した本発明によつて解決される。
The problem with the above-mentioned conventional AGC circuit is that, as shown in the principle block diagram in Figure 1, a high-frequency carrier wave is modulated with a baseband signal that contains the information to be transmitted based on a predetermined amplitude change for each time slot. A carrier wave that is input as a modulated carrier signal that is a modulated high-frequency carrier signal and whose overall signal level fluctuates irregularly due to fading or the like in the transmission path, which is different from the change in the predetermined amplitude of the signal. A variable gain amplifier 3 that amplifies a signal with a gain that is varied by a control signal C and outputs an output carrier signal; and a variable gain amplifier 3 that outputs an output carrier signal by amplifying the signal with a gain that is varied by a control signal C; It consists of a peak hold circuit 1 that stores a maximum value large enough for each fixed time period, and a sample hold circuit 2 that samples the output of the peak hold circuit 1 at intervals of the fixed time period and holds the sampled value. This problem is solved by the present invention, which is configured to automatically control the amplification gain of the variable gain amplifier 3 using the control signal C so that the output value of the sample and hold circuit 2 is constant.
本発明のピークホールド回路1は、可変利得増
幅器3の出力搬送波Eputを検波して得たベースバ
ンド信号の振幅の、各1タイムスロツト毎の振幅
値の定められた変化には応答しないだけ充分に大
きいが、然しながら該出力搬送波Eputの全体の不
規則なレベル変動には応答して検出するのに充分
な数十〜数百タイムスロツトの一定時間毎におけ
るピーク値である最大値を検出して記憶し、次
に、その記憶した振幅の最大値を、同じ一定時間
毎に消すリセツトを行う。サンプルホールド回路
2は前記ピークホールド回路のリセツトの影響を
避けて、前記ピークホールド回路1の出力を同じ
数十〜数百タイムスロツトの一定時間間隔でサン
プルして、ピークホールド回路1が記憶した信号
振幅の最大値を次のサンプルの最大値が来るまで
保持するので、サンプルホールド回路2の出力を
制御信号として可変利得増幅器3に加えると、可
変利得増幅器3の利得は、多値QAM信号波のタ
イムスロツト毎の個々の信号振幅の変化には追随
せず、数十〜数百タイムスロツト毎の信号振幅の
最大値のフエージング等による変動のみに追従す
る。
The peak hold circuit 1 of the present invention is sufficient to not respond to a predetermined change in the amplitude value for each time slot of the baseband signal obtained by detecting the output carrier wave E put of the variable gain amplifier 3. However, it is sufficient to respond to and detect the overall irregular level fluctuations of the output carrier wave Eput , which is the peak value at regular intervals of several tens to hundreds of time slots. Then, the stored maximum value of the amplitude is reset to be erased at regular intervals. The sample and hold circuit 2 samples the output of the peak and hold circuit 1 at fixed time intervals of the same several tens to hundreds of time slots, avoiding the influence of the reset of the peak and hold circuit, and outputs the signal stored in the peak and hold circuit 1. Since the maximum value of the amplitude is held until the maximum value of the next sample comes, when the output of the sample hold circuit 2 is applied as a control signal to the variable gain amplifier 3, the gain of the variable gain amplifier 3 becomes equal to that of the multilevel QAM signal wave. It does not follow individual changes in signal amplitude for each time slot, but only for fluctuations due to fading or the like in the maximum value of the signal amplitude for every several tens to hundreds of time slots.
したがつて、可変利得増幅器3のAGC動作は
入力信号全体のレベルが不規則に変動する高速の
多値QAM信号波に対して一定レベルの搬送波信
号を出力する満足なAGC動作を行い、かつ、高
速の受信搬送波信号の伝送情報である振幅の変化
に歪を与えるというようなことはなくなつて問題
が無くなる。 Therefore, the AGC operation of the variable gain amplifier 3 performs a satisfactory AGC operation that outputs a carrier signal at a constant level for a high-speed multilevel QAM signal wave in which the level of the entire input signal fluctuates irregularly, and This eliminates the problem of causing distortion to changes in amplitude, which is the transmission information of the high-speed received carrier signal.
第2図は本発明の実施例の自動利得制御回路の
構成を示すブロツク図で、第3図は本実施例の動
作を説明するための波形図、第4図は本実施例の
自動利得制御回路のピークホールド回路(図A)
およびサンプルホールド回路(図B)の回路図を
示す。
FIG. 2 is a block diagram showing the configuration of an automatic gain control circuit according to an embodiment of the present invention, FIG. 3 is a waveform diagram for explaining the operation of this embodiment, and FIG. 4 is a diagram showing the automatic gain control circuit of this embodiment. Circuit peak hold circuit (Figure A)
and a circuit diagram of the sample and hold circuit (Figure B).
第2図の可変利得増幅器3の出力搬送波信号
Eputの一部は、ピークホールド回路1のピーク検
波器11のダイオードで検波され、出力搬送波
Eputの振幅のピーク値に比例した検波電圧で、本
来ベースバンド信号の1タイムスロツト毎に定め
られた可変の振幅値と、フエージング等で信号全
体のレベルが変動する変動値との和に比例した検
波電圧が抵抗Rの両端に得られる。このピーク検
波器11の検波出力は、該検波出力から前記フエ
ージング等で信号全体のレベルが変動するレベル
変動値を検出し其の最大値を取り出す為に、電圧
ホールド回路12の演算増幅器OP AMPの+入
力端子に入力される。 Output carrier signal of variable gain amplifier 3 in Fig. 2
A part of E put is detected by the diode of the peak detector 11 of the peak hold circuit 1, and the output carrier
A detection voltage proportional to the peak amplitude of E put , which is the sum of the variable amplitude value originally determined for each time slot of the baseband signal and the fluctuation value where the overall signal level fluctuates due to fading, etc. A proportional detected voltage is obtained across the resistor R. The detection output of the peak detector 11 is sent to the operational amplifier OP AMP of the voltage hold circuit 12 in order to detect a level fluctuation value in which the level of the entire signal fluctuates due to fading, etc., and extract the maximum value thereof. is input to the + input terminal of
演算増幅器OP AMPの出力は自分の−入力端
子に接続されると同時に、コンデンサC1を充電
する。 The output of the operational amplifier OP AMP is connected to its own - input terminal and at the same time charges the capacitor C1.
コンデンサC1は、演算増幅器OP AMPの出
力のVput1により次々と充電されその最大値を保
持するが、コンデンサC1の両端に接続されたリ
セツトスイツチSWpにより、信号全体のレベル変
動を検出するのに充分に大きく適当な数十〜数百
タイムスロツトの一定時間毎にリセツトされる。 The capacitor C1 is charged one after another by the output V put 1 of the operational amplifier OP AMP and held at its maximum value, but the reset switch SW p connected across the capacitor C1 detects the level fluctuation of the entire signal. It is reset at regular time intervals of tens to hundreds of time slots large enough for the purpose.
このコンデンサC1のリセツト動作は、第3図
Aに示す如く、ピークホールド回路への一定時間
毎の制御信号、すなわち、1タイムスロツトに対
して充分に大きい数十〜数百タイムスロツトの時
間毎のリセツトパルスによつて行われるので、コ
ンデンサC1の充電電圧は、各数十〜数百タイム
スロツト毎の搬送波信号出力Eputの最大値を示す
ことになる。 This reset operation of the capacitor C1 is performed by sending a control signal to the peak hold circuit at fixed time intervals, that is, at intervals of tens to hundreds of time slots, which are sufficiently large for one time slot, as shown in FIG. 3A. Since this is done by a reset pulse, the charging voltage of the capacitor C1 will represent the maximum value of the carrier wave signal output Eput for each tens to hundreds of time slots.
このコンデンサC1の充電電圧、すなわち、ピ
ークホールド回路1の出力電圧Vput1は、次のサ
ンプルホールド回路2のサンプリング回路21の
演算増幅器AMP−1の+入力端子に入力され、
そのAMP−1の出力がサンプリング用のオン・
スイツチSW−1を介して電圧ホールド回路22
のコンデンサC2を充電する。AMP−1の出力
は、また、電圧ホールド回路22の演算増幅器
AMP−2の+入力端子に入力される。 The charging voltage of this capacitor C1, that is, the output voltage V put 1 of the peak hold circuit 1 is input to the + input terminal of the operational amplifier AMP-1 of the sampling circuit 21 of the next sample hold circuit 2,
The output of AMP-1 is turned on for sampling.
Voltage hold circuit 22 via switch SW-1
The capacitor C2 is charged. The output of AMP-1 is also connected to the operational amplifier of voltage hold circuit 22.
Input to the + input terminal of AMP-2.
演算増幅器AMP−2の出力電圧Vput2は自分
の−入力端子に接続されると同時に、サンプリン
グ回路21の抵抗R1と抵抗R2の直列抵抗回路
を介して演算増幅器AMP−1の−入力端子に入
力される。また、直列抵抗回路の抵抗R1とR2
の接続点は、サンプリングス用のオフ・スイツチ
SW−2を介してオン・スイツチSW−1の入力
側に接続される。サンプリング用のオン・スイツ
チSW−1とオフ・スイツチSW−2は、第3図
Bに示す如きサンプルホールド回路制御のサンプ
リングパルスによつて駆動されるが、サンプリン
グパルスの周期は前記ピークホールド回路のリセ
ツトパルスの周期と同じで、ピークホールド回路
1の出力電圧Vput1が、数十〜数百タイムスロツ
トの一定時間毎にサンプリングされてコンデンサ
C2を充電し直流電圧として保持される。 The output voltage V put 2 of the operational amplifier AMP-2 is connected to its own - input terminal, and at the same time is connected to the - input terminal of the operational amplifier AMP-1 via a series resistance circuit of the resistor R1 and the resistor R2 of the sampling circuit 21. is input. Also, resistors R1 and R2 of the series resistance circuit
The connection point is the off switch for sampling.
It is connected to the input side of the on switch SW-1 via SW-2. The on switch SW-1 and the off switch SW-2 for sampling are driven by a sampling pulse controlled by a sample hold circuit as shown in FIG. 3B, but the period of the sampling pulse is determined by the peak hold circuit. Same as the period of the reset pulse, the output voltage V put 1 of the peak hold circuit 1 is sampled at fixed time intervals of several tens to hundreds of time slots, charges the capacitor C2, and is held as a DC voltage.
コンデンサC2に保持された直流電圧は、演算
増幅器AMP−2の出力端より直流出力Vput2と
して出力され、可変利得増幅器3にAGCの制御
信号として加えられ増幅器3の利得を制御して
AGC動作を行う。 The DC voltage held in the capacitor C2 is output as a DC output V put 2 from the output terminal of the operational amplifier AMP-2, and is applied to the variable gain amplifier 3 as an AGC control signal to control the gain of the amplifier 3.
Performs AGC operation.
本実施例のAGC回路の可変利得増幅器3の制
御信号Vput2は、AGC回路の出力搬送波信号Eput
をピーク検波した振幅のうち、フエージング等に
より信号全体のレベル変動値を検出するのに充分
な数十〜数百タイムスロツトの間における最大値
である直流電圧Vput1を、同じ周期の数十〜数百
タイムスロツトの一定時間毎にサンプリングした
サンプル値なので、本実施例のAGC回路の制御
信号となる直流出力Vput2は、従来のAGC回路
の各1タイムスロツト毎の信号の振幅歪を考慮し
た時定数CRの検波器の出力電圧を制御信号とし
た応答と比較して応答時間が1/10〜1/100以下の
高速の応答が得られ、フエージングなどによる入
力信号レベルの速い変化に追従して満足なAGC
動作をする。一方、制御信号Vput2は入力搬送波
信号Eioの1タイムスロツト毎の個々の振幅変化
には追従しないので、多値QAM信号波などの振
幅成分に歪を与えることはなく、高速の多値
QAMやSSB変調のマイクロ波信号のAGC回路と
して従来例におけるような振幅歪の発生の問題は
無い。 The control signal V put 2 of the variable gain amplifier 3 of the AGC circuit of this embodiment is the output carrier wave signal E put of the AGC circuit.
Of the peak-detected amplitude, the DC voltage V put 1, which is the maximum value between several tens to hundreds of time slots, which is sufficient to detect the level fluctuation value of the entire signal due to fading, etc., is determined by the number of the same period. Since the sample values are sampled at regular intervals of ten to hundreds of time slots, the DC output V put 2, which is the control signal for the AGC circuit of this embodiment, is the amplitude distortion of the signal for each time slot of the conventional AGC circuit. Compared to the response using the output voltage of a detector with a time constant CR that takes into account the control signal, a faster response with a response time of 1/10 to 1/100 or less can be obtained, and the input signal level is faster due to fading etc. Satisfying AGC that follows changes
take action. On the other hand, since the control signal V put 2 does not follow individual amplitude changes for each time slot of the input carrier signal E io , it does not distort the amplitude components of multi-value QAM signal waves, etc.
There is no problem of amplitude distortion as in conventional AGC circuits for QAM or SSB modulated microwave signals.
以上説明した如く、本発明によれば、従来の
AGC回路の1/10〜1/100以下の応答時間でフエー
ジング等による入力搬送波信号のレベルの速い変
動に応答できて、かつ、出力搬送波信号を検波し
て得た多値QAM信号やSSB信号の被変調のマイ
クロ波信号の各1タイムスロツト毎の定められた
振幅の変化には悪い影響を与えない良好な自動利
得制御回路が得られる効果がある。また、SSB変
調信号波のAGC回路として使用する場合には、
従来例において必要としていたパイロツト信号の
挿入、分岐回路が不要となり、回路の簡素化に役
立つ効果も得られる。
As explained above, according to the present invention, the conventional
It can respond to fast fluctuations in the level of the input carrier signal due to fading etc. with a response time of 1/10 to 1/100 of the AGC circuit, and it can also respond to multilevel QAM signals and SSB signals obtained by detecting the output carrier signal. This has the effect of providing a good automatic gain control circuit that does not adversely affect the predetermined amplitude change for each time slot of the modulated microwave signal. Also, when used as an AGC circuit for SSB modulated signal waves,
This eliminates the need for pilot signal insertion and branch circuits, which were required in the conventional example, and provides the advantage of simplifying the circuit.
第1図は本発明の自動利得制御回路の構成を示
す原理ブロツク図、第2図は本発明の実施例の自
動利得制御回路の構成を示すブロツク図、第3図
は本発明の実施例の自動利得制御回路の動作を説
明するための波形図、第4図は本発明の実施例の
自動利得制御回路のピークホールド回路とサンプ
ルホールド回路の回路図、第5図は従来例の自動
利得制御回路の構成を示すブロツク図である。
第1図、第2図において、1はピークホールド
回路、11はピーク検波器、12は電圧ホールド
回路、2はサンプルホールド回路、21はサンプ
リング回路、22は電圧ホールド回路である。
FIG. 1 is a principle block diagram showing the structure of an automatic gain control circuit according to the present invention, FIG. 2 is a block diagram showing the structure of an automatic gain control circuit according to an embodiment of the present invention, and FIG. 3 is a block diagram showing the structure of an automatic gain control circuit according to an embodiment of the present invention. A waveform diagram for explaining the operation of the automatic gain control circuit, FIG. 4 is a circuit diagram of the peak hold circuit and sample hold circuit of the automatic gain control circuit according to the embodiment of the present invention, and FIG. 5 is a circuit diagram of the automatic gain control circuit of the conventional example. FIG. 3 is a block diagram showing the configuration of the circuit. In FIGS. 1 and 2, 1 is a peak hold circuit, 11 is a peak detector, 12 is a voltage hold circuit, 2 is a sample hold circuit, 21 is a sampling circuit, and 22 is a voltage hold circuit.
Claims (1)
伝送すべき情報を有するベースバンド信号で高周
波の搬送波を変調した被変調の高周波搬送波信号
であり且つ途中の伝送路でフエージング等のため
前記の定められた振幅の変化とは別の信号全体の
レベルが不規則に変動する被変調搬送波信号とし
て入力する搬送波信号を、制御信号Cにより可変
される利得で増幅して出力搬送波信号を出力する
増幅器3と、該増幅器3の出力搬送波信号を検波
して得た振幅値の中の前記信号全体のレベル変動
を検出するのに充分な大きい一定時間毎の最大値
を記憶するピークホールド回路1と、該ピークホ
ールド回路1の出力を前記一定時間を周期として
サンプルし其のサンプル値を保持するサンプルホ
ールド回路2から成り、該サンプルホールド回路
2の出力値が一定となるように前記制御信号Cに
より前記増幅器3の増幅利得を自動的に制御する
ようにしたことを特徴とする自動利得制御回路。1 A modulated high-frequency carrier signal in which a high-frequency carrier wave is modulated with a baseband signal having information to be transmitted with a predetermined change in amplitude for each time slot, and the above-mentioned specifications are applied due to fading, etc. in the transmission path on the way. An amplifier 3 that amplifies a carrier signal inputted as a modulated carrier signal in which the level of the entire signal varies irregularly in addition to the change in the amplitude of the signal, with a gain variable by a control signal C, and outputs an output carrier signal. , a peak hold circuit 1 that stores a maximum value for each fixed time that is large enough to detect the level fluctuation of the entire signal among the amplitude values obtained by detecting the output carrier signal of the amplifier 3; It consists of a sample hold circuit 2 which samples the output of the peak hold circuit 1 at intervals of the predetermined period of time and holds the sampled value. An automatic gain control circuit characterized in that the amplification gain of No. 3 is automatically controlled.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26616686A JPS63120532A (en) | 1986-11-07 | 1986-11-07 | Automatic gain control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26616686A JPS63120532A (en) | 1986-11-07 | 1986-11-07 | Automatic gain control circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63120532A JPS63120532A (en) | 1988-05-24 |
| JPH0564893B2 true JPH0564893B2 (en) | 1993-09-16 |
Family
ID=17427190
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26616686A Granted JPS63120532A (en) | 1986-11-07 | 1986-11-07 | Automatic gain control circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63120532A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5203016A (en) * | 1990-06-28 | 1993-04-13 | Harris Corporation | Signal quality-dependent adaptive recursive integrator |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS57181236A (en) * | 1981-04-30 | 1982-11-08 | Fujitsu Ltd | Waveform amplification detecting system |
-
1986
- 1986-11-07 JP JP26616686A patent/JPS63120532A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63120532A (en) | 1988-05-24 |
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| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |