JPH0565893B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a microcomputer with a key scan input device.

Key scan type input devices can have many key switches with fewer signal lines, so
It is applied to relatively low-cost keyboards and portable electronic devices such as calculators and electronic watches.

An example of a key scan input circuit is shown in FIG. 1
is a microcomputer, 2 is a key switch, 3 is a
is an output port, 4 is an input port, and 5 is a pull-down resistor. The four input port signal lines I0 to I3 are normally kept at the _L0 level by the action of a pull-down resistor built into the microcomputer. The four output port signal lines from 0 to ₃ are scanned at a constant cycle, and in the _first state, _the signals (Hi, _{L 0} , L ₀ , _{L 0} )
level, (L ₀ , Hi, L ₀ , L ₀ ) level in the second state, (L 0 , L _{0 ,} Hi, L ₀ ) level in the third state, (L ₀ ,L 0 ) level in the fourth state. ₀ , L ₀ , Hi) level, and these four states are repeated. In addition, the driving impedance of the output port is
It is set sufficiently low compared to the impedance of the pull-down resistor. For example, while ₂ is at Hi level, information from the four key switches connected to line ₂ is read into the input port.

For ultra-compact devices such as electronic wristwatches that require high-density packaging efficiency, it is difficult to provide a dedicated key switch for resetting the system of a microcomputer, and the system reset is usually performed by pressing four key switches at the same time. It is advantageous to use a method of activation. However, when the microcomputer is system down, each output port is not necessarily at Hi level, so it is not possible to initiate a system reset and initialize the microcomputer using the method described above. Therefore, in the past, electronic devices equipped with microcomputers using the key scan input method required a dedicated reset key, which was an obstacle to miniaturization and design of the devices. Furthermore, if this is ignored and the device is configured with only the key matrix, it may not be necessary to restart the device by turning the power back on when the system goes down, reducing the reliability of the device as a product.

The present invention aims to solve the above-mentioned drawbacks, and provides a key scan type microcomputer that can be reset and started from a key matrix without providing a dedicated reset key even when the microcomputer system is down. The purpose is to

Furthermore, the microcomputer according to the present invention includes:
It is equipped with a means to detect a system down of the microcomputer and a means to forcibly initialize the state of the output port when the system goes down, so that even when the microcomputer is operating abnormally, a specific key switch in the key matrix or a specific key switch can be activated. The present invention is characterized in that it includes a means for activating a system reset by a combination of groups.

FIG. 2 shows an embodiment of a key scan input type microcomputer according to the present invention. 6 and 7 are master rave type flip-flops, 8 is NOR
A gate, 9 is an inverter, 10 is a half-bit flip-flop, 11 is an interface between different power sources, 12 is an output buffer, 13 is a pull-down resistor, and a key switch is provided at the intersection of _i and I _i . 6 and 7 constitute a counter, whose input clock is _φ1 , which is a 1Hz signal. Also,
10 is inputted with 0, which is the least significant bit output of the accumulator. SW is a ₀ read signal. 14 is a NAND gate that activates system reset.

Conventionally, the output of the accumulator was directly output to the output port through an interface and an output buffer, but in this embodiment, a new counter (timer operation that measures a predetermined time) is added only to the output port ₀ system. ), and if ₀ reaches the L ₀ level for a certain period of time, it will force _0.
There is a function to set it to Hi level.

Its operation is based on a counter clock signal of 1Hz.
Therefore, when ₀ becomes Hi for more than 1 to 2 seconds continuously, all switches connected to ₀ among the four signal lines connected to I ₀ to _{I 3} are turned on at the same time. At this time, a system reset signal is output from the NAND gate 14, and a system reset operation is started in terms of hardware.

To explain in more detail, during normal operation of a microcomputer, 0 = continues for more than 1 second.
Since the software does not use a state that would result in the L ₀ level, it is possible to detect a system down state by observing the 0〓 level. The master slave flip-flops 6 and 7 are in the reset state when 0 = L 0, depending on the level of the A ₀ signal of the accumulator, and are in the reset state when ₀ = L _{0 .}
When = Hi, it is in the operating state. When ₀ = _L0 , ₀ =Hi due to the action of the NOR gate 8, so the system can be reset and activated without special processing. Conversely, if the period of ₀ = Hi continues for more than 1 second, the reset inputs R of flip-flops 6 and 7 become Hi, allowing flip-flops 6 and 7 to continue operating for more than 1 second without being reset.
The L ₀ input to flip-flop 6 is shifted and output as Hi to the output Q of flip-flop 7, forcing _{the 0} level to Hi, making it possible to start the system reset even in this state. .

If the key scan type microcomputer according to the present invention is used, a dedicated reset key switch is not required other than the key matrix, which increases the efficiency and flexibility of equipment implementation and makes it possible to reduce the size of the device, such as an electronic wristwatch with a calculator. It is possible to reliably restart a microelectronic device from a system down state.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an example of a conventional key scan input circuit. 1... Microcomputer, 2... Key switch, 3... Output port, 4... Input port, 5
...Pull-down resistance. FIG. 2 is a circuit diagram showing an embodiment of a key scan input type microcomputer according to the present invention. 6, 7...Master-slave type flip-flop, 8...NOR gate, 9...Inverter, 1
0...Half-bit flip-flop, 11...
... Interface between different power supplies, 12 ... Output buffer, 13 ... Pull-down resistor, 14 ...
NAND gate.

Claims (1)

[Scope of Claims] 1 A plurality of input port signal lines and a plurality of output port signal lines are arranged in a matrix, a key switch is arranged at the intersection of the matrix, and the potential of the plurality of input port signal lines is set to the output port signal line. A key scan input type microcomputer having a reset signal generating means for detecting a first potential output to a port signal line and generating a signal for resetting the microcomputer, comprising: a counter that is reset at a predetermined period; It is characterized by comprising means for forcibly setting the potential of at least one of the plurality of output port signal lines to the first potential based on an output when the counter operates without being reset in the predetermined period. A key scan input type microcomputer.