JPH0566059B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a current supply circuit used in subscriber circuits such as telephone exchanges.

[Conventional technology]

As semiconductor technology progresses, telephone exchanges, which used to be mostly made up of electromagnetic parts, have gradually become more electronic, starting with the central control system, and electronic parts, mainly semiconductor integrated circuits, have come to be widely used. Switching equipment is becoming smaller and more sophisticated.

However, the trunks and call path switch networks in telephone exchanges that send signals directly to subscriber lines handle extremely high signal levels, and due to induced lightning strikes, power line collisions, etc. Since overvoltage is applied, it is not compatible with electronic systems that handle signals of about several volts, which has delayed the development of electronic systems.

FIG. 1 is an example of a current supply circuit using electromagnetic components, which was used in a trunk for supplying communication current in an exchange.

The communication current is supplied from the battery 1 in the trunk through the relay (RLY) 2 to the subscriber line [battery line (A),
A telephone current is supplied to the subscriber terminal (TEL) 5 via the grounding wire (B). The relay (RLY) 2 has a current detection function to detect the vacant state and usage state of the subscriber terminal (TEL) 5, and its resistance is generally 440Ω due to the current limit when the line is grounded. . By using a relay, high impedance can be achieved for voice signals, and deterioration in call quality can be suppressed. In addition, the voltage of the battery 1 in the station is the minimum DC current of 20 mA required to operate the transmitter in the subscriber terminal (TEL) 5, and the maximum resistance of the subscriber line is 1700Ω.
In order to supply the voltage under these conditions, the voltage is set to a high voltage of -48V, for example. The subscriber line resistance can be as low as 0Ω depending on the line length, so the communication current is at its maximum.
Increases to 120mA. Therefore, when converting the circuit shown in FIG. 1 into electronic form, in addition to the above-mentioned problem that the signal level to be handled is large, there is also the problem that the power consumption within the current supply circuit 6' becomes extremely large. , which was hindering the development of electronic devices, that is, the development of semiconductor integrated circuits.

[Problem to be solved by the invention]

The power consumption P _DC and communication current I _L of the current supply circuit 6' shown in FIG. 1 of the prior art are expressed by the following equations.

I _L = V _BB / R _L + Rin ... (1) P _DC = Rin [V _BB / R _L + Rin] ... (2) However, R _L is the resistance of the subscriber terminal (TEL) 5 and the subscriber line. sum, Rin: DC internal resistance of the relay (RLY), V _BB : battery voltage, where, V _BB , the nominal value of Rin, V _BB = 48V,
When Rin = 440Ω is substituted and a trial calculation is made for R _L = 0 to 1700Ω, the result is as shown in Fig. 2. As shown in Figure 2, the current supply circuit 6' consumes a maximum of 5.4W, and how to deal with heat dissipation when implementing high-density packaging for miniaturization due to semiconductor integrated circuits. becomes a serious issue. Therefore, in order to efficiently advance the computerization and miniaturization of telephone exchanges, it is necessary not only to simply convert conventional electromagnetic circuits into electronic devices, but also to take some measures to reduce power consumption.

The present invention was invented in view of the above problems, and an object of the present invention is to provide a current supply circuit with low power consumption.

[Means to solve the problem]

In order to achieve the above object, the present invention provides a current supply circuit that is provided between the internal power source of a telephone exchange and a subscriber terminal as a load and supplies direct current to the load. An output transistor current amplifier, a two-wire voltage detector that detects a load voltage, and a two-input driving transistor that inputs the output of the two-wire voltage detector to one input terminal to drive the output transistor current amplifier. A DC power supply circuit consisting of a current amplifier and a constant current source that drives the other input of the drive transistor current amplifier, a load voltage detection circuit that detects the load voltage, and a DC power supply circuit connected in series between the local power supply and the DC power supply circuit. The output voltage of the DC-DC converter is controlled by the control signal of the load voltage detection circuit to reduce the load voltage and output and drive the DC power supply circuit. The current transistor current is controlled to be equal to or higher than the sum of the minimum operating voltage for driving the transistor current amplifier.

[Effect]

When the DC power supply circuit is constituted by an electronic circuit such as a transistor, the voltage drop of the transistor does not necessarily require a voltage equal to the DC equivalent resistance times the power supply current. Since the DC equivalent resistance is realized circuit-wise by the feedback circuit, a voltage drop of the minimum operating voltage (V _CEM ; usually 1 to 2 V) at which the transistor can operate is sufficient. First, when the current supply circuit is configured to include a DC power supply circuit and a switching type DC-DC conversion circuit, the power consumption becomes almost no problem by increasing the conversion efficiency of the switching type DC-DC conversion circuit. Therefore, there is no effective voltage drop in the DC supply circuit (voltage extra than the minimum operating voltage of the transistor (V _CEM );
By reducing ΔV), the power consumption of the entire current supply circuit can be reduced.

In particular, in the present invention, the DC power supply circuit is configured as described above, a load voltage detection circuit is provided, and the output voltage (V _OUT ) of the DC-DC conversion circuit is adjusted to the load voltage drop (V _L ) and for output and,
By controlling the voltage so that it is equal to or higher than the sum of the minimum operating voltage (V _CEM ) of the drive transistor current amplifier, ΔV = V _OUT −V _L −V _CEM ≧0 to reduce the invalid voltage drop in the DC power supply circuit. be able to.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to embodiments shown in the drawings.

FIG. 3 is a block configuration diagram for explaining the basic principle of the present invention, in which 1 is a power supply (V _BB ), 3, 4 are
is line resistance, 5 is subscriber terminal (TEL), 6 is current supply circuit, 7 is load voltage detection circuit, 9 is DC-DC
The conversion circuit 8 is a DC power supply circuit.

The operation will be explained below. DC power supply circuit 8
The main purpose of this is to supply the subscriber terminal 5 with a constant load current L _L that is not affected by fluctuations in the output voltage V _OUT of the DC-DC conversion circuit 9 .
The specific circuit configuration of the DC power supply circuit 8 will be explained later using FIG. 5, but in terms of the model, it consists of a DC internal resistance Rin, which is divided into two resistors as shown in the same block, and The equivalent internal power supply is expressed as E _O. The DC-DC conversion circuit 9 is for converting the voltage supplied by the power supply 1 into a voltage suitable for operating the DC power supply circuit 8.
The output voltage V _OUT is used as an operating power source for operating the DC power supply circuit 8. On the other hand, the equivalent internal voltage E _O is generated circuit-wise based on the voltage value or current value of the constant voltage source or constant current source in the DC power supply circuit 8 . Therefore, if V _OUT is greater than or equal to the minimum operating voltage V _CEM of the DC power supply circuit 8 + the load voltage drop V _L , fluctuations in V _OUT will not affect the value of F _O The load current I _L flowing through the resistors 3 and 4 also has a constant value determined by E _O and Rin, the line resistances 3 and 4, and the resistance values of the subscriber terminal 5, regardless of fluctuations in V _OUT .

That is, the power supply characteristics of the DC power supply circuit 8 for the load are given independently of V _OUT as shown in the following equation.

I _L =E _O /R _L +Rin...(3) Here, E _O and Rin are constants determined by the circuit,
The load resistance R _L is the sum of the DC resistance of the subscriber terminal (TEL) 5 and the line resistances 3 and 4.

The principle of FIG. 3 will be explained below. A subscriber terminal (TEL) is connected to the current supply circuit 6 via line resistors 3 and 4.
5 is connected, the load current I _L is transferred to the DC power supply circuit 8
Flows more.

As is clear from the explanation of a specific circuit configuration example of the DC supply circuit 8 (FIG. 5 - DC power supply circuit 10) described later, the voltage drop of the DC power supply circuit 8 is DC-DC.
V OUT −V _L is obtained by subtracting the voltage drop V _L =I _L ·R _L due _to the load resistance R _L from the output voltage V _OUT of the conversion circuit 9.

When the load resistance R _L approaches 0, the DC power supply circuit 8
The voltage drop (V _OUT −V _L = V _OUT −I _L・R _L ) increases, and as seen from equation (3) for the load current I _L , the output voltage of the DC-DC converter circuit 9 increases. The power consumption of the DC power supply circuit 8 will increase unless V _OUT is lowered. As will be described in the first embodiment below, when the DC power supply circuit 8 is configured with an electronic circuit, its operation does not necessarily require a large voltage drop, and the voltage drop is small enough not to saturate the transistors that make up the circuit. A voltage drop (~several volts) is sufficient. This voltage is the minimum operating voltage of the DC power supply circuit 8.
V _CEM , invalid (not necessarily necessary for the operation of the DC power supply circuit) voltage drop ΔV = V _OUT −V _L −
This means that V _CEM is occurring, and the value of this ΔV increases as the load resistance R _L decreases due to the relationship V _L = I _L · R _L. Therefore, the output voltage of the DC-DC conversion circuit 9 is adjusted so as to detect the load voltage (V _L ) and reduce the invalid voltage drop ΔV of the DC power supply circuit 8.
Power consumption can be reduced by controlling V _OUT to lower it. In other words, _DC-
Generates the output voltage of the DC conversion circuit 9. This can be expressed quantitatively by the following equation.

V _OUT ≧V _L +V _CEM ......(3a) Load voltage V _L is detected so as to satisfy equation (3a), and this is used as a control input to control the DC-DC conversion circuit 9.
By controlling the output voltage V _OUT of the DC power supply circuit 8
This makes it possible to reduce the ineffective voltage drop.

Next, the operating principle of the DC-DC conversion circuit will be explained using FIG. 4.

In the figure, the error amplifier in the DC-DC conversion circuit 9
DC-DC is connected to one terminal of COPM (comparison side terminal).
The output of the converter 9' is connected via a resistor R, and the other terminal (reference side terminal) is connected to a reference voltage source V _REF . The DC-DC converter 9' is
For example, this is a well-known circuit whose output voltage varies with the switching frequency, and is controlled so that the voltages appearing at both input terminals are approximately equal. A current _IS proportional to the load current flows into the comparison side terminal. Under the condition that the potential difference between the comparison side terminal and the reference side terminal of the error amplifier COMP is almost "0" in the balanced state, the relationship between the detection current I _S and the output voltage V _OUT of the DC _- DC conversion circuit 9 is as follows: Considering it as a standard, it becomes the following formula.

V _OUT −RI _S = V _REF i.e. V _OUT = V _REF + RI _S ... (3b) Since the detection current I _S is compared to the load voltage V _L ,
By using the circuit shown in FIG. 4, it is possible to automatically control the output voltage V _OUT of the DC-DC conversion circuit 9 to decrease when the load voltage V _L decreases.
This can be seen from equation (3b).

Furthermore, if a DC-DC conversion circuit is carefully designed, a conversion efficiency of 70 to 80% can be obtained, so power consumption in this part is hardly a problem.

Now, as explained in Fig. 3, the DC power supply circuit 8
In order to reduce the power consumption of this circuit, it is sufficient to lower the reactive voltage ΔV of this circuit, and the equation for controlling the output voltage V _OUT of the DC-DC converter circuit 9 using the load voltage V _L for this purpose is given by equation (3b). has already been mentioned. For this purpose, it is sufficient to define the constants of the DC-DC conversion circuit in Figure 4 as shown in the following equation (3a).
This can be understood by comparing equation (3b).

V _REF ≧V _CEM ... (3c) V _L = RI _S ... (3d) By the method described above, the DC power supply circuit 8
The reactive voltage of the current supply circuit 6 is reduced, thereby reducing the power consumption of the current supply circuit 6.

Note that in the above description, only the case where the reactive voltage of the DC power supply circuit 8 is simply reduced is described. It goes without saying that the maximum power consumption reduction effect can be obtained by controlling this reactive voltage so that it is always approximately "0" regardless of variations in load resistance. It is of course possible to control the present invention in this way, and for this purpose, it is sufficient to set the constants so that V _REF ≒ V _CEM from equation (3c), as explained in Figs. 3 and 4. It's clearer than what I've been doing.

FIG. 5 shows the load voltage detection circuit 7 shown in FIG.
This is a specific circuit example of the DC power supply circuit 8 and the DC-DC conversion circuit 9, and the voltage drop of the DC power supply circuit 8 is
It is configured to be constant at V _CEM .

This will be explained below according to the drawings. 10 is a DC power supply circuit, 11 is a load voltage detection circuit, 12 is a DC-DC conversion circuit, and R _L shown at the left end of the figure is the load resistance that represents the sum of the line resistance and the DC resistance of the subscriber terminal. It is.

The DC power supply circuit 10 is composed of vertically complementary and symmetrical circuits, and includes output transistor current amplifiers Q ₁ , R ₁ , R ₂ , and Q ₁ ′, R ₁ ′, which supply current to the load.
R ₂ ′ and a two-wire voltage detector R ₄ that detects the load voltage,
R ₅ , R ₄ ', and a two-input driving transistor current amplifier Q ₂ , R ₃ , R that inputs the output of the two-wire voltage detector to one input terminal to drive the output transistor current amplifier. ₆ , and Q ₂ ′, R ₃ ′, and resistance R ₇ ,
and a constant voltage source _VB that drives the other input of the driving transistor current amplifier via _R7 '.

_{First , V B} → _{R 7 →}
A current of I ₂ = V _B / (2R ₇ + R ₆ ) flows through R ₆ → R ₇ , and this is the driving transistor current amplifier and β ₂
= R ₆ / (R ₅ + 2R ₃ ) times and becomes the input current of the output transistor current amplifier, which is further β ₁
= (R ₂ / R ₁ ) times the load R _L and the 2-wire voltage detector
It is divided into R ₄ , R ₅ , and R ₄ ′. This shunt current is
If I _L and Id, R ₅ is connected to both ends of the two-wire voltage detector R ₅ .
A voltage drop of (I ₂ + Id) occurs. The shunt current Id is the current flowing to the input of the drive transistor current amplifier.
Since it flows in the same direction as I ₂ , the input current I _i of the driving transistor current amplifier becomes smaller than I ₂ after all, and I _i =(V _B −R ₅ Id)/(R ₆ +2R ₇ ). Now when the value of load R _L increases, the shunt current Id
increases, the input current Ii decreases, and this is multiplied by β ₁ β ₂ , resulting in a decrease in the value of I _L +Id. That is, the loop R ₄ →β ₂ →R ₂ →β ₁ constitutes a negative feedback circuit. Therefore, the equivalent DC resistance viewed from the load side to the DC power supply circuit side can be freely set by changing the amount of negative feedback. The larger the value of the resistor R ₅ is, the greater this negative feedback effect becomes. Also, even if the current amplification factors β ₁ and β ₂ are increased, the negative feedback effect becomes greater, and the equivalent DC resistance decreases. If R ₅ is set to 0, the negative feedback effect becomes 0, and the equivalent output resistance becomes 2R ₄ regardless of the values of current amplification factors β ₁ and β ₂ . If the capacitor C ₁ is selected to have a sufficiently low impedance with respect to the audio signal, the audio signal will be bypassed by the capacitor C ₁ and the negative feedback effect will disappear, making it equivalent to the case where R ₅ = 0, The equivalent output resistance will be 2R ₄ .

As a result of detailed analysis, the power supply characteristics of this DC power supply circuit 10 are expressed by the following equation. However, the h _FE of the transistor is assumed to be infinite, and the base-emitter voltage V _BE ≈0 during operation.

I _L =E _O /R _L +Rin (4) Here, E _O =V _B R ₇ 2R ₄ R ₂ /R ₁ +R ₅ (1 + R ₂ /R ₁ ) /R ₆ +2R ₇ 2R ₃
+R ₅ (1+R ₂ /R ₁ )(5) Rin=2R ₄ 2R ₃ +R ₅ (1+R ₃ /R ₄ )/2R ₃ +R ₅ (1+R ₂ /
R ₁ )(6) However, R ₁ = R ₁ ′, R ₂ = R ₂ ′, R ₃ = R ₃ ′, R ₄ = R ₄ ′,
R ₇ =R ₇ '.

As shown in equations (5) and (6), the equivalent internal voltage E _O and the DC internal resistance Rin of the DC power supply circuit 10 are constants determined by the circuit constants.

As shown in equation (4), the load current I _L flowing from the DC power supply circuit 10 does not include the term V _OUT , so
It does not depend on the output voltage V _OUT of the DC-DC conversion circuit 12. However, this is limited to cases where the operating voltage of the transistors forming the DC power supply circuit is ensured.

By appropriately selecting circuit constants, most of the voltage drop in the DC power supply circuit 10 can be absorbed by the transistors Q ₁ ,
It is possible to share the burden between the collector and base of Q ₂ , Q ₁ ′, and Q _{2 ′} . As can be seen from equations (5) and (4), the collector-emitter voltage of these transistors is unrelated to the power supply characteristics, so the collector-emitter voltage of these transistors should be lowered to a level that does not saturate the transistors. Is possible.

That is, the output voltage of the DC-DC conversion circuit 12
By lowering V _OUT , it is possible to lower the voltage between the collector and emitter of the above-mentioned transistor while maintaining the power supply characteristics shown in equation (4), thereby reducing the voltage drop in the DC power supply circuit 10. can. Note that the collector-emitter voltage at which the transistor is saturated is about 1 volt, so the voltage drop in the DC power supply circuit 10 can be lowered to about 2 volts. This voltage is the minimum operating voltage
V _CEM .

The entire operation of FIG. 5 will be explained below.

The load voltage detection circuit 11 includes a transistor _Q3 and
Q ₄ , diodes D ₁ , D ₂ and resistors R ₈ , R ₉ , R ₈ ′, R ₁₀
Composed by. A current proportional to the load voltage V _L generated across the load resistor R _L flows through the resistors R ₈ , R ₉ ,
R ₈ ′ flows through the transistor, and a current proportional to this flows through the transistor.
The current flows to the collector of transistor Q ₄ due to the current mirroring effect between Q ₃ and Q ₄ and diodes D ₁ and D ₂ .
As a result, a voltage V _R15 proportional to the load voltage V _L is generated across the resistor R ₁₅ .

In detail, V _R15 is expressed as follows.

V _R15 = R ₁₅ /R ₁₀・R ₆ /2R ₈ +R ₉ V _L ...(7) However, R ₈ '= R ₈ , that is, the load voltage V _L is applied to the control input terminal C of the DC-DC conversion circuit 12. Generates a voltage proportional to.

Note that the load voltage detection circuit 11 includes detection resistors R ₈ ,
The load effect due to R ₉ and R ₈ ′ is exerted on the DC power supply circuit 10, but if the resistance value of R ₈ +R ₉ +R ₈ ′ is selected to be sufficiently large with respect to the DC internal resistance Rin, the load effect can be ignored and the problem is solved. do not have.

The DC-DC conversion circuit 12 has a function of controlling an output voltage by inputting a current. Of these, the voltage comparator (error amplifier) COMP and the switching transistor _Q7 perform self-oscillation at a frequency determined by the choke coil Ld, smoothing capacitor Cd, etc. Resistors R ₁₃ and R ₁₄ are provided to stabilize oscillation. The diode Dd is for commutating the reverse current of the choke coil Ld to the load side during the off period of the transistor _Q7 .

Since the voltage gain of the voltage comparator COMP is sufficiently large, the potential difference between the (-) input side and the (+) input side of the voltage comparator COMP is "≒0" in the operating state, so that the voltage gain of the DC-DC conversion circuit 12 is The output voltage V _OUT is determined as follows.

(i) The (-) input voltage of the voltage comparator COMP is V _OUT R ₁₁ /R ₁₁ +R ₁₂ −V _BB ……(8) (ii) The emitter voltage of transistor _Q7 is V _R15 +V _REF −V _BB =・R ₁₅ /R ₁₀・R ₉ /2R ₈ +R ₉・V _L +V _REF −V _BB ……(9) (iii) R ₁₃ is a resistor that determines the positive feedback rate and is generally selected to be sufficiently smaller than R ₁₄ . (~several hundred Ω), so the emitter potential of transistor _Q7 is equal to the (+) input potential of voltage comparator COMP. From equations (8) and (9), the DC-DC conversion circuit 12
The output voltage V _OUT of is given by the following formula.

V _OUT = (R ₁₅ /R ₁₀ )・(R ₉ /2R ₈ +R ₉ )・(R ₁₁ +R ₁₂ /R ₁₁ )・V _L + (R ₁₁ +R ₁₂ /R ₁₁ )・V _R
EF ......(10) On the other hand, the voltage drop across the load resistance R _L varies according to the load current I _L as shown in the following equation, so V _L = R _L I _L ... (11) The active voltage of the DC power supply circuit 10 Minimum voltage drop to ensure operation V _CEM and voltage drop between load resistance R _L V _L
By controlling the DC-DC converter circuit 12 so that the sum of the output voltage V _OUT of the DC-DC converter circuit 12 becomes the output voltage V OUT of the DC-DC converter circuit 12, power consumption in the DC power supply circuit 10 can be minimized. That is, the output voltage V _OUT of the DC-DC conversion circuit 12 needs to be controlled as shown in the following equation.

V _OUT = V _CEM + V _L ...(12) However, since the load voltage drop V _L is detected by the load voltage detection circuit 11, the output voltage V _OUT of the DC-DC conversion circuit 12 is eventually detected by the load voltage detection circuit 11.
(10) so that the relationship of equation (12) is satisfied by the control signal of
All you have to do is set the circuit constants in Eq.

In the conventional current supply circuit 6' shown in FIG. 1, the load current I _L is directly affected by the power supply V _BB as shown in equation (1). ) When the power supply voltage is changed, the load current I _L changes accordingly, so the desired power supply characteristics cannot be obtained, but the electronic DC power supply circuit that constitutes the present invention Since the load current I _L is not affected by the power supply side, it is possible to reduce power consumption without affecting the power supply characteristics.

Now, the power consumption P _DC of the entire current supply circuit based on the control characteristics of equation (12) is calculated as follows.

P _DC =V _CEM・I _L +V _OUT I _L 1−η/η =V _CEM・V _BB /η(R _L +Rin)+R _L (V _BB /R _L +Rin) ² (
1/η-1) ...(13) Here, η is the efficiency of the DC-DC conversion circuit 12.

Power consumption P _DC according to the present invention under the same conditions as before
The trial calculation is as shown in Figure 6. However, the calculation conditions are V _BB = 48V, V _CEM = 3V, η = 0.8, and Rin = 440Ω. The maximum power consumption of the current supply circuit 6' in the conventional circuit shown in FIG. 1 is 5.4W, whereas in the embodiment of the present invention shown in FIG. 5, the maximum power consumption of the entire current supply circuit is 0.5W, which is approximately Power consumption is reduced to 1/10. In this way, the current supply circuit with the circuit configuration of the present invention significantly reduces power consumption, solves the problem of heat dissipation that was a problem with the conventional system, and makes use of the characteristics of computerization to enable high-density mounting of telephone exchanges. can be made smaller.

A current approximately equal to the load current I _L flows through _the resistors R ₁ and _{R 1 '} in the DC power supply circuit 10 in FIG. If this cannot be ignored, the control characteristics of the DC-DC conversion circuit 12 may be set by taking into account the voltage drop (I _L ·R ₁ ) caused by the resistors ₁ and R ₁ '. In other words, if the sum of the minimum operating voltages of transistors Q ₁ and Q ₁ ' is V _CEM , then the DC-DC conversion circuit 12
The required output voltage is as follows:

V _OUT = V _CEM + V _L + I _L・R ₁ ...(14) However, from equation (4) and V _L = R _L・I _L , I _L = E _O /Rin− V _L /Rin, so (14) The formula is as follows.

V _OUT = V _CEM + (R ₁ /Rin) E _O + (1-R ₁ /R _L )V _L ...(15) In other words, the control characteristic shown by equation (15) and the control characteristic shown by equation (12) As for the control characteristics, the basic characteristics are the same except that the coefficient of V _L and the value of the constant term have changed.
There is no need for any new innovation in the circuit configuration. In this way, in the current supply circuit of the present invention, it is possible to minimize the power consumption of the current supply circuit by taking into account the slight resistance voltage drop within the DC power supply circuit 10.

FIG. 7 shows a current supply circuit according to a second embodiment of the present invention. FIG. 7 is completely the same as FIG. 5 except that the configuration of the load voltage detection circuit is changed. That is, in FIG. 5, a current proportional to the load voltage flows through the collector of the transistor Q ₃ that constitutes the load detection circuit 11, but since the collector of the transistor Q ₃ is connected to the ground, this current flows to the ground. Therefore, the detection current was not effectively used. In Figure 7, transistor Q ₃
The detected current output from the collector of the transistor
The _current is applied to the input (base and collector of transistor _Q5 ) of a current mirror circuit (mirror ratio 1:1) consisting of _Q5 and Q6, and the current is inverted and converted to DC.
- applied to the control input (C) of the DC conversion circuit 12; That is, since transistor Q ₄ is a PNP type and transistor Q ₃ is an NPN type, the directions of their collector currents are opposite to each other, so the direction of the collector current of transistor Q ₃ is changed to the current mirror circuit Q ₅ , Q. Inverted by ₆ ,
This means that the current is added at the control input (C) of the DC-DC conversion circuit 12. As described above, the circuit configuration shown in FIG. 7 has the advantage that the load voltage detection current can be used effectively.

FIG. 8 shows a current supply circuit according to a third embodiment of the present invention. FIG. 8 shows the circuit configuration of the load voltage detection circuit with the differential amplifier 13 and the voltage/current conversion circuit 1.
It is exactly the same as FIG. 5 except that it is composed of 4 and 4. In other words, the method of detecting the load voltage in Fig. 8 is as follows:
A load voltage divided by resistors R ₂₀ , R ₂₂ , and R ₂₃ is applied to the (+) and (−) inputs of the differential amplifier 13 . The differential amplifier 13 converts a voltage proportional to the load voltage applied in the form of a balanced input into an unbalanced output, which is generated at its output terminal in the form of a voltage output. Since the voltage/current conversion circuit 14 converts the voltage input into a current output form, a current input proportional to the load voltage is ultimately applied to the control input (C) of the DC-DC conversion circuit 12. Since the differential amplifier 13 and the voltage/current conversion circuit can be easily constructed using a known operational amplifier, their explanation will be omitted. In this way, in the circuit configuration shown in FIG. 8, the load voltage detection circuit is configured with a circuit configuration based on an operational amplifier, so it is possible to detect the load voltage with extremely high accuracy.
The output voltage of the DC-DC conversion circuit 12 can be controlled with high precision.

FIG. 9 shows a current supply circuit according to a fourth embodiment of the present invention. FIG. 9 shows the load voltage detection circuit 11'
The circuit is exactly the same as FIG. 7 except that the virtual ground point (E) of is connected to the midpoint potential point (D) (hereinafter referred to as midpoint) of the newly provided V _BB '/2 circuit 16.
Here, the V _BB /2 circuit is a circuit that generates a voltage that is 1/2 of the output voltage of the DC-DC conversion circuit 12.

The load voltage detection circuit 11 in FIG. 7 has an input resistance that appears to be infinite (the virtual ground point is not grounded) with respect to the common-mode voltage, so it does not exhibit any detection sensitivity to the common-mode voltage. , the load voltage detection circuit 11' in FIG. 9 is connected to its virtual ground point (E).
is connected to the midpoint (D) of the V _BB '/2 circuit 16, so it exhibits the same detection sensitivity for common mode voltages as for normal differential mode voltages. However, assuming that there is a fault on the subscriber line side and point (A) of the current supply circuit is directly grounded (hereinafter referred to as a ground fault), in a ground fault state, (A) of the current supply circuit,
Since the other common mode voltage component of the differential voltage component is added to point (B), the load voltage detection circuit 11 in FIG. 7 cannot obtain a sufficient detection output, and as a result, the DC-DC
Since the output voltage V _OUT of the conversion circuit 12 cannot be accurately controlled and the power consumption within the DC power supply circuit 10 increases, a separate protection circuit is required in the event of a fault such as a ground fault. The load voltage detection circuit 11 having the configuration shown in the figure has sufficient detection sensitivity even for common-mode voltages, so there is an advantage that there is no need to provide a protection circuit particularly for failures.

〔Effect of the invention〕

As described above, according to the present invention, a current supply circuit suitable for low power consumption and computerization can be realized.

[Brief explanation of the drawing]

FIG. 1 is a conventional current supply circuit, FIG. 2 is a load-dependent characteristic diagram of communication current and power consumption by the circuit of FIG. 1, and FIG. 3 is a block configuration of a current supply circuit according to the first embodiment of the present invention. 4 is a block diagram of a DC-DC conversion circuit used in the present invention, FIG. 5 is a diagram showing a specific circuit example of the current supply circuit shown in FIG. 3, and FIG. 6 is a diagram showing a specific circuit example of the current supply circuit shown in FIG. A load-dependent characteristic diagram of communication current and power consumption by the circuit; FIG. 7 is a configuration diagram of a second embodiment of the present invention in which the load voltage detection circuit is improved;
Fig. 8 is a configuration diagram of a third embodiment of the present invention in which a load voltage detection circuit is configured using an operational amplifier, and Fig. 9 is a configuration diagram of a load voltage detection circuit that has detection sensitivity even for common mode voltage. FIG. 4 is a configuration diagram of a fourth embodiment of the present invention. 1...Power supply, 3, 4...Subscriber line resistance, 5...
...Subscriber terminal (TEL), 6...Current supply circuit,
7, 11, 11'...Load voltage detection circuit, 10...
... DC power supply circuit, 9, 12 ... DC-DC conversion circuit, 13 ... Differential amplifier, 14 ... Voltage/current exchanger, 16 ... Midpoint voltage generation circuit.

Claims (1)

[Claims] 1. In a current supply circuit that is installed between the internal power supply of a telephone exchange and a subscriber terminal as a load and supplies direct current to the load, an output transistor current amplifier that supplies current to the load and a load voltage A two-wire voltage detector to detect, a two-input type driving transistor current amplifier that inputs the output of the two-wire voltage detector to one input terminal to drive the output transistor current amplifier, and the driving transistor current amplifier. A DC power supply circuit consisting of a constant current source that drives the other input of the DC power supply circuit, a load voltage detection circuit that detects the load voltage, and a switching type DC-
The switching type DC-
By controlling the output voltage of the DC conversion circuit to be equal to or higher than the sum of the load voltage drop and the minimum operating voltage for driving the output and drive transistor current amplifiers of the DC power supply circuit, A current supply circuit characterized by being configured to reduce power consumption.